2017-01-16 21:02:56 +00:00
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auto VDC::vramRead(uint16 addr) -> uint16 {
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if(addr.bit(15)) return 0x00;
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return vram[addr];
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}
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auto VDC::vramWrite(uint16 addr, uint16 data) -> void {
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if(addr.bit(15)) return;
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vram[addr] = data;
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}
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auto VDC::read(uint11 addr) -> uint8 {
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bool a0 = addr.bit(0);
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if(!addr.bit(10)) {
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//VDC
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if(addr.bit(1) == 0) {
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//SR
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if(a0) return 0x00;
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uint8 data;
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data.bit(0) = irq.pendingCollision;
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data.bit(1) = irq.pendingOverflow;
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data.bit(2) = irq.pendingLineCoincidence;
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data.bit(3) = irq.pendingTransferSATB;
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data.bit(4) = irq.pendingTransferVRAM;
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data.bit(5) = irq.pendingVblank;
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irq.lower();
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return data;
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}
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if(addr.bit(1) == 1) {
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if(io.address == 0x02) {
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//VRR
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uint8 data = io.vramDataRead.byte(a0);
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if(a0) {
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io.vramAddressRead += io.vramAddressIncrement;
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io.vramDataRead = vramRead(io.vramAddressRead);
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}
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return data;
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}
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}
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} else {
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//VCE
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if(addr.bits(0,2) == 0x04) {
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//CTR
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uint8 data = cram[io.colorAddress].bits(0,7);
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return data;
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}
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if(addr.bits(0,2) == 0x05) {
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//CTR
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uint8 data = cram[io.colorAddress].bit(0);
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io.colorAddress++;
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return data;
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}
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}
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return 0x00;
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}
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auto VDC::write(uint11 addr, uint8 data) -> void {
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bool a0 = addr.bit(0);
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if(!addr.bit(10)) {
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//VDC
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if(addr.bit(1) == 0) {
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//AR
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if(a0) return;
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io.address = data.bits(0,4);
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return;
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}
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if(addr.bit(1) == 1) {
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if(io.address == 0x00) {
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//MAWR
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io.vramAddressWrite.byte(a0) = data;
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return;
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}
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if(io.address == 0x01) {
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//MARR
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io.vramAddressRead.byte(a0) = data;
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io.vramDataRead = vramRead(io.vramAddressRead);
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return;
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}
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if(io.address == 0x02) {
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//VWR
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io.vramDataWrite.byte(a0) = data;
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if(a0) {
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vramWrite(io.vramAddressWrite, io.vramDataWrite);
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io.vramAddressWrite += io.vramAddressIncrement;
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}
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return;
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}
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if(io.address == 0x05) {
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//CR
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if(!a0) {
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irq.enableCollision = data.bit(0);
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irq.enableOverflow = data.bit(1);
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irq.enableLineCoincidence = data.bit(2);
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irq.enableVblank = data.bit(3);
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io.externalSync = data.bits(4,5);
|
Update to v101r35 release.
byuu says:
Changelog:
- PCE: added 384KB HuCard ROM mirroring mode
- PCE: corrected D-pad polling order
- PCE: corrected palette color ordering (GRB, not RGB -- yes,
seriously)
- PCE: corrected SATB DMA -- should write to SATB, not to VRAM
- PCE: broke out Background, Sprite VDC settings to separate
subclasses
- PCE: emulated VDC backgrounds
- PCE: emulated VDC sprites
- PCE: emulated VDC sprite overflow, collision interrupts
- HuC6280: fixed disassembler output for STi instructions
- HuC6280: added missing LastCycle check to interrupt()
- HuC6280: fixed BIT, CMP, CPX, CPY, TRB, TSB, TST flag testing and
result
- HuC6280: added extra cycle delays to the block move instructions
- HuC6280: fixed ordering for flag set/clear instructions (happens
after LastCycle check)
- HuC6280: removed extra cycle from immediate instructions
- HuC6280: fixed indirectLoad, indirectYStore absolute addressing
- HuC6280: fixed BBR, BBS zeropage value testing
- HuC6280: fixed stack push/pull direction
Neutopia looks okay until the main title screen, then there's some
gibberish on the bottom. The game also locks up with some gibberish once
you actually start a new game. So, still not playable just yet =(
2017-01-19 08:38:57 +00:00
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sprite.blank = data.bit(6);
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background.blank = data.bit(7);
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2017-01-16 21:02:56 +00:00
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} else {
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io.displayOutput = data.bits(0,1);
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io.dramRefresh = data.bit(2);
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if(data.bits(3,4) == 0) io.vramAddressIncrement = 0x01;
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if(data.bits(3,4) == 1) io.vramAddressIncrement = 0x20;
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if(data.bits(3,4) == 2) io.vramAddressIncrement = 0x40;
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if(data.bits(3,4) == 3) io.vramAddressIncrement = 0x80;
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}
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return;
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}
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if(io.address == 0x06) {
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//RCR
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io.lineCoincidence.byte(a0) = data;
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return;
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}
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if(io.address == 0x07) {
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//BXR
|
Update to v101r35 release.
byuu says:
Changelog:
- PCE: added 384KB HuCard ROM mirroring mode
- PCE: corrected D-pad polling order
- PCE: corrected palette color ordering (GRB, not RGB -- yes,
seriously)
- PCE: corrected SATB DMA -- should write to SATB, not to VRAM
- PCE: broke out Background, Sprite VDC settings to separate
subclasses
- PCE: emulated VDC backgrounds
- PCE: emulated VDC sprites
- PCE: emulated VDC sprite overflow, collision interrupts
- HuC6280: fixed disassembler output for STi instructions
- HuC6280: added missing LastCycle check to interrupt()
- HuC6280: fixed BIT, CMP, CPX, CPY, TRB, TSB, TST flag testing and
result
- HuC6280: added extra cycle delays to the block move instructions
- HuC6280: fixed ordering for flag set/clear instructions (happens
after LastCycle check)
- HuC6280: removed extra cycle from immediate instructions
- HuC6280: fixed indirectLoad, indirectYStore absolute addressing
- HuC6280: fixed BBR, BBS zeropage value testing
- HuC6280: fixed stack push/pull direction
Neutopia looks okay until the main title screen, then there's some
gibberish on the bottom. The game also locks up with some gibberish once
you actually start a new game. So, still not playable just yet =(
2017-01-19 08:38:57 +00:00
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background.hscroll.byte(a0) = data;
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2017-01-16 21:02:56 +00:00
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return;
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}
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if(io.address == 0x08) {
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//BYR
|
Update to v101r35 release.
byuu says:
Changelog:
- PCE: added 384KB HuCard ROM mirroring mode
- PCE: corrected D-pad polling order
- PCE: corrected palette color ordering (GRB, not RGB -- yes,
seriously)
- PCE: corrected SATB DMA -- should write to SATB, not to VRAM
- PCE: broke out Background, Sprite VDC settings to separate
subclasses
- PCE: emulated VDC backgrounds
- PCE: emulated VDC sprites
- PCE: emulated VDC sprite overflow, collision interrupts
- HuC6280: fixed disassembler output for STi instructions
- HuC6280: added missing LastCycle check to interrupt()
- HuC6280: fixed BIT, CMP, CPX, CPY, TRB, TSB, TST flag testing and
result
- HuC6280: added extra cycle delays to the block move instructions
- HuC6280: fixed ordering for flag set/clear instructions (happens
after LastCycle check)
- HuC6280: removed extra cycle from immediate instructions
- HuC6280: fixed indirectLoad, indirectYStore absolute addressing
- HuC6280: fixed BBR, BBS zeropage value testing
- HuC6280: fixed stack push/pull direction
Neutopia looks okay until the main title screen, then there's some
gibberish on the bottom. The game also locks up with some gibberish once
you actually start a new game. So, still not playable just yet =(
2017-01-19 08:38:57 +00:00
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background.vscroll.byte(a0) = data;
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2017-01-16 21:02:56 +00:00
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return;
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}
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if(io.address == 0x09) {
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//MWR
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if(a0) return;
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io.vramAccess = data.bits(0,1);
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io.spriteAccess = data.bits(2,3);
|
Update to v101r35 release.
byuu says:
Changelog:
- PCE: added 384KB HuCard ROM mirroring mode
- PCE: corrected D-pad polling order
- PCE: corrected palette color ordering (GRB, not RGB -- yes,
seriously)
- PCE: corrected SATB DMA -- should write to SATB, not to VRAM
- PCE: broke out Background, Sprite VDC settings to separate
subclasses
- PCE: emulated VDC backgrounds
- PCE: emulated VDC sprites
- PCE: emulated VDC sprite overflow, collision interrupts
- HuC6280: fixed disassembler output for STi instructions
- HuC6280: added missing LastCycle check to interrupt()
- HuC6280: fixed BIT, CMP, CPX, CPY, TRB, TSB, TST flag testing and
result
- HuC6280: added extra cycle delays to the block move instructions
- HuC6280: fixed ordering for flag set/clear instructions (happens
after LastCycle check)
- HuC6280: removed extra cycle from immediate instructions
- HuC6280: fixed indirectLoad, indirectYStore absolute addressing
- HuC6280: fixed BBR, BBS zeropage value testing
- HuC6280: fixed stack push/pull direction
Neutopia looks okay until the main title screen, then there's some
gibberish on the bottom. The game also locks up with some gibberish once
you actually start a new game. So, still not playable just yet =(
2017-01-19 08:38:57 +00:00
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if(data.bits(4,5) == 0) background.width = 32;
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if(data.bits(4,5) == 1) background.width = 64;
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if(data.bits(4,5) == 2) background.width = 128;
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if(data.bits(4,5) == 3) background.width = 128;
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if(data.bit(6) == 0) background.height = 32;
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if(data.bit(6) == 1) background.height = 64;
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2017-01-16 21:02:56 +00:00
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io.cgMode = data.bit(7);
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return;
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}
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if(io.address == 0x0a) {
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//HSR
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if(!a0) {
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io.horizontalSyncWidth = data.bits(0,4);
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} else {
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io.horizontalDisplayStart = data.bits(0,6);
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}
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return;
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}
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if(io.address == 0x0b) {
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//HDR
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if(!a0) {
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io.horizontalDisplayWidth = data.bits(0,6);
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} else {
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io.horizontalDisplayEnd = data.bits(0,6);
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}
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return;
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}
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if(io.address == 0x0c) {
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//VPR
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if(!a0) {
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io.verticalSyncWidth = data.bits(0,4);
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} else {
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io.verticalDisplayStart = data.bits(0,7);
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}
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return;
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}
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if(io.address == 0x0d) {
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//VDR
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io.verticalDisplayWidth.byte(a0) = data;
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return;
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}
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if(io.address == 0x0e) {
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//VCR
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if(a0) return;
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io.verticalDisplayEnd = data.bits(0,7);
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return;
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}
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if(io.address == 0x0f) {
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//DCR
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if(a0) return;
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irq.enableTransferVRAM = data.bit(0);
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irq.enableTransferSATB = data.bit(1);
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dma.sourceIncrementMode = data.bit(2);
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dma.targetIncrementMode = data.bit(3);
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dma.satbRepeat = data.bit(4);
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return;
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}
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if(io.address == 0x10) {
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//SOUR
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dma.source.byte(a0) = data;
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return;
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}
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if(io.address == 0x11) {
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//DESR
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dma.target.byte(a0) = data;
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return;
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}
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if(io.address == 0x12) {
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//LENR
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dma.length.byte(a0) = data;
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if(a0) dma.vramStart();
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return;
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}
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if(io.address == 0x13) {
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//DVSSR
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dma.satbSource.byte(a0) = data;
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if(a0) dma.satbQueue();
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return;
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}
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}
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} else {
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//VCE
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if(addr.bits(0,2) == 0x00) {
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//CR
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io.divisionRatio = data.bits(0,1);
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io.colorBlur = data.bit(2);
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io.grayscale = data.bit(7);
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return;
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}
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if(addr.bits(0,2) == 0x02) {
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//CTA
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io.colorAddress.bits(0,7) = data.bits(0,7);
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return;
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}
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if(addr.bits(0,2) == 0x03) {
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//CTA
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io.colorAddress.bit(8) = data.bit(0);
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return;
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}
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if(addr.bits(0,2) == 0x04) {
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//CTW
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cram[io.colorAddress].bits(0,7) = data.bits(0,7);
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return;
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}
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if(addr.bits(0,2) == 0x05) {
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//CTW
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cram[io.colorAddress].bit(8) = data.bit(0);
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io.colorAddress++;
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return;
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}
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}
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}
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