2012-02-26 07:59:44 +00:00
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#ifdef ARMDSP_CPP
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2012-02-27 00:18:50 +00:00
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uint8 ArmDSP::bus_iread(uint32 addr) {
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2012-02-26 07:59:44 +00:00
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if(addr >= 0x00000000 && addr <= 0x0001ffff) {
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2012-02-27 00:18:50 +00:00
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return programROM[addr & 0x0001ffff];
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}
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2012-02-28 11:10:02 +00:00
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if(addr >= 0x40000000 && addr <= 0x400000ff) {
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2012-02-28 11:21:18 +00:00
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if(addr == 0x40000000) return 0x00;
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if(addr == 0x40000010) {
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if(bridge.cputoarm.ready) {
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bridge.cputoarm.ready = false;
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return bridge.cputoarm.data;
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}
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}
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if(addr == 0x40000020) {
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return bridge.status();
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}
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if(addr == 0x40000024) return 0x00;
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if(addr == 0x40000028) return 0x00;
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if(addr == 0x4000002c) return 0x00;
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}
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if(addr >= 0xa0000000 && addr <= 0xa0007fff) {
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2012-02-29 12:56:21 +00:00
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return dataROM[addr & 0x00007fff];
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2012-02-27 00:18:50 +00:00
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}
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if(addr >= 0xe0000000 && addr <= 0xe0003fff) {
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return programRAM[addr & 0x00003fff];
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}
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2012-02-28 11:21:18 +00:00
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if((addr & 3) == 0) print("* ARM r", hex<8>(addr), "\n");
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2012-02-27 00:18:50 +00:00
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return 0x00;
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}
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void ArmDSP::bus_iwrite(uint32 addr, uint8 data) {
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2012-02-28 11:10:02 +00:00
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if(addr >= 0x40000000 && addr <= 0x400000ff) {
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2012-02-28 11:21:18 +00:00
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if(addr == 0x40000000) {
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bridge.armtocpu.ready = true;
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bridge.armtocpu.data = data;
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return;
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}
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if(addr == 0x40000020) return;
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if(addr == 0x40000024) return;
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if(addr == 0x40000028) return;
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if(addr == 0x4000002c) return print("* w4000002c = ", hex<2>(data), "\n");
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}
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2012-02-27 00:18:50 +00:00
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if(addr >= 0xe0000000 && addr <= 0xe0003fff) {
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programRAM[addr & 0x00003fff] = data;
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return;
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2012-02-26 07:59:44 +00:00
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}
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2012-02-28 11:21:18 +00:00
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if((addr & 3) == 0) print("* ARM w", hex<8>(addr), " = ", hex<2>(data), "\n");
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2012-02-27 00:18:50 +00:00
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}
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Update to v086r14 release.
byuu says:
Attempted to fix the bugs pointed out by Cydrak for the shifter carry
and subtraction flags. No way to know if I was successful.
The memory map should exactly match real hardware now.
Also simplified bus reading/writing: we can get fancy when it works,
I suppose.
Reduced some of the code repetition to try and minimize the chances for
bugs.
I hopefully fixed up register-based ror shifting to what the docs were
saying.
And lastly, the disassembler should handle every opcode in every mode
now.
ldr rn,[pc,n] adds (pc,n) [absolute address] after opcode. I didn't want
to actually read from ROM here (in case it ever touches I/O or
something), but I suppose we could try anyway.
At startup, it will write out "disassembly.txt" which is a disassembly
of the entire program ROM.
If anyone wants to look for disassembly errors, I'll go ahead and fix
them. Just note that I won't do common substitutions like mov pc,lr ==
ret.
At this point, we can make two moves and then the game tells us that
we've won.
So ... I'm back to thinking the problem is with bugs in the ARM core,
and that our bidirectional communication is strong enough to play the
game.
Although that's not perfect. The game definitely looks at d4 (and
possibly others later), but my hardware tests can't get anything but
d0/d3 set.
2012-03-01 12:23:05 +00:00
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uint32 ArmDSP::bus_readbyte(uint32 addr) {
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return bus_iread(addr);
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2012-02-26 07:59:44 +00:00
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}
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Update to v086r14 release.
byuu says:
Attempted to fix the bugs pointed out by Cydrak for the shifter carry
and subtraction flags. No way to know if I was successful.
The memory map should exactly match real hardware now.
Also simplified bus reading/writing: we can get fancy when it works,
I suppose.
Reduced some of the code repetition to try and minimize the chances for
bugs.
I hopefully fixed up register-based ror shifting to what the docs were
saying.
And lastly, the disassembler should handle every opcode in every mode
now.
ldr rn,[pc,n] adds (pc,n) [absolute address] after opcode. I didn't want
to actually read from ROM here (in case it ever touches I/O or
something), but I suppose we could try anyway.
At startup, it will write out "disassembly.txt" which is a disassembly
of the entire program ROM.
If anyone wants to look for disassembly errors, I'll go ahead and fix
them. Just note that I won't do common substitutions like mov pc,lr ==
ret.
At this point, we can make two moves and then the game tells us that
we've won.
So ... I'm back to thinking the problem is with bugs in the ARM core,
and that our bidirectional communication is strong enough to play the
game.
Although that's not perfect. The game definitely looks at d4 (and
possibly others later), but my hardware tests can't get anything but
d0/d3 set.
2012-03-01 12:23:05 +00:00
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uint32 ArmDSP::bus_readword(uint32 addr) {
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addr &= ~3;
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return (
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(bus_iread(addr + 0) << 0)
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| (bus_iread(addr + 1) << 8)
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| (bus_iread(addr + 2) << 16)
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| (bus_iread(addr + 3) << 24)
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);
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}
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2012-02-28 11:10:02 +00:00
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Update to v086r14 release.
byuu says:
Attempted to fix the bugs pointed out by Cydrak for the shifter carry
and subtraction flags. No way to know if I was successful.
The memory map should exactly match real hardware now.
Also simplified bus reading/writing: we can get fancy when it works,
I suppose.
Reduced some of the code repetition to try and minimize the chances for
bugs.
I hopefully fixed up register-based ror shifting to what the docs were
saying.
And lastly, the disassembler should handle every opcode in every mode
now.
ldr rn,[pc,n] adds (pc,n) [absolute address] after opcode. I didn't want
to actually read from ROM here (in case it ever touches I/O or
something), but I suppose we could try anyway.
At startup, it will write out "disassembly.txt" which is a disassembly
of the entire program ROM.
If anyone wants to look for disassembly errors, I'll go ahead and fix
them. Just note that I won't do common substitutions like mov pc,lr ==
ret.
At this point, we can make two moves and then the game tells us that
we've won.
So ... I'm back to thinking the problem is with bugs in the ARM core,
and that our bidirectional communication is strong enough to play the
game.
Although that's not perfect. The game definitely looks at d4 (and
possibly others later), but my hardware tests can't get anything but
d0/d3 set.
2012-03-01 12:23:05 +00:00
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void ArmDSP::bus_writebyte(uint32 addr, uint32 data) {
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return bus_iwrite(addr, data);
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}
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2012-02-29 12:56:21 +00:00
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|
Update to v086r14 release.
byuu says:
Attempted to fix the bugs pointed out by Cydrak for the shifter carry
and subtraction flags. No way to know if I was successful.
The memory map should exactly match real hardware now.
Also simplified bus reading/writing: we can get fancy when it works,
I suppose.
Reduced some of the code repetition to try and minimize the chances for
bugs.
I hopefully fixed up register-based ror shifting to what the docs were
saying.
And lastly, the disassembler should handle every opcode in every mode
now.
ldr rn,[pc,n] adds (pc,n) [absolute address] after opcode. I didn't want
to actually read from ROM here (in case it ever touches I/O or
something), but I suppose we could try anyway.
At startup, it will write out "disassembly.txt" which is a disassembly
of the entire program ROM.
If anyone wants to look for disassembly errors, I'll go ahead and fix
them. Just note that I won't do common substitutions like mov pc,lr ==
ret.
At this point, we can make two moves and then the game tells us that
we've won.
So ... I'm back to thinking the problem is with bugs in the ARM core,
and that our bidirectional communication is strong enough to play the
game.
Although that's not perfect. The game definitely looks at d4 (and
possibly others later), but my hardware tests can't get anything but
d0/d3 set.
2012-03-01 12:23:05 +00:00
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void ArmDSP::bus_writeword(uint32 addr, uint32 data) {
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addr &= ~3;
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bus_iwrite(addr + 0, data >> 0);
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bus_iwrite(addr + 1, data >> 8);
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bus_iwrite(addr + 2, data >> 16);
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bus_iwrite(addr + 3, data >> 24);
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2012-02-26 07:59:44 +00:00
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}
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#endif
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