2012-03-26 10:13:02 +00:00
|
|
|
#include <processor/processor.hpp>
|
|
|
|
#include "upd96050.hpp"
|
|
|
|
|
|
|
|
namespace Processor {
|
|
|
|
|
2015-11-21 07:36:48 +00:00
|
|
|
#include "registers.cpp"
|
2012-03-26 10:13:02 +00:00
|
|
|
#include "instructions.cpp"
|
|
|
|
#include "memory.cpp"
|
|
|
|
#include "disassembler.cpp"
|
|
|
|
#include "serialization.cpp"
|
|
|
|
|
2015-11-21 07:36:48 +00:00
|
|
|
auto uPD96050::power() -> void {
|
2012-03-26 10:13:02 +00:00
|
|
|
if(revision == Revision::uPD7725) {
|
|
|
|
regs.pc.bits(11);
|
|
|
|
regs.rp.bits(10);
|
|
|
|
regs.dp.bits( 8);
|
|
|
|
}
|
|
|
|
|
|
|
|
if(revision == Revision::uPD96050) {
|
|
|
|
regs.pc.bits(14);
|
|
|
|
regs.rp.bits(11);
|
|
|
|
regs.dp.bits(11);
|
|
|
|
}
|
|
|
|
|
2015-11-21 07:36:48 +00:00
|
|
|
for(auto n : range(16)) regs.stack[n] = 0x0000;
|
2012-03-26 10:13:02 +00:00
|
|
|
regs.pc = 0x0000;
|
|
|
|
regs.rp = 0x0000;
|
|
|
|
regs.dp = 0x0000;
|
|
|
|
regs.sp = 0x0;
|
|
|
|
regs.k = 0x0000;
|
|
|
|
regs.l = 0x0000;
|
|
|
|
regs.m = 0x0000;
|
|
|
|
regs.n = 0x0000;
|
|
|
|
regs.a = 0x0000;
|
|
|
|
regs.b = 0x0000;
|
|
|
|
regs.flaga = 0x00;
|
|
|
|
regs.flagb = 0x00;
|
|
|
|
regs.tr = 0x0000;
|
|
|
|
regs.trb = 0x0000;
|
|
|
|
regs.sr = 0x0000;
|
|
|
|
regs.dr = 0x0000;
|
|
|
|
regs.si = 0x0000;
|
|
|
|
regs.so = 0x0000;
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|