bsnes/higan/processor/gsu/serialization.cpp

57 lines
1.1 KiB
C++
Raw Normal View History

auto GSU::serialize(serializer& s) -> void {
s.integer(regs.pipeline);
s.integer(regs.ramaddr);
for(auto n : range(16)) {
s.integer(regs.r[n].data);
s.integer(regs.r[n].modified);
}
Update to v098r19 release. byuu says: Changelog: - added nall/bit-field.hpp - updated all CPU cores (sans LR35902 due to some complexities) to use BitFields instead of bools - updated as many CPU cores as I could to use BitFields instead of union { struct { uint8_t ... }; }; pairs The speed changes are mostly a wash for this. In some instances, I noticed a ~2-3% speedup (eg SNES emulation), and in others a 2-3% slowdown (eg Famicom emulation.) It's within the margin of error, so it's safe to say it has no impact. This does give us a lot of new useful things, however: - no more manual reconstruction of flag values from lots of left shifts and ORs - no more manual deconstruction of flag values from lots of ANDs - ability to get completely free aliases to flag groups (eg GSU can provide alt2, alt1 and also alt (which is alt2,alt1 combined) - removes the need for the nasty order_lsbN macro hack (eventually will make higan 100% endian independent) - saves us from insane compilers that try and do nasty things with alignment on union-structs - saves us from insane compilers that try to store bit-field bits in reverse order - will allow some really novel new use cases (I'm planning an instant-decode ARM opcode function, for instance.) - reduces code size (we can serialize flag registers in one line instead of one for each flag) However, I probably won't use it for super critical code that's constantly reading out register values (eg PPU MMIO registers.) I think there we would end up with a performance penalty.
2016-06-08 22:26:35 +00:00
s.integer(regs.sfr.data);
s.integer(regs.pbr);
s.integer(regs.rombr);
s.integer(regs.rambr);
s.integer(regs.cbr);
s.integer(regs.scbr);
s.integer(regs.scmr.ht);
s.integer(regs.scmr.ron);
s.integer(regs.scmr.ran);
s.integer(regs.scmr.md);
s.integer(regs.colr);
s.integer(regs.por.obj);
s.integer(regs.por.freezehigh);
s.integer(regs.por.highnibble);
s.integer(regs.por.dither);
s.integer(regs.por.transparent);
s.integer(regs.bramr);
s.integer(regs.vcr);
s.integer(regs.cfgr.irq);
s.integer(regs.cfgr.ms0);
s.integer(regs.clsr);
s.integer(regs.romcl);
s.integer(regs.romdr);
s.integer(regs.ramcl);
s.integer(regs.ramar);
s.integer(regs.ramdr);
s.integer(regs.sreg);
s.integer(regs.dreg);
s.array(cache.buffer);
s.array(cache.valid);
for(uint n : range(2)) {
s.integer(pixelcache[n].offset);
s.integer(pixelcache[n].bitpend);
s.array(pixelcache[n].data);
}
}