2016-01-27 11:31:39 +00:00
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//20000-fffff
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auto Cartridge::romRead(uint addr) -> uint8 {
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2016-01-28 11:39:49 +00:00
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switch((uint4)(addr >> 16)) {
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2016-01-27 11:31:39 +00:00
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case 2: addr = r.bank_rom0 << 16 | (uint16)addr; break; //20000-2ffff
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case 3: addr = r.bank_rom1 << 16 | (uint16)addr; break; //30000-3ffff
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2016-01-28 11:39:49 +00:00
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default: addr = r.bank_rom2 << 20 | (uint20)addr; break; //40000-fffff
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2016-01-27 11:31:39 +00:00
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}
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2016-01-28 11:39:49 +00:00
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if(!rom.data) return 0x00;
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return rom.data[addr & rom.mask];
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2016-01-27 11:31:39 +00:00
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}
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auto Cartridge::romWrite(uint addr, uint8 data) -> void {
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}
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//10000-1ffff
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auto Cartridge::ramRead(uint addr) -> uint8 {
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addr = r.bank_sram << 16 | (uint16)addr;
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2016-01-28 11:39:49 +00:00
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if(!ram.data) return 0x00;
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return ram.data[addr & ram.mask];
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2016-01-27 11:31:39 +00:00
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}
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auto Cartridge::ramWrite(uint addr, uint8 data) -> void {
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addr = r.bank_sram << 16 | (uint16)addr;
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2016-01-28 11:39:49 +00:00
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if(!ram.data) return;
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ram.data[addr & ram.mask] = data;
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2016-01-27 11:31:39 +00:00
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}
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