2016-02-04 10:29:08 +00:00
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auto V30MZ::opMoveMemReg(Size size) {
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modRM();
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setMem(size, getReg(size));
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}
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auto V30MZ::opMoveRegMem(Size size) {
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modRM();
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setReg(size, getMem(size));
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}
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2016-02-04 21:18:06 +00:00
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//8c mov memw,seg
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2016-02-04 10:29:08 +00:00
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auto V30MZ::opMoveMemSeg() {
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modRM();
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setMem(Word, getSeg());
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2016-02-04 21:18:06 +00:00
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state.poll = false;
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2016-02-04 10:29:08 +00:00
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}
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2016-02-04 21:18:06 +00:00
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//8e mov seg,memw
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2016-02-04 10:29:08 +00:00
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auto V30MZ::opMoveSegMem() {
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wait(1);
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modRM();
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setSeg(getMem(Word));
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2016-02-04 21:18:06 +00:00
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if((modrm.reg & 3) == 3) state.poll = false;
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2016-02-04 10:29:08 +00:00
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}
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auto V30MZ::opMoveAccMem(Size size) {
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2016-02-04 21:18:06 +00:00
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setAcc(size, read(size, segment(r.ds), fetch(Word)));
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2016-02-04 10:29:08 +00:00
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}
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auto V30MZ::opMoveMemAcc(Size size) {
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2016-02-04 21:18:06 +00:00
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write(size, segment(r.ds), fetch(Word), getAcc(size));
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2016-02-04 10:29:08 +00:00
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}
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2016-02-16 09:27:55 +00:00
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auto V30MZ::opMoveRegImm(uint8_t& reg) {
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2016-02-04 10:29:08 +00:00
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reg = fetch(Byte);
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}
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2016-02-16 09:27:55 +00:00
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auto V30MZ::opMoveRegImm(uint16_t& reg) {
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2016-02-04 10:29:08 +00:00
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reg = fetch(Word);
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}
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auto V30MZ::opMoveMemImm(Size size) {
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modRM();
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setMem(size, fetch(size));
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}
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2016-02-16 09:27:55 +00:00
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auto V30MZ::opExchange(uint16_t& x, uint16_t& y) {
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2016-02-04 10:29:08 +00:00
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wait(2);
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uint16 z = x;
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x = y;
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y = z;
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}
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auto V30MZ::opExchangeMemReg(Size size) {
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wait(2);
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modRM();
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auto mem = getMem(size);
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auto reg = getReg(size);
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setMem(size, reg);
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setReg(size, mem);
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}
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auto V30MZ::opLoadEffectiveAddressRegMem() {
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modRM();
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setReg(Word, modrm.address);
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}
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2016-02-16 09:27:55 +00:00
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auto V30MZ::opLoadSegmentMem(uint16_t& reg) {
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2016-02-04 10:29:08 +00:00
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wait(5);
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modRM();
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reg = getMem(Word);
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}
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