2012-04-29 06:16:44 +00:00
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struct Coprocessor : Thread {
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alwaysinline void step(unsigned clocks);
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alwaysinline void synchronize_cpu();
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};
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#include <sfc/chip/icd2/icd2.hpp>
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2012-05-22 12:10:00 +00:00
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#include <sfc/chip/bsx/bsx.hpp>
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2012-04-29 06:16:44 +00:00
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#include <sfc/chip/nss/nss.hpp>
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Update to v091r05 release.
[No prior releases were posted to the WIP thread. -Ed.]
byuu says:
Super Famicom mapping system has been reworked as discussed with the
mask= changes. offset becomes base, mode is gone. Also added support for
comma-separated fields in the address fields, to reduce the number of
map lines needed.
<?xml version="1.0" encoding="UTF-8"?>
<cartridge region="NTSC">
<superfx revision="2">
<rom name="program.rom" size="0x200000"/>
<ram name="save.rwm" size="0x8000"/>
<map id="io" address="00-3f,80-bf:3000-32ff"/>
<map id="rom" address="00-3f:8000-ffff" mask="0x8000"/>
<map id="rom" address="40-5f:0000-ffff"/>
<map id="ram" address="00-3f,80-bf:6000-7fff" size="0x2000"/>
<map id="ram" address="70-71:0000-ffff"/>
</superfx>
</cartridge>
Or in BML:
cartridge region=NTSC
superfx revision=2
rom name=program.rom size=0x200000
ram name=save.rwm size=0x8000
map id=io address=00-3f,80-bf:3000-32ff
map id=rom address=00-3f:8000-ffff mask=0x8000
map id=rom address=40-5f:0000-ffff
map id=ram address=00-3f,80-bf:6000-7fff size=0x2000
map id=ram address=70-71:0000-ffff
As a result of the changes, old mappings will no longer work. The above
XML example will run Super Mario World 2: Yoshi's Island. Otherwise,
you'll have to write your own.
All that's left now is to work some sort of database mapping system in,
so I can start dumping carts en masse.
The NES changes that FitzRoy asked for are mostly in as well.
Also, part of the reason I haven't released a WIP ... but fuck it, I'm
not going to wait forever to post a new WIP.
I've added a skeleton driver to emulate Campus Challenge '92 and
Powerfest '94. There's no actual emulation, except for the stuff I can
glean from looking at the pictures of the board. It has a DSP-1 (so
SR/DR registers), four ROMs that map in and out, RAM, etc.
I've also added preliminary mapping to upload high scores to a website,
but obviously I need the ROMs first.
2012-10-09 08:25:32 +00:00
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#include <sfc/chip/event/event.hpp>
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2012-05-22 12:10:00 +00:00
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2012-04-29 06:16:44 +00:00
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#include <sfc/chip/sa1/sa1.hpp>
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2012-05-22 12:10:00 +00:00
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#include <sfc/chip/superfx/superfx.hpp>
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2012-04-29 06:16:44 +00:00
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#include <sfc/chip/armdsp/armdsp.hpp>
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2012-05-22 12:10:00 +00:00
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#include <sfc/chip/hitachidsp/hitachidsp.hpp>
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#include <sfc/chip/necdsp/necdsp.hpp>
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#include <sfc/chip/epsonrtc/epsonrtc.hpp>
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#include <sfc/chip/sharprtc/sharprtc.hpp>
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2012-04-29 06:16:44 +00:00
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#include <sfc/chip/spc7110/spc7110.hpp>
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2012-05-22 12:10:00 +00:00
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#include <sfc/chip/sdd1/sdd1.hpp>
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2012-04-29 06:16:44 +00:00
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#include <sfc/chip/obc1/obc1.hpp>
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2012-05-22 12:10:00 +00:00
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2012-11-02 10:37:38 +00:00
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#include <sfc/chip/hsu1/hsu1.hpp>
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2012-04-29 06:16:44 +00:00
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#include <sfc/chip/msu1/msu1.hpp>
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void Coprocessor::step(unsigned clocks) {
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clock += clocks * (uint64)cpu.frequency;
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}
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void Coprocessor::synchronize_cpu() {
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if(clock >= 0 && scheduler.sync != Scheduler::SynchronizeMode::All) co_switch(cpu.thread);
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}
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