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bsnes/higan/processor/arm/serialization.cpp

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Update to v094r30 release. byuu says: This WIP does substantially better on endrift's GBA timing tests. Still not perfect, though. But hopefully enough to get me out of dead last place. I also finally fixed the THUMB-mode ldmia bug that jchadwick reported. So, GBA emulation should be improved quite a bit, hopefully.
2015-06-24 13:21:24 +00:00
auto ARM::serialize(serializer& s) -> void {
Update to v087r26 release. byuu says: Changelog: - fixed FIFO[1] reset behavior (fixes audio in Sword of Mana) - added FlashROM emulation (both sizes) - GBA parses RAM settings from manifest.xml now - save RAM is written to disk now - added save state support (it's currently broken, though) - fixed ROM/RAM access timings - open bus should mostly work (we don't do the PC+12 stuff yet) - emulated the undocumented memory control register (mirror IWRAM, disable I+EWRAM, EWRAM wait state count) - emulated keypad interrupts - emulated STOP (freezes video, audio, DMA and timers; only breaks on keypad IRQs) - probably a lot more, it was a long night ... Show stoppers, missing things, broken things, etc: - ST018 is still completely broken - GBC audio sequencer apparently needs work - GBA audio FIFO buffer seems too quiet - PHI / ROM prefetch needs to be emulated (no idea on how to do this, especially PHI) - SOUNDBIAS 64/128/256khz modes should output at that resolution (really, we need to simulate PWM properly, no idea on how to do this) - object mosaic top-left coordinates are wrong (minor, fixing will actually make the effect look worse) - need to emulate PPU greenswap and color palette distortion (no idea on how do this) - need GBA save type database (I would also LIKE to blacklist / patch-out trainers, but that's a discussion for another day.) - some ARM ops advance the prefetch buffer, so you can read PC+12 in some cases
2012-04-16 12:19:39 +00:00
s.integer(processor.r0.data);
s.integer(processor.r1.data);
s.integer(processor.r2.data);
s.integer(processor.r3.data);
s.integer(processor.r4.data);
s.integer(processor.r5.data);
s.integer(processor.r6.data);
s.integer(processor.r7.data);
s.integer(processor.usr.r8.data);
s.integer(processor.usr.r9.data);
s.integer(processor.usr.r10.data);
s.integer(processor.usr.r11.data);
s.integer(processor.usr.r12.data);
s.integer(processor.usr.sp.data);
s.integer(processor.usr.lr.data);
s.integer(processor.fiq.r8.data);
s.integer(processor.fiq.r9.data);
s.integer(processor.fiq.r10.data);
s.integer(processor.fiq.r11.data);
s.integer(processor.fiq.r12.data);
s.integer(processor.fiq.sp.data);
s.integer(processor.fiq.lr.data);
Update to v098r19 release. byuu says: Changelog: - added nall/bit-field.hpp - updated all CPU cores (sans LR35902 due to some complexities) to use BitFields instead of bools - updated as many CPU cores as I could to use BitFields instead of union { struct { uint8_t ... }; }; pairs The speed changes are mostly a wash for this. In some instances, I noticed a ~2-3% speedup (eg SNES emulation), and in others a 2-3% slowdown (eg Famicom emulation.) It's within the margin of error, so it's safe to say it has no impact. This does give us a lot of new useful things, however: - no more manual reconstruction of flag values from lots of left shifts and ORs - no more manual deconstruction of flag values from lots of ANDs - ability to get completely free aliases to flag groups (eg GSU can provide alt2, alt1 and also alt (which is alt2,alt1 combined) - removes the need for the nasty order_lsbN macro hack (eventually will make higan 100% endian independent) - saves us from insane compilers that try and do nasty things with alignment on union-structs - saves us from insane compilers that try to store bit-field bits in reverse order - will allow some really novel new use cases (I'm planning an instant-decode ARM opcode function, for instance.) - reduces code size (we can serialize flag registers in one line instead of one for each flag) However, I probably won't use it for super critical code that's constantly reading out register values (eg PPU MMIO registers.) I think there we would end up with a performance penalty.
2016-06-08 22:26:35 +00:00
s.integer(processor.fiq.spsr.data);
Update to v087r26 release. byuu says: Changelog: - fixed FIFO[1] reset behavior (fixes audio in Sword of Mana) - added FlashROM emulation (both sizes) - GBA parses RAM settings from manifest.xml now - save RAM is written to disk now - added save state support (it's currently broken, though) - fixed ROM/RAM access timings - open bus should mostly work (we don't do the PC+12 stuff yet) - emulated the undocumented memory control register (mirror IWRAM, disable I+EWRAM, EWRAM wait state count) - emulated keypad interrupts - emulated STOP (freezes video, audio, DMA and timers; only breaks on keypad IRQs) - probably a lot more, it was a long night ... Show stoppers, missing things, broken things, etc: - ST018 is still completely broken - GBC audio sequencer apparently needs work - GBA audio FIFO buffer seems too quiet - PHI / ROM prefetch needs to be emulated (no idea on how to do this, especially PHI) - SOUNDBIAS 64/128/256khz modes should output at that resolution (really, we need to simulate PWM properly, no idea on how to do this) - object mosaic top-left coordinates are wrong (minor, fixing will actually make the effect look worse) - need to emulate PPU greenswap and color palette distortion (no idea on how do this) - need GBA save type database (I would also LIKE to blacklist / patch-out trainers, but that's a discussion for another day.) - some ARM ops advance the prefetch buffer, so you can read PC+12 in some cases
2012-04-16 12:19:39 +00:00
s.integer(processor.irq.sp.data);
s.integer(processor.irq.lr.data);
Update to v098r19 release. byuu says: Changelog: - added nall/bit-field.hpp - updated all CPU cores (sans LR35902 due to some complexities) to use BitFields instead of bools - updated as many CPU cores as I could to use BitFields instead of union { struct { uint8_t ... }; }; pairs The speed changes are mostly a wash for this. In some instances, I noticed a ~2-3% speedup (eg SNES emulation), and in others a 2-3% slowdown (eg Famicom emulation.) It's within the margin of error, so it's safe to say it has no impact. This does give us a lot of new useful things, however: - no more manual reconstruction of flag values from lots of left shifts and ORs - no more manual deconstruction of flag values from lots of ANDs - ability to get completely free aliases to flag groups (eg GSU can provide alt2, alt1 and also alt (which is alt2,alt1 combined) - removes the need for the nasty order_lsbN macro hack (eventually will make higan 100% endian independent) - saves us from insane compilers that try and do nasty things with alignment on union-structs - saves us from insane compilers that try to store bit-field bits in reverse order - will allow some really novel new use cases (I'm planning an instant-decode ARM opcode function, for instance.) - reduces code size (we can serialize flag registers in one line instead of one for each flag) However, I probably won't use it for super critical code that's constantly reading out register values (eg PPU MMIO registers.) I think there we would end up with a performance penalty.
2016-06-08 22:26:35 +00:00
s.integer(processor.irq.spsr.data);
Update to v087r26 release. byuu says: Changelog: - fixed FIFO[1] reset behavior (fixes audio in Sword of Mana) - added FlashROM emulation (both sizes) - GBA parses RAM settings from manifest.xml now - save RAM is written to disk now - added save state support (it's currently broken, though) - fixed ROM/RAM access timings - open bus should mostly work (we don't do the PC+12 stuff yet) - emulated the undocumented memory control register (mirror IWRAM, disable I+EWRAM, EWRAM wait state count) - emulated keypad interrupts - emulated STOP (freezes video, audio, DMA and timers; only breaks on keypad IRQs) - probably a lot more, it was a long night ... Show stoppers, missing things, broken things, etc: - ST018 is still completely broken - GBC audio sequencer apparently needs work - GBA audio FIFO buffer seems too quiet - PHI / ROM prefetch needs to be emulated (no idea on how to do this, especially PHI) - SOUNDBIAS 64/128/256khz modes should output at that resolution (really, we need to simulate PWM properly, no idea on how to do this) - object mosaic top-left coordinates are wrong (minor, fixing will actually make the effect look worse) - need to emulate PPU greenswap and color palette distortion (no idea on how do this) - need GBA save type database (I would also LIKE to blacklist / patch-out trainers, but that's a discussion for another day.) - some ARM ops advance the prefetch buffer, so you can read PC+12 in some cases
2012-04-16 12:19:39 +00:00
s.integer(processor.svc.sp.data);
s.integer(processor.svc.lr.data);
Update to v098r19 release. byuu says: Changelog: - added nall/bit-field.hpp - updated all CPU cores (sans LR35902 due to some complexities) to use BitFields instead of bools - updated as many CPU cores as I could to use BitFields instead of union { struct { uint8_t ... }; }; pairs The speed changes are mostly a wash for this. In some instances, I noticed a ~2-3% speedup (eg SNES emulation), and in others a 2-3% slowdown (eg Famicom emulation.) It's within the margin of error, so it's safe to say it has no impact. This does give us a lot of new useful things, however: - no more manual reconstruction of flag values from lots of left shifts and ORs - no more manual deconstruction of flag values from lots of ANDs - ability to get completely free aliases to flag groups (eg GSU can provide alt2, alt1 and also alt (which is alt2,alt1 combined) - removes the need for the nasty order_lsbN macro hack (eventually will make higan 100% endian independent) - saves us from insane compilers that try and do nasty things with alignment on union-structs - saves us from insane compilers that try to store bit-field bits in reverse order - will allow some really novel new use cases (I'm planning an instant-decode ARM opcode function, for instance.) - reduces code size (we can serialize flag registers in one line instead of one for each flag) However, I probably won't use it for super critical code that's constantly reading out register values (eg PPU MMIO registers.) I think there we would end up with a performance penalty.
2016-06-08 22:26:35 +00:00
s.integer(processor.svc.spsr.data);
Update to v087r26 release. byuu says: Changelog: - fixed FIFO[1] reset behavior (fixes audio in Sword of Mana) - added FlashROM emulation (both sizes) - GBA parses RAM settings from manifest.xml now - save RAM is written to disk now - added save state support (it's currently broken, though) - fixed ROM/RAM access timings - open bus should mostly work (we don't do the PC+12 stuff yet) - emulated the undocumented memory control register (mirror IWRAM, disable I+EWRAM, EWRAM wait state count) - emulated keypad interrupts - emulated STOP (freezes video, audio, DMA and timers; only breaks on keypad IRQs) - probably a lot more, it was a long night ... Show stoppers, missing things, broken things, etc: - ST018 is still completely broken - GBC audio sequencer apparently needs work - GBA audio FIFO buffer seems too quiet - PHI / ROM prefetch needs to be emulated (no idea on how to do this, especially PHI) - SOUNDBIAS 64/128/256khz modes should output at that resolution (really, we need to simulate PWM properly, no idea on how to do this) - object mosaic top-left coordinates are wrong (minor, fixing will actually make the effect look worse) - need to emulate PPU greenswap and color palette distortion (no idea on how do this) - need GBA save type database (I would also LIKE to blacklist / patch-out trainers, but that's a discussion for another day.) - some ARM ops advance the prefetch buffer, so you can read PC+12 in some cases
2012-04-16 12:19:39 +00:00
s.integer(processor.abt.sp.data);
s.integer(processor.abt.lr.data);
Update to v098r19 release. byuu says: Changelog: - added nall/bit-field.hpp - updated all CPU cores (sans LR35902 due to some complexities) to use BitFields instead of bools - updated as many CPU cores as I could to use BitFields instead of union { struct { uint8_t ... }; }; pairs The speed changes are mostly a wash for this. In some instances, I noticed a ~2-3% speedup (eg SNES emulation), and in others a 2-3% slowdown (eg Famicom emulation.) It's within the margin of error, so it's safe to say it has no impact. This does give us a lot of new useful things, however: - no more manual reconstruction of flag values from lots of left shifts and ORs - no more manual deconstruction of flag values from lots of ANDs - ability to get completely free aliases to flag groups (eg GSU can provide alt2, alt1 and also alt (which is alt2,alt1 combined) - removes the need for the nasty order_lsbN macro hack (eventually will make higan 100% endian independent) - saves us from insane compilers that try and do nasty things with alignment on union-structs - saves us from insane compilers that try to store bit-field bits in reverse order - will allow some really novel new use cases (I'm planning an instant-decode ARM opcode function, for instance.) - reduces code size (we can serialize flag registers in one line instead of one for each flag) However, I probably won't use it for super critical code that's constantly reading out register values (eg PPU MMIO registers.) I think there we would end up with a performance penalty.
2016-06-08 22:26:35 +00:00
s.integer(processor.abt.spsr.data);
Update to v087r26 release. byuu says: Changelog: - fixed FIFO[1] reset behavior (fixes audio in Sword of Mana) - added FlashROM emulation (both sizes) - GBA parses RAM settings from manifest.xml now - save RAM is written to disk now - added save state support (it's currently broken, though) - fixed ROM/RAM access timings - open bus should mostly work (we don't do the PC+12 stuff yet) - emulated the undocumented memory control register (mirror IWRAM, disable I+EWRAM, EWRAM wait state count) - emulated keypad interrupts - emulated STOP (freezes video, audio, DMA and timers; only breaks on keypad IRQs) - probably a lot more, it was a long night ... Show stoppers, missing things, broken things, etc: - ST018 is still completely broken - GBC audio sequencer apparently needs work - GBA audio FIFO buffer seems too quiet - PHI / ROM prefetch needs to be emulated (no idea on how to do this, especially PHI) - SOUNDBIAS 64/128/256khz modes should output at that resolution (really, we need to simulate PWM properly, no idea on how to do this) - object mosaic top-left coordinates are wrong (minor, fixing will actually make the effect look worse) - need to emulate PPU greenswap and color palette distortion (no idea on how do this) - need GBA save type database (I would also LIKE to blacklist / patch-out trainers, but that's a discussion for another day.) - some ARM ops advance the prefetch buffer, so you can read PC+12 in some cases
2012-04-16 12:19:39 +00:00
s.integer(processor.und.sp.data);
s.integer(processor.und.lr.data);
Update to v098r19 release. byuu says: Changelog: - added nall/bit-field.hpp - updated all CPU cores (sans LR35902 due to some complexities) to use BitFields instead of bools - updated as many CPU cores as I could to use BitFields instead of union { struct { uint8_t ... }; }; pairs The speed changes are mostly a wash for this. In some instances, I noticed a ~2-3% speedup (eg SNES emulation), and in others a 2-3% slowdown (eg Famicom emulation.) It's within the margin of error, so it's safe to say it has no impact. This does give us a lot of new useful things, however: - no more manual reconstruction of flag values from lots of left shifts and ORs - no more manual deconstruction of flag values from lots of ANDs - ability to get completely free aliases to flag groups (eg GSU can provide alt2, alt1 and also alt (which is alt2,alt1 combined) - removes the need for the nasty order_lsbN macro hack (eventually will make higan 100% endian independent) - saves us from insane compilers that try and do nasty things with alignment on union-structs - saves us from insane compilers that try to store bit-field bits in reverse order - will allow some really novel new use cases (I'm planning an instant-decode ARM opcode function, for instance.) - reduces code size (we can serialize flag registers in one line instead of one for each flag) However, I probably won't use it for super critical code that's constantly reading out register values (eg PPU MMIO registers.) I think there we would end up with a performance penalty.
2016-06-08 22:26:35 +00:00
s.integer(processor.und.spsr.data);
Update to v087r26 release. byuu says: Changelog: - fixed FIFO[1] reset behavior (fixes audio in Sword of Mana) - added FlashROM emulation (both sizes) - GBA parses RAM settings from manifest.xml now - save RAM is written to disk now - added save state support (it's currently broken, though) - fixed ROM/RAM access timings - open bus should mostly work (we don't do the PC+12 stuff yet) - emulated the undocumented memory control register (mirror IWRAM, disable I+EWRAM, EWRAM wait state count) - emulated keypad interrupts - emulated STOP (freezes video, audio, DMA and timers; only breaks on keypad IRQs) - probably a lot more, it was a long night ... Show stoppers, missing things, broken things, etc: - ST018 is still completely broken - GBC audio sequencer apparently needs work - GBA audio FIFO buffer seems too quiet - PHI / ROM prefetch needs to be emulated (no idea on how to do this, especially PHI) - SOUNDBIAS 64/128/256khz modes should output at that resolution (really, we need to simulate PWM properly, no idea on how to do this) - object mosaic top-left coordinates are wrong (minor, fixing will actually make the effect look worse) - need to emulate PPU greenswap and color palette distortion (no idea on how do this) - need GBA save type database (I would also LIKE to blacklist / patch-out trainers, but that's a discussion for another day.) - some ARM ops advance the prefetch buffer, so you can read PC+12 in some cases
2012-04-16 12:19:39 +00:00
Update to v087r27 release. byuu says: Changelog: - serialize processor.pc.data, not processor.pc - call CPU processor.setMode() in ARM serialize - serialize BIOS.mdr - support SRAM > 32KB - EEPROM, FlashROM serialize - EEPROM lose nall/bitarray.hpp - noise line feed after envelope - space out PSR read - ST018 needs byte reads fixed (don't align) [fixes HNMS2] - flush sram/eeprom/flashrom to 0 on cartridge load - APU/PPU dont sync back to CPU if syncing for state - fixed APU sync problems in GB/GBC core that could possibly wreck save states as well Quite a lot of little problems there. I believe GBA save states are fixed now.
2012-04-17 12:16:54 +00:00
s.integer(processor.pc.data);
Update to v098r19 release. byuu says: Changelog: - added nall/bit-field.hpp - updated all CPU cores (sans LR35902 due to some complexities) to use BitFields instead of bools - updated as many CPU cores as I could to use BitFields instead of union { struct { uint8_t ... }; }; pairs The speed changes are mostly a wash for this. In some instances, I noticed a ~2-3% speedup (eg SNES emulation), and in others a 2-3% slowdown (eg Famicom emulation.) It's within the margin of error, so it's safe to say it has no impact. This does give us a lot of new useful things, however: - no more manual reconstruction of flag values from lots of left shifts and ORs - no more manual deconstruction of flag values from lots of ANDs - ability to get completely free aliases to flag groups (eg GSU can provide alt2, alt1 and also alt (which is alt2,alt1 combined) - removes the need for the nasty order_lsbN macro hack (eventually will make higan 100% endian independent) - saves us from insane compilers that try and do nasty things with alignment on union-structs - saves us from insane compilers that try to store bit-field bits in reverse order - will allow some really novel new use cases (I'm planning an instant-decode ARM opcode function, for instance.) - reduces code size (we can serialize flag registers in one line instead of one for each flag) However, I probably won't use it for super critical code that's constantly reading out register values (eg PPU MMIO registers.) I think there we would end up with a performance penalty.
2016-06-08 22:26:35 +00:00
s.integer(processor.cpsr.data);
Update to v087r26 release. byuu says: Changelog: - fixed FIFO[1] reset behavior (fixes audio in Sword of Mana) - added FlashROM emulation (both sizes) - GBA parses RAM settings from manifest.xml now - save RAM is written to disk now - added save state support (it's currently broken, though) - fixed ROM/RAM access timings - open bus should mostly work (we don't do the PC+12 stuff yet) - emulated the undocumented memory control register (mirror IWRAM, disable I+EWRAM, EWRAM wait state count) - emulated keypad interrupts - emulated STOP (freezes video, audio, DMA and timers; only breaks on keypad IRQs) - probably a lot more, it was a long night ... Show stoppers, missing things, broken things, etc: - ST018 is still completely broken - GBC audio sequencer apparently needs work - GBA audio FIFO buffer seems too quiet - PHI / ROM prefetch needs to be emulated (no idea on how to do this, especially PHI) - SOUNDBIAS 64/128/256khz modes should output at that resolution (really, we need to simulate PWM properly, no idea on how to do this) - object mosaic top-left coordinates are wrong (minor, fixing will actually make the effect look worse) - need to emulate PPU greenswap and color palette distortion (no idea on how do this) - need GBA save type database (I would also LIKE to blacklist / patch-out trainers, but that's a discussion for another day.) - some ARM ops advance the prefetch buffer, so you can read PC+12 in some cases
2012-04-16 12:19:39 +00:00
s.integer(processor.carryout);
s.integer(processor.irqline);
s.integer(pipeline.reload);
Update to v094r35 release. byuu says: GBA timings are *almost* perfect now. Off by 1-3 cycles on each test, sans a few DMA ones that seem to not run at all according to the numbers (crazy.)
2015-07-01 10:58:42 +00:00
s.integer(pipeline.nonsequential);
Update to v087r26 release. byuu says: Changelog: - fixed FIFO[1] reset behavior (fixes audio in Sword of Mana) - added FlashROM emulation (both sizes) - GBA parses RAM settings from manifest.xml now - save RAM is written to disk now - added save state support (it's currently broken, though) - fixed ROM/RAM access timings - open bus should mostly work (we don't do the PC+12 stuff yet) - emulated the undocumented memory control register (mirror IWRAM, disable I+EWRAM, EWRAM wait state count) - emulated keypad interrupts - emulated STOP (freezes video, audio, DMA and timers; only breaks on keypad IRQs) - probably a lot more, it was a long night ... Show stoppers, missing things, broken things, etc: - ST018 is still completely broken - GBC audio sequencer apparently needs work - GBA audio FIFO buffer seems too quiet - PHI / ROM prefetch needs to be emulated (no idea on how to do this, especially PHI) - SOUNDBIAS 64/128/256khz modes should output at that resolution (really, we need to simulate PWM properly, no idea on how to do this) - object mosaic top-left coordinates are wrong (minor, fixing will actually make the effect look worse) - need to emulate PPU greenswap and color palette distortion (no idea on how do this) - need GBA save type database (I would also LIKE to blacklist / patch-out trainers, but that's a discussion for another day.) - some ARM ops advance the prefetch buffer, so you can read PC+12 in some cases
2012-04-16 12:19:39 +00:00
s.integer(pipeline.execute.address);
s.integer(pipeline.execute.instruction);
s.integer(pipeline.decode.address);
s.integer(pipeline.decode.instruction);
s.integer(pipeline.fetch.address);
s.integer(pipeline.fetch.instruction);
s.integer(crash);
Update to v087r27 release. byuu says: Changelog: - serialize processor.pc.data, not processor.pc - call CPU processor.setMode() in ARM serialize - serialize BIOS.mdr - support SRAM > 32KB - EEPROM, FlashROM serialize - EEPROM lose nall/bitarray.hpp - noise line feed after envelope - space out PSR read - ST018 needs byte reads fixed (don't align) [fixes HNMS2] - flush sram/eeprom/flashrom to 0 on cartridge load - APU/PPU dont sync back to CPU if syncing for state - fixed APU sync problems in GB/GBC core that could possibly wreck save states as well Quite a lot of little problems there. I believe GBA save states are fixed now.
2012-04-17 12:16:54 +00:00
Update to v098r19 release. byuu says: Changelog: - added nall/bit-field.hpp - updated all CPU cores (sans LR35902 due to some complexities) to use BitFields instead of bools - updated as many CPU cores as I could to use BitFields instead of union { struct { uint8_t ... }; }; pairs The speed changes are mostly a wash for this. In some instances, I noticed a ~2-3% speedup (eg SNES emulation), and in others a 2-3% slowdown (eg Famicom emulation.) It's within the margin of error, so it's safe to say it has no impact. This does give us a lot of new useful things, however: - no more manual reconstruction of flag values from lots of left shifts and ORs - no more manual deconstruction of flag values from lots of ANDs - ability to get completely free aliases to flag groups (eg GSU can provide alt2, alt1 and also alt (which is alt2,alt1 combined) - removes the need for the nasty order_lsbN macro hack (eventually will make higan 100% endian independent) - saves us from insane compilers that try and do nasty things with alignment on union-structs - saves us from insane compilers that try to store bit-field bits in reverse order - will allow some really novel new use cases (I'm planning an instant-decode ARM opcode function, for instance.) - reduces code size (we can serialize flag registers in one line instead of one for each flag) However, I probably won't use it for super critical code that's constantly reading out register values (eg PPU MMIO registers.) I think there we would end up with a performance penalty.
2016-06-08 22:26:35 +00:00
processor.setMode((Processor::Mode)(uint)cpsr().m);
Update to v087r26 release. byuu says: Changelog: - fixed FIFO[1] reset behavior (fixes audio in Sword of Mana) - added FlashROM emulation (both sizes) - GBA parses RAM settings from manifest.xml now - save RAM is written to disk now - added save state support (it's currently broken, though) - fixed ROM/RAM access timings - open bus should mostly work (we don't do the PC+12 stuff yet) - emulated the undocumented memory control register (mirror IWRAM, disable I+EWRAM, EWRAM wait state count) - emulated keypad interrupts - emulated STOP (freezes video, audio, DMA and timers; only breaks on keypad IRQs) - probably a lot more, it was a long night ... Show stoppers, missing things, broken things, etc: - ST018 is still completely broken - GBC audio sequencer apparently needs work - GBA audio FIFO buffer seems too quiet - PHI / ROM prefetch needs to be emulated (no idea on how to do this, especially PHI) - SOUNDBIAS 64/128/256khz modes should output at that resolution (really, we need to simulate PWM properly, no idea on how to do this) - object mosaic top-left coordinates are wrong (minor, fixing will actually make the effect look worse) - need to emulate PPU greenswap and color palette distortion (no idea on how do this) - need GBA save type database (I would also LIKE to blacklist / patch-out trainers, but that's a discussion for another day.) - some ARM ops advance the prefetch buffer, so you can read PC+12 in some cases
2012-04-16 12:19:39 +00:00
}