mirror of https://github.com/bsnes-emu/bsnes.git
Update to v087r27 release.
byuu says: Changelog: - serialize processor.pc.data, not processor.pc - call CPU processor.setMode() in ARM serialize - serialize BIOS.mdr - support SRAM > 32KB - EEPROM, FlashROM serialize - EEPROM lose nall/bitarray.hpp - noise line feed after envelope - space out PSR read - ST018 needs byte reads fixed (don't align) [fixes HNMS2] - flush sram/eeprom/flashrom to 0 on cartridge load - APU/PPU dont sync back to CPU if syncing for state - fixed APU sync problems in GB/GBC core that could possibly wreck save states as well Quite a lot of little problems there. I believe GBA save states are fixed now.
This commit is contained in:
parent
0cd0dcd811
commit
d2241f1931
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@ -1,7 +1,7 @@
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#ifndef BASE_HPP
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#define BASE_HPP
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static const char Version[] = "087.26";
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static const char Version[] = "087.27";
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#include <nall/platform.hpp>
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#include <nall/algorithm.hpp>
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@ -49,7 +49,7 @@ void APU::main() {
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interface->audioSample(master.center, master.left, master.right);
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clock += 1 * cpu.frequency;
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if(clock >= 0) co_switch(scheduler.active_thread = cpu.thread);
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if(clock >= 0 && scheduler.sync != Scheduler::SynchronizeMode::All) co_switch(scheduler.active_thread = cpu.thread);
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}
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}
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@ -21,8 +21,15 @@ void System::runtosave() {
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scheduler.sync = Scheduler::SynchronizeMode::CPU;
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runthreadtosave();
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scheduler.sync = Scheduler::SynchronizeMode::All;
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scheduler.active_thread = lcd.thread;
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runthreadtosave();
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scheduler.sync = Scheduler::SynchronizeMode::All;
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scheduler.active_thread = apu.thread;
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runthreadtosave();
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scheduler.sync = Scheduler::SynchronizeMode::None;
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}
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void System::runthreadtosave() {
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@ -76,7 +76,7 @@ void APU::main() {
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void APU::step(unsigned clocks) {
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clock += clocks;
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if(clock >= 0) co_switch(cpu.thread);
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if(clock >= 0 && scheduler.sync != Scheduler::SynchronizeMode::All) co_switch(cpu.thread);
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}
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void APU::power() {
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@ -68,6 +68,7 @@ void APU::serialize(serializer &s) {
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s.integer(noise.envelope.direction);
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s.integer(noise.envelope.volume);
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s.integer(noise.envelope.period);
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s.integer(noise.length);
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s.integer(noise.divisor);
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s.integer(noise.narrowlfsr);
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@ -23,7 +23,9 @@ bool Cartridge::load(const string &markup, const uint8_t *data, unsigned size) {
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if(info["type"].data == "SRAM" || info["type"].data == "FRAM") {
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has_sram = true;
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ram.size = 32 * 1024;
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ram.size = numeral(info["size"].data);
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ram.mask = ram.size - 1;
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for(unsigned n = 0; n < ram.size; n++) ram.data[n] = 0;
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}
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if(info["type"].data == "EEPROM") {
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@ -31,12 +33,14 @@ bool Cartridge::load(const string &markup, const uint8_t *data, unsigned size) {
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eeprom.size = numeral(info["size"].data);
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eeprom.mask = size > 16 * 1024 * 1024 ? 0x0fffff00 : 0x0f000000;
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eeprom.test = size > 16 * 1024 * 1024 ? 0x0dffff00 : 0x0d000000;
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for(unsigned n = 0; n < eeprom.size; n++) eeprom.data[n] = 0;
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}
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if(info["type"].data == "FlashROM") {
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has_flashrom = true;
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flashrom.id = numeral(info["id"].data);
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flashrom.size = numeral(info["size"].data);
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for(unsigned n = 0; n < flashrom.size; n++) flashrom.data[n] = 0;
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}
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}
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@ -58,7 +62,7 @@ void Cartridge::power() {
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uint8* Cartridge::ram_data() {
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if(has_sram) return ram.data;
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if(has_eeprom) return eeprom.data.data();
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if(has_eeprom) return eeprom.data;
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if(has_flashrom) return flashrom.data;
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return nullptr;
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}
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@ -92,7 +96,7 @@ void Cartridge::write(uint8 *data, uint32 addr, uint32 size, uint32 word) {
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}
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uint32 Cartridge::read(uint32 addr, uint32 size) {
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if(has_sram && (addr & 0x0e000000 ) == 0x0e000000 ) return read(ram.data, addr & 0x7fff, size);
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if(has_sram && (addr & 0x0e000000 ) == 0x0e000000 ) return read(ram.data, addr & ram.mask, size);
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if(has_eeprom && (addr & eeprom.mask) == eeprom.test) return eeprom.read();
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if(has_flashrom && (addr & 0x0f000000 ) == 0x0e000000 ) return flashrom.read(addr);
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if(addr < 0x0e000000) return read(rom.data, addr & 0x01ffffff, size);
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@ -100,7 +104,7 @@ uint32 Cartridge::read(uint32 addr, uint32 size) {
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}
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void Cartridge::write(uint32 addr, uint32 size, uint32 word) {
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if(has_sram && (addr & 0x0e000000 ) == 0x0e000000 ) return write(ram.data, addr & 0x7fff, size, word);
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if(has_sram && (addr & 0x0e000000 ) == 0x0e000000 ) return write(ram.data, addr & ram.mask, size, word);
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if(has_eeprom && (addr & eeprom.mask) == eeprom.test) return eeprom.write(word & 1);
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if(has_flashrom && (addr & 0x0f000000 ) == 0x0e000000 ) return flashrom.write(addr, word);
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}
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@ -109,6 +113,7 @@ Cartridge::Cartridge() {
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loaded = false;
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rom.data = new uint8[rom.size = 32 * 1024 * 1024];
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ram.data = new uint8[ram.size = 32 * 1024];
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eeprom.data = new uint8[eeprom.size = 8 * 1024];
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flashrom.data = new uint8[flashrom.size = 128 * 1024];
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}
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@ -1,8 +1,17 @@
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bool Cartridge::EEPROM::read(unsigned addr) {
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return data[addr >> 3] & 0x80 >> (addr & 7);
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}
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void Cartridge::EEPROM::write(unsigned addr, bool bit) {
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if(bit == 0) data[addr >> 3] &=~ (0x80 >> (addr & 7));
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if(bit == 1) data[addr >> 3] |= (0x80 >> (addr & 7));
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}
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bool Cartridge::EEPROM::read() {
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bool bit = 1;
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if(mode == Mode::ReadData) {
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if(offset >= 4) bit = data[address * 64 + (offset - 4)];
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if(offset >= 4) bit = read(address * 64 + (offset - 4));
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if(++offset == 68) mode = Mode::Wait;
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}
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@ -43,7 +52,7 @@ void Cartridge::EEPROM::write(bool bit) {
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}
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else if(mode == Mode::WriteData) {
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data[address * 64 + offset] = bit;
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write(address * 64 + offset, bit);
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if(++offset == 64) {
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mode = Mode::WriteValidate;
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}
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@ -56,10 +65,20 @@ void Cartridge::EEPROM::write(bool bit) {
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}
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void Cartridge::EEPROM::power() {
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data.resize(size);
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bits = (size <= 512 ? 6 : 14);
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mode = Mode::Wait;
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offset = 0;
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address = 0;
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}
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void Cartridge::EEPROM::serialize(serializer &s) {
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s.array(data, size);
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s.integer(size);
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s.integer(mask);
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s.integer(test);
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s.integer(bits);
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s.integer((unsigned&)mode);
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s.integer(offset);
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s.integer(address);
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}
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@ -88,3 +88,16 @@ void Cartridge::FlashROM::power() {
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writeselect = false;
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bank = 0;
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}
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void Cartridge::FlashROM::serialize(serializer &s) {
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s.array(data, size);
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s.integer(size);
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s.integer(id);
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s.integer(unlockhi);
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s.integer(unlocklo);
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s.integer(idmode);
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s.integer(erasemode);
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s.integer(bankselect);
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s.integer(writeselect);
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s.integer(bank);
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}
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@ -1,10 +1,11 @@
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struct Memory {
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uint8 *data;
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unsigned size;
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unsigned mask;
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} rom, ram;
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struct EEPROM {
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bitarray data;
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uint8 *data;
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unsigned size;
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unsigned mask;
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unsigned test;
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unsigned offset;
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unsigned address;
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bool read(unsigned addr);
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void write(unsigned addr, bool bit);
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bool read();
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void write(bool bit);
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void power();
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void serialize(serializer&);
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} eeprom;
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struct FlashROM {
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uint8 read(uint16 addr);
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void write(uint16 addr, uint8 byte);
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void power();
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void serialize(serializer&);
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} flashrom;
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void Cartridge::serialize(serializer &s) {
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if(has_sram) s.array(ram.data, ram.size);
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if(has_eeprom) s.array(eeprom.data.data(), eeprom.size);
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if(has_flashrom) s.array(flashrom.data, flashrom.size);
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if(has_eeprom) eeprom.serialize(s);
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if(has_flashrom) flashrom.serialize(s);
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}
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@ -37,7 +37,7 @@ void PPU::main() {
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void PPU::step(unsigned clocks) {
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clock += clocks;
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if(clock >= 0) co_switch(cpu.thread);
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if(clock >= 0 && scheduler.sync != Scheduler::SynchronizeMode::All) co_switch(cpu.thread);
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}
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void PPU::power() {
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@ -33,6 +33,8 @@ bool System::unserialize(serializer &s) {
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}
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void System::serialize(serializer &s) {
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s.integer(bios.size);
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s.integer(bios.mdr);
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}
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void System::serialize_all(serializer &s) {
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@ -30,7 +30,7 @@ struct PSR {
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inline operator uint32() const {
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return (n << 31) + (z << 30) + (c << 29) + (v << 28)
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+ (i << 7) + (f << 6) + (t << 5) + (m << 0);
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+ (i << 7) + (f << 6) + (t << 5) + (m << 0);
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}
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inline PSR& operator=(uint32 d) {
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@ -52,7 +52,7 @@ void ARM::serialize(serializer &s) {
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s.integer(processor.und.lr.data);
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processor.und.spsr.serialize(s);
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s.integer(processor.pc);
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s.integer(processor.pc.data);
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processor.cpsr.serialize(s);
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s.integer(processor.carryout);
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s.integer(processor.sequential);
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s.integer(pipeline.fetch.instruction);
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s.integer(crash);
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processor.setMode((Processor::Mode)cpsr().m);
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}
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@ -7,9 +7,14 @@ void ArmDSP::bus_idle(uint32 addr) {
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uint32 ArmDSP::bus_read(uint32 addr, uint32 size) {
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step(1);
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static auto memory = [&](const uint8 *memory, uint32 addr, uint32 size) {
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memory += addr & ~3;
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return memory[0] << 0 | memory[1] << 8 | memory[2] << 16 | memory[3] << 24;
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static auto memory = [&](const uint8 *memory, uint32 addr, uint32 size) -> uint32 {
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switch(size) {
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case Word:
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memory += addr & ~3;
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return memory[0] << 0 | memory[1] << 8 | memory[2] << 16 | memory[3] << 24;
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case Byte:
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return memory[addr];
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}
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};
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switch(addr & 0xe0000000) {
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