mirror of https://github.com/red-prig/fpPS4.git
This commit is contained in:
Pavel
parent
3fb2bb3763
commit
b2333cec45
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@ -814,8 +814,10 @@ begin
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diff,
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range {VK_WHOLE_SIZE});
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//TODO: check write flag
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ctx.Cmd.AddPlannedTrigger(QWORD(addr),QWORD(addr)+size,nil)
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if ((memuse and TM_WRITE)<>0) then
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begin
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ctx.Cmd.AddPlannedTrigger(QWORD(addr),QWORD(addr)+size,nil);
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end;
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end;
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end;
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@ -1083,11 +1083,10 @@ begin
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With FUniformBuilder.FBuffers[i] do
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begin
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//TODO: check write flag
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insert_buffer_resource(@node^.scope,
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addr,
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size,
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TM_READ or TM_WRITE);
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memuse);
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end;
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end;
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@ -1105,12 +1104,6 @@ var
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begin
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for i:=0 to 31 do
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begin
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if (GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].OFFSET<>0) and (GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].OFFSET<>i) then
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begin
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Assert(false, 'SPI_PS_INPUT_CNTL['+IntToStr(i)+'].OFFSET=' +IntToStr(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].OFFSET ));
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end;
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Assert(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].DEFAULT_VAL =0,'SPI_PS_INPUT_CNTL['+IntToStr(i)+'].DEFAULT_VAL=' +IntToStr(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].DEFAULT_VAL ));
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Assert(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].FLAT_SHADE =0,'SPI_PS_INPUT_CNTL['+IntToStr(i)+'].FLAT_SHADE=' +IntToStr(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].FLAT_SHADE ));
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Assert(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].FP16_INTERP_MODE=0,'SPI_PS_INPUT_CNTL['+IntToStr(i)+'].FP16_INTERP_MODE='+IntToStr(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].FP16_INTERP_MODE));
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end;
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@ -28,6 +28,8 @@ uses
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emit_bin;
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type
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PSPI_PS_INPUT_CNTL_0=^TSPI_PS_INPUT_CNTL_0;
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TSprvEmit=class(TEmitFetch)
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function NewMain:PSpirvFunc;
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@ -47,6 +49,7 @@ type
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ENA:TSPI_PS_INPUT_ENA);
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Procedure SET_SHADER_CONTROL(const SHADER_CONTROL:TDB_SHADER_CONTROL);
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Procedure SET_INPUT_CNTL (INPUT_CNTL:PSPI_PS_INPUT_CNTL_0;NUM_INTERP:Byte);
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Procedure InitCs(RSRC1:TCOMPUTE_PGM_RSRC1;
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RSRC2:TCOMPUTE_PGM_RSRC2;
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@ -448,6 +451,20 @@ begin
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FEarlyFragmentTests:=(SHADER_CONTROL.DEPTH_BEFORE_SHADER<>0);
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end;
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Procedure TSprvEmit.SET_INPUT_CNTL(INPUT_CNTL:PSPI_PS_INPUT_CNTL_0;NUM_INTERP:Byte);
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var
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i:Byte;
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begin
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if (NUM_INTERP<>0) then
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for i:=0 to NUM_INTERP-1 do
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begin
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FPSInputCntl[i].OFFSET :=(INPUT_CNTL[i].OFFSET and 31);
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FPSInputCntl[i].USE_DEFAULT:=(INPUT_CNTL[i].OFFSET shr 5)<>0;
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FPSInputCntl[i].DEFAULT_VAL:=(INPUT_CNTL[i].DEFAULT_VAL);
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FPSInputCntl[i].FLAT_SHADE :=(INPUT_CNTL[i].FLAT_SHADE)<>0;
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end;
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end;
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Procedure TSprvEmit.InitCs(RSRC1:TCOMPUTE_PGM_RSRC1;
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RSRC2:TCOMPUTE_PGM_RSRC2;
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NTX:TCOMPUTE_NUM_THREAD_X;
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@ -9,6 +9,7 @@ uses
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spirv,
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ps4_pssl,
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srType,
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srInterface,
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srInput,
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srReg,
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emit_fetch;
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@ -20,6 +21,14 @@ type
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implementation
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const
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DEFAULT_VAL:array[0..3] of Tvec4f=(
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(0.0, 0.0, 0.0, 0.0),
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(0.0, 0.0, 0.0, 1.0),
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(1.0, 1.0, 1.0, 0.0),
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(1.0, 1.0, 1.0, 1.0)
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);
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procedure TEmit_VINTRP.emit_VINTRP;
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var
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inp_M0:PsrInput;
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@ -28,8 +37,39 @@ var
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dst:PsrRegSlot;
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inp_SRC:PsrInput;
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itype:TpsslInputType;
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rsl,elm:PsrRegNode;
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procedure ExportValue(itype:TpsslInputType);
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var
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InputCntl:PPSInputCntl;
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rsl,elm:PsrRegNode;
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begin
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//
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InputCntl:=@FPSInputCntl[FSPI.VINTRP.ATTR];
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if InputCntl^.USE_DEFAULT then
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begin
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elm:=NewReg_s(dtFloat32,DEFAULT_VAL[InputCntl^.DEFAULT_VAL][FSPI.VINTRP.ATTRCHAN]);
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MakeCopy(dst,elm);
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end else
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begin
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//force flat
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if InputCntl^.FLAT_SHADE then
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begin
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itype:=itFlat;
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end;
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//remap id
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rsl:=AddFragLayout(itype,dtVec4f,InputCntl^.OFFSET);
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elm:=dst^.New(line,dtFloat32);
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OpExtract(line,elm,rsl,FSPI.VINTRP.ATTRCHAN);
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end;
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//
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end;
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begin
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Assert(FExecutionModel=ExecutionModel.Fragment); //only pixel shader
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@ -50,7 +90,9 @@ begin
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Assert(inp_SRC<>nil);
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Case inp_SRC^.itype of
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itype:=inp_SRC^.itype;
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Case itype of
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itPerspSample,
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itPerspCenter, //barycentrics with perspective interpolation
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itPerspCentroid,
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@ -63,11 +105,7 @@ begin
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Assert(inp_SRC^.typeid=0); //I
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rsl:=AddFragLayout(inp_SRC^.itype,dtVec4f,FSPI.VINTRP.ATTR);
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elm:=dst^.New(line,dtFloat32);
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OpExtract(line,elm,rsl,FSPI.VINTRP.ATTRCHAN);
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ExportValue(itype);
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end;
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V_INTERP_P2_F32:
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@ -78,7 +116,9 @@ begin
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Assert(inp_SRC<>nil);
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Case inp_SRC^.itype of
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itype:=inp_SRC^.itype;
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Case itype of
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itPerspSample,
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itPerspCenter, //barycentrics with perspective interpolation
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itPerspCentroid,
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@ -91,11 +131,7 @@ begin
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Assert(inp_SRC^.typeid=1); //J
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rsl:=AddFragLayout(inp_SRC^.itype,dtVec4f,FSPI.VINTRP.ATTR);
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elm:=dst^.New(line,dtFloat32);
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OpExtract(line,elm,rsl,FSPI.VINTRP.ATTRCHAN);
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ExportValue(itype);
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end;
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V_INTERP_MOV_F32:
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@ -103,13 +139,13 @@ begin
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//src ignore
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//just use nointerpolation
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inp_SRC:=InputList.Fetch(dtVec4f,itFlat,0);
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inp_SRC:=InputList.Fetch(dtFloat32,itFlat,0);
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rsl:=AddFragLayout(inp_SRC^.itype,dtVec4f,FSPI.VINTRP.ATTR);
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Assert(inp_SRC<>nil);
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elm:=dst^.New(line,dtFloat32);
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itype:=inp_SRC^.itype;
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OpExtract(line,elm,rsl,FSPI.VINTRP.ATTRCHAN);
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ExportValue(itype);
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end;
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@ -372,13 +372,15 @@ begin
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SprvEmit.SetUserData(@GPU_REGS.PS.USER_DATA);
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SprvEmit.SET_SHADER_CONTROL(GPU_REGS.PS.SHADER_CONTROL);
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SprvEmit.SET_INPUT_CNTL (@GPU_REGS.PS.INPUT_CNTL,GPU_REGS.PS.IN_CONTROL.NUM_INTERP);
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end;
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kShaderTypeVsVs:
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begin
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if cfg.FPrintInfo then
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Writeln('USGPR:',GPU_REGS.VS.RSRC2.USER_SGPR,' VGPRS:',GPU_REGS.VS.RSRC1.VGPRS,' SGPRS:',GPU_REGS.VS.RSRC1.SGPRS);
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SprvEmit.InitVs(GPU_REGS.VS.RSRC1,GPU_REGS.VS.RSRC2,GPU_REGS.VGT_NUM_INSTANCES);
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SprvEmit.InitVs(GPU_REGS.VS.RSRC1,GPU_REGS.VS.RSRC2,1,1);
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SprvEmit.SetUserData(@GPU_REGS.VS.USER_DATA);
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end;
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kShaderTypeCs:
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@ -112,6 +112,7 @@ type
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function chain_write:DWORD;
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function GetStorageName:RawByteString;
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function GetTypeChar:Char;
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function GetRw:Char;
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function GetString:RawByteString;
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function GetStructName:RawByteString;
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function GetSize:PtrUint;
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@ -697,6 +698,19 @@ begin
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end;
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end;
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function TsrBuffer.GetRw:Char;
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begin
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Result:='0';
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if (chain_read<>0) then
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begin
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Result:='1';
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end;
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if (chain_write<>0) then
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begin
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Result:=Char(ord(Result) or ord('2'));
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end;
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end;
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function TsrBuffer.GetString:RawByteString;
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var
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PID:DWORD;
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@ -710,7 +724,8 @@ begin
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';PID='+HexStr(PID,8)+
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';BND='+HexStr(FBinding,8)+
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';LEN='+HexStr(GetSize,8)+
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';OFS='+HexStr(align_offset,8);
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';OFS='+HexStr(align_offset,8)+
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';MRW='+GetRw;
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end;
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function TsrBuffer.GetStructName:RawByteString;
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@ -46,10 +46,19 @@ type
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foDepthUnchanged
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);
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PPSInputCntl=^TPSInputCntl;
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TPSInputCntl=packed record
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OFFSET :Byte;
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USE_DEFAULT:Boolean;
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DEFAULT_VAL:Byte;
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FLAT_SHADE :Boolean;
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end;
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TEmitInterface=class(TCustomEmit)
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FExecutionModel:Word;
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FDepthMode:TDepthMode;
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FEarlyFragmentTests:Boolean;
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FPSInputCntl:array[0..31] of TPSInputCntl;
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FLocalSize:TLocalSize;
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Config:TsrConfig;
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//
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@ -66,6 +66,7 @@ type
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function pReg:PsrRegUniform; inline;
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function GetStorageName:RawByteString;
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function GetTypeChar:String2;
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function GetRw:Char;
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function GetString:RawByteString;
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end;
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@ -255,6 +256,19 @@ begin
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end;
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end;
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function TsrUniform.GetRw:Char;
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begin
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Result:='0';
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if (FReg.read_count<>0) then
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begin
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Result:='1';
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end;
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if (FReg.write_count<>0) then
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begin
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Result:=Char(ord(Result) or ord('2'));
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end;
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end;
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function TsrUniform.GetString:RawByteString;
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var
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PID:DWORD;
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@ -266,7 +280,8 @@ begin
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end;
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Result:=GetTypeChar+
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';PID='+HexStr(PID,8)+
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';BND='+HexStr(FBinding,8);
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';BND='+HexStr(FBinding,8)+
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';MRW='+GetRw;
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end;
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procedure TsrUniformList.Init(Emit:TCustomEmit); inline;
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@ -15,8 +15,8 @@ uses
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vShader,
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vImage,
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vSetLayoutManager,
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vPipelineLayoutManager{,
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vSetsPoolManager};
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vPipelineLayoutManager,
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si_ci_vi_merged_registers;
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type
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@ -45,6 +45,7 @@ type
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bind :DWORD;
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size :DWORD;
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offset:DWORD;
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flags :DWORD;
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addr :ADataLayout;
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end;
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@ -72,6 +73,8 @@ type
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procedure OnFuncLayout(P:PChar);
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end;
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A_INPUT_CNTL=array[0..31] of TSPI_PS_INPUT_CNTL_0;
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TvShaderExt=class(TvShader)
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FDescSetId:Integer;
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@ -89,10 +92,16 @@ type
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FShaderFuncs:AShaderFuncKey;
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FInstance:record
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FParams:record
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VGPR_COMP_CNT:Byte;
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//
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NUM_INTERP:Byte;
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STEP_RATE_0:DWORD;
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STEP_RATE_1:DWORD;
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//
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SHADER_CONTROL:TDB_SHADER_CONTROL;
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INPUT_CNTL :A_INPUT_CNTL;
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end;
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procedure ClearInfo; override;
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@ -105,22 +114,25 @@ type
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function GetLayoutAddr(parent:DWORD):ADataLayout;
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Procedure AddVertLayout(parent,bind:DWORD);
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Procedure EnumVertLayout(cb:TvCustomLayoutCb;Fset:TVkUInt32;FData:PDWORD);
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Procedure AddBuffLayout(dtype:TVkDescriptorType;parent,bind,size,offset:DWORD);
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Procedure AddBuffLayout(dtype:TVkDescriptorType;parent,bind,size,offset,flags:DWORD);
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Procedure SetPushConst(parent,size:DWORD);
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Function GetPushConstData(pUserData:Pointer):Pointer;
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Procedure AddUnifLayout(dtype:TVkDescriptorType;parent,bind:DWORD);
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Procedure AddUnifLayout(dtype:TVkDescriptorType;parent,bind,flags:DWORD);
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Procedure EnumUnifLayout(cb:TvCustomLayoutCb;Fset:TVkUInt32;FData:PDWORD);
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Procedure AddFuncLayout(parent,size:DWORD);
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Procedure EnumFuncLayout(cb:TvCustomLayoutCb;Fset:TVkUInt32;FData:PDWORD);
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procedure FreeShaderFuncs;
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Procedure PreloadShaderFuncs(pUserData:Pointer);
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Procedure SetInstance(VGPR_COMP_CNT:Byte;STEP_RATE_0,STEP_RATE_1:DWORD);
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Procedure SetInstance (VGPR_COMP_CNT:Byte;STEP_RATE_0,STEP_RATE_1:DWORD);
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Procedure SET_SHADER_CONTROL(const SHADER_CONTROL:TDB_SHADER_CONTROL);
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Procedure SET_INPUT_CNTL (const INPUT_CNTL:A_INPUT_CNTL;NUM_INTERP:Byte);
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end;
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TBufBindExt=packed record
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fset :TVkUInt32;
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bind :TVkUInt32;
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offset:TVkUInt32;
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memuse:TVkUInt32;
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addr :Pointer;
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size :TVkUInt32;
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|
|
@ -146,8 +158,8 @@ type
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FImages :array of TImageBindExt;
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FSamplers:array of TSamplerBindExt;
|
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Procedure AddVSharp(PV:PVSharpResource4;fset,bind,offset:DWord);
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Procedure AddBufPtr(P:Pointer;fset,size,bind,offset:DWord);
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Procedure AddVSharp(PV:PVSharpResource4;fset,bind,offset,flags:DWord);
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Procedure AddBufPtr(P:Pointer;fset,size,bind,offset,flags:DWord);
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|
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Procedure AddTSharp4(PT:PTSharpResource4;fset,bind:DWord);
|
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Procedure AddTSharp8(PT:PTSharpResource8;fset,bind:DWord);
|
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|
|
@ -366,6 +378,14 @@ begin
|
|||
Val(s,Result,Error);
|
||||
end;
|
||||
|
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function _get_hex_char(P:PChar):DWord;
|
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begin
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case P^ of
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'0'..'9':Result:=ord(P^)-ord('0');
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'A'..'F':Result:=ord(P^)-ord('A')+$A;
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end;
|
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end;
|
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|
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Procedure AddToCustomLayout(var A:ACustomLayout;const v:TvCustomLayout);
|
||||
var
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i:Integer;
|
||||
|
|
@ -400,7 +420,8 @@ begin
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|||
'B':OnBuffLayout(P);
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'U':OnUnifLayout(P);
|
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'F':OnFuncLayout(P);
|
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else;
|
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else
|
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Assert(false,'TODO OnSourceExtension:"'+P^+'"');
|
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end;
|
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end;
|
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|
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|
|
@ -495,7 +516,7 @@ begin
|
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end;
|
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end;
|
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|
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Procedure TvShaderExt.AddBuffLayout(dtype:TVkDescriptorType;parent,bind,size,offset:DWORD);
|
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Procedure TvShaderExt.AddBuffLayout(dtype:TVkDescriptorType;parent,bind,size,offset,flags:DWORD);
|
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var
|
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v:TvCustomLayout;
|
||||
begin
|
||||
|
|
@ -511,11 +532,12 @@ begin
|
|||
end;
|
||||
|
||||
v:=Default(TvCustomLayout);
|
||||
v.dtype:=ord(dtype);
|
||||
v.bind:=bind;
|
||||
v.size:=size;
|
||||
v.dtype :=ord(dtype);
|
||||
v.bind :=bind;
|
||||
v.size :=size;
|
||||
v.offset:=offset;
|
||||
v.addr:=GetLayoutAddr(parent);
|
||||
v.flags :=flags;
|
||||
v.addr :=GetLayoutAddr(parent);
|
||||
|
||||
AddToCustomLayout(FUnifLayouts,v);
|
||||
end;
|
||||
|
|
@ -527,9 +549,9 @@ begin
|
|||
FPushConst.addr:=GetLayoutAddr(parent)
|
||||
end;
|
||||
|
||||
//BS;PID=00000002;BND=00000001;LEN=FFFFFFFF;OFS=00000000"
|
||||
//0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF
|
||||
//0 1 2
|
||||
//BS;PID=00000002;BND=00000001;LEN=FFFFFFFF;OFS=00000000;MRW=1"
|
||||
//0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789AB
|
||||
//0 1 2 3
|
||||
procedure TvShaderParserExt.OnBuffLayout(P:PChar);
|
||||
begin
|
||||
with TvShaderExt(FOwner) do
|
||||
|
|
@ -539,12 +561,14 @@ begin
|
|||
_get_hex_dword(@P[7]),
|
||||
_get_hex_dword(@P[$14]),
|
||||
_get_hex_dword(@P[$21]),
|
||||
_get_hex_dword(@P[$2E]));
|
||||
_get_hex_dword(@P[$2E]),
|
||||
_get_hex_char (@P[$3B]));
|
||||
'S':AddBuffLayout(VK_DESCRIPTOR_TYPE_STORAGE_BUFFER,
|
||||
_get_hex_dword(@P[7]),
|
||||
_get_hex_dword(@P[$14]),
|
||||
_get_hex_dword(@P[$21]),
|
||||
_get_hex_dword(@P[$2E]));
|
||||
_get_hex_dword(@P[$2E]),
|
||||
_get_hex_char (@P[$3B]));
|
||||
else;
|
||||
end;
|
||||
end;
|
||||
|
|
@ -567,24 +591,36 @@ begin
|
|||
|
||||
end;
|
||||
|
||||
Procedure TvShaderExt.AddUnifLayout(dtype:TVkDescriptorType;parent,bind:DWORD);
|
||||
Procedure TvShaderExt.AddUnifLayout(dtype:TVkDescriptorType;parent,bind,flags:DWORD);
|
||||
var
|
||||
v:TvCustomLayout;
|
||||
begin
|
||||
v:=Default(TvCustomLayout);
|
||||
v.dtype:=ord(dtype);
|
||||
v.bind:=bind;
|
||||
v.addr:=GetLayoutAddr(parent);
|
||||
v.bind :=bind;
|
||||
v.flags:=flags;
|
||||
v.addr :=GetLayoutAddr(parent);
|
||||
|
||||
AddToCustomLayout(FUnifLayouts,v);
|
||||
end;
|
||||
|
||||
//UI;PID=00000001;BND=00000000;MRW=1
|
||||
//US;PID=00000002;BND=00000001;MRW=1
|
||||
//0123456789ABCDEF0123456789ABCDEF01
|
||||
//0 1 2
|
||||
|
||||
procedure TvShaderParserExt.OnUnifLayout(P:PChar);
|
||||
begin
|
||||
with TvShaderExt(FOwner) do
|
||||
Case P[1] of
|
||||
'I':AddUnifLayout(VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,_get_hex_dword(@P[7]),_get_hex_dword(@P[$14]));
|
||||
'S':AddUnifLayout(VK_DESCRIPTOR_TYPE_SAMPLER ,_get_hex_dword(@P[7]),_get_hex_dword(@P[$14]));
|
||||
'I':AddUnifLayout(VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
|
||||
_get_hex_dword(@P[7]),
|
||||
_get_hex_dword(@P[$14]),
|
||||
_get_hex_char (@P[$21]));
|
||||
'S':AddUnifLayout(VK_DESCRIPTOR_TYPE_SAMPLER,
|
||||
_get_hex_dword(@P[7]),
|
||||
_get_hex_dword(@P[$14]),
|
||||
_get_hex_char (@P[$21]));
|
||||
else;
|
||||
end;
|
||||
end;
|
||||
|
|
@ -674,20 +710,33 @@ end;
|
|||
|
||||
Procedure TvShaderExt.SetInstance(VGPR_COMP_CNT:Byte;STEP_RATE_0,STEP_RATE_1:DWORD);
|
||||
begin
|
||||
FInstance.VGPR_COMP_CNT:=VGPR_COMP_CNT;
|
||||
FParams.VGPR_COMP_CNT:=VGPR_COMP_CNT;
|
||||
|
||||
if (VGPR_COMP_CNT>=1) then
|
||||
begin
|
||||
FInstance.STEP_RATE_0:=STEP_RATE_0;
|
||||
FParams.STEP_RATE_0:=STEP_RATE_0;
|
||||
end;
|
||||
|
||||
if (VGPR_COMP_CNT>=2) then
|
||||
begin
|
||||
FInstance.STEP_RATE_1:=STEP_RATE_1;
|
||||
FParams.STEP_RATE_1:=STEP_RATE_1;
|
||||
end;
|
||||
|
||||
end;
|
||||
|
||||
Procedure TvShaderExt.SET_SHADER_CONTROL(const SHADER_CONTROL:TDB_SHADER_CONTROL);
|
||||
begin
|
||||
FParams.SHADER_CONTROL:=SHADER_CONTROL;
|
||||
end;
|
||||
|
||||
Procedure TvShaderExt.SET_INPUT_CNTL(const INPUT_CNTL:A_INPUT_CNTL;NUM_INTERP:Byte);
|
||||
begin
|
||||
FParams.NUM_INTERP:=NUM_INTERP;
|
||||
|
||||
Move(INPUT_CNTL,FParams.INPUT_CNTL,SizeOf(TSPI_PS_INPUT_CNTL_0)*NUM_INTERP);
|
||||
end;
|
||||
|
||||
|
||||
///
|
||||
|
||||
function GetSharpByPatch(pData:Pointer;const addr:ADataLayout):Pointer;
|
||||
|
|
@ -922,7 +971,13 @@ end;
|
|||
|
||||
//
|
||||
|
||||
Procedure TvUniformBuilder.AddVSharp(PV:PVSharpResource4;fset,bind,offset:DWord);
|
||||
function _get_buf_mem_usage(b:Byte):Byte; inline;
|
||||
begin
|
||||
Result:=((b and 1)*TM_READ) or
|
||||
(((b shr 1) and 1)*TM_WRITE);
|
||||
end;
|
||||
|
||||
Procedure TvUniformBuilder.AddVSharp(PV:PVSharpResource4;fset,bind,offset,flags:DWord);
|
||||
var
|
||||
b:TBufBindExt;
|
||||
i,stride,num_records:Integer;
|
||||
|
|
@ -936,6 +991,7 @@ begin
|
|||
b.fset:=fset;
|
||||
b.bind:=bind;
|
||||
b.offset:=offset;
|
||||
b.memuse:=_get_buf_mem_usage(flags);
|
||||
|
||||
b.addr:=Pointer(PV^.base);
|
||||
|
||||
|
|
@ -950,7 +1006,7 @@ begin
|
|||
FBuffers[i]:=b;
|
||||
end;
|
||||
|
||||
Procedure TvUniformBuilder.AddBufPtr(P:Pointer;fset,size,bind,offset:DWord);
|
||||
Procedure TvUniformBuilder.AddBufPtr(P:Pointer;fset,size,bind,offset,flags:DWord);
|
||||
var
|
||||
b:TBufBindExt;
|
||||
i:Integer;
|
||||
|
|
@ -962,6 +1018,7 @@ begin
|
|||
b.fset:=fset;
|
||||
b.bind:=bind;
|
||||
b.offset:=offset;
|
||||
b.memuse:=_get_buf_mem_usage(flags);
|
||||
|
||||
b.addr:=P;
|
||||
b.size:=size;
|
||||
|
|
@ -1043,8 +1100,8 @@ begin
|
|||
VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
|
||||
Case b.addr[0].rtype of
|
||||
vtRoot,
|
||||
vtBufPtr2:AddBufPtr(P,Fset,b.size,b.bind,b.offset);
|
||||
vtVSharp4:AddVSharp(P,Fset,b.bind,b.offset);
|
||||
vtBufPtr2:AddBufPtr(P,Fset,b.size,b.bind,b.offset,b.flags);
|
||||
vtVSharp4:AddVSharp(P,Fset,b.bind,b.offset,b.flags);
|
||||
else
|
||||
Assert(false);
|
||||
end;
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@ uses
|
|||
vRegs2Vulkan,
|
||||
shader_dump,
|
||||
|
||||
//ps4_program,
|
||||
si_ci_vi_merged_registers,
|
||||
|
||||
vDevice,
|
||||
|
||||
|
|
@ -299,6 +299,8 @@ begin
|
|||
SprvEmit.SetUserData(GPU_REGS.get_user_data(FStage));
|
||||
|
||||
SprvEmit.SET_SHADER_CONTROL(GPU_REGS.CX_REG^.DB_SHADER_CONTROL);
|
||||
SprvEmit.SET_INPUT_CNTL (GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL,
|
||||
GPU_REGS.CX_REG^.SPI_PS_IN_CONTROL.NUM_INTERP);
|
||||
end;
|
||||
vShaderStageVs:
|
||||
begin
|
||||
|
|
@ -399,21 +401,36 @@ begin
|
|||
|
||||
VGPR_COMP_CNT:=GPU_REGS.SH_REG^.SPI_SHADER_PGM_RSRC1_VS.VGPR_COMP_CNT;
|
||||
|
||||
if (FShader.FInstance.VGPR_COMP_CNT<>VGPR_COMP_CNT) then Exit(False);
|
||||
if (FShader.FParams.VGPR_COMP_CNT<>VGPR_COMP_CNT) then Exit(False);
|
||||
|
||||
if (VGPR_COMP_CNT>=1) then
|
||||
begin
|
||||
if (FShader.FInstance.STEP_RATE_0<>GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_0) then Exit(False);
|
||||
if (FShader.FParams.STEP_RATE_0<>GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_0) then Exit(False);
|
||||
end;
|
||||
|
||||
if (VGPR_COMP_CNT>=2) then
|
||||
begin
|
||||
if (FShader.FInstance.STEP_RATE_1<>GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_1) then Exit(False);
|
||||
if (FShader.FParams.STEP_RATE_1<>GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_1) then Exit(False);
|
||||
end;
|
||||
|
||||
Result:=True;
|
||||
end;
|
||||
|
||||
function test_ps_params(FShader:TvShaderExt;FStage:TvShaderStage;var GPU_REGS:TGPU_REGS):Boolean;
|
||||
begin
|
||||
if (FStage<>vShaderStagePs) then Exit(True);
|
||||
|
||||
if (DWORD(FShader.FParams.SHADER_CONTROL)<>DWORD(GPU_REGS.CX_REG^.DB_SHADER_CONTROL)) then Exit(False);
|
||||
|
||||
if (FShader.FParams.NUM_INTERP<>GPU_REGS.CX_REG^.SPI_PS_IN_CONTROL.NUM_INTERP) then Exit(False);
|
||||
|
||||
if (CompareByte(FShader.FParams.INPUT_CNTL,
|
||||
GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL,
|
||||
SizeOf(TSPI_PS_INPUT_CNTL_0)*FShader.FParams.NUM_INTERP)<>0) then Exit(False);
|
||||
|
||||
Result:=True;
|
||||
end;
|
||||
|
||||
function test_unif(FShader:TvShaderExt;FDescSetId:Integer;pUserData:Pointer):Boolean;
|
||||
var
|
||||
ch:TvBufOffsetChecker;
|
||||
|
|
@ -484,6 +501,7 @@ begin
|
|||
|
||||
if test_func(FShader,pUserData) then
|
||||
if test_instance(FShader,FStage,GPU_REGS) then
|
||||
if test_ps_params(FShader,FStage,GPU_REGS) then
|
||||
if test_unif(FShader,FDescSetId,pUserData) then //Checking offsets within a shader
|
||||
if test_push_const(FShader,pc_offset,pc_size) then
|
||||
begin
|
||||
|
|
@ -505,11 +523,21 @@ begin
|
|||
|
||||
FShader:=t.AddShader(FDescSetId,M,pUserData);
|
||||
|
||||
if (FStage=vShaderStageVs) then
|
||||
begin
|
||||
FShader.SetInstance(GPU_REGS.SH_REG^.SPI_SHADER_PGM_RSRC1_VS.VGPR_COMP_CNT,
|
||||
GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_0,
|
||||
GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_1);
|
||||
case FStage of
|
||||
vShaderStageVs:
|
||||
begin
|
||||
FShader.SetInstance(GPU_REGS.SH_REG^.SPI_SHADER_PGM_RSRC1_VS.VGPR_COMP_CNT,
|
||||
GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_0,
|
||||
GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_1);
|
||||
end;
|
||||
vShaderStagePs:
|
||||
begin
|
||||
FShader.SET_SHADER_CONTROL(GPU_REGS.CX_REG^.DB_SHADER_CONTROL);
|
||||
FShader.SET_INPUT_CNTL (GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL,
|
||||
GPU_REGS.CX_REG^.SPI_PS_IN_CONTROL.NUM_INTERP);
|
||||
|
||||
end;
|
||||
else;
|
||||
end;
|
||||
|
||||
DumpSpv(FStage,M);
|
||||
|
|
|
|||
Loading…
Reference in New Issue