diff --git a/chip/pm4_me.pas b/chip/pm4_me.pas index 769442e7..8be92606 100644 --- a/chip/pm4_me.pas +++ b/chip/pm4_me.pas @@ -814,8 +814,10 @@ begin diff, range {VK_WHOLE_SIZE}); - //TODO: check write flag - ctx.Cmd.AddPlannedTrigger(QWORD(addr),QWORD(addr)+size,nil) + if ((memuse and TM_WRITE)<>0) then + begin + ctx.Cmd.AddPlannedTrigger(QWORD(addr),QWORD(addr)+size,nil); + end; end; end; diff --git a/chip/pm4_stream.pas b/chip/pm4_stream.pas index e25f941c..7fe88ba7 100644 --- a/chip/pm4_stream.pas +++ b/chip/pm4_stream.pas @@ -1083,11 +1083,10 @@ begin With FUniformBuilder.FBuffers[i] do begin - //TODO: check write flag insert_buffer_resource(@node^.scope, addr, size, - TM_READ or TM_WRITE); + memuse); end; end; @@ -1105,12 +1104,6 @@ var begin for i:=0 to 31 do begin - if (GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].OFFSET<>0) and (GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].OFFSET<>i) then - begin - Assert(false, 'SPI_PS_INPUT_CNTL['+IntToStr(i)+'].OFFSET=' +IntToStr(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].OFFSET )); - end; - Assert(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].DEFAULT_VAL =0,'SPI_PS_INPUT_CNTL['+IntToStr(i)+'].DEFAULT_VAL=' +IntToStr(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].DEFAULT_VAL )); - Assert(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].FLAT_SHADE =0,'SPI_PS_INPUT_CNTL['+IntToStr(i)+'].FLAT_SHADE=' +IntToStr(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].FLAT_SHADE )); Assert(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].FP16_INTERP_MODE=0,'SPI_PS_INPUT_CNTL['+IntToStr(i)+'].FP16_INTERP_MODE='+IntToStr(GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL[i].FP16_INTERP_MODE)); end; diff --git a/spirv/SprvEmit.pas b/spirv/SprvEmit.pas index 117c8f19..c3cf23bf 100644 --- a/spirv/SprvEmit.pas +++ b/spirv/SprvEmit.pas @@ -28,6 +28,8 @@ uses emit_bin; type + PSPI_PS_INPUT_CNTL_0=^TSPI_PS_INPUT_CNTL_0; + TSprvEmit=class(TEmitFetch) function NewMain:PSpirvFunc; @@ -47,6 +49,7 @@ type ENA:TSPI_PS_INPUT_ENA); Procedure SET_SHADER_CONTROL(const SHADER_CONTROL:TDB_SHADER_CONTROL); + Procedure SET_INPUT_CNTL (INPUT_CNTL:PSPI_PS_INPUT_CNTL_0;NUM_INTERP:Byte); Procedure InitCs(RSRC1:TCOMPUTE_PGM_RSRC1; RSRC2:TCOMPUTE_PGM_RSRC2; @@ -448,6 +451,20 @@ begin FEarlyFragmentTests:=(SHADER_CONTROL.DEPTH_BEFORE_SHADER<>0); end; +Procedure TSprvEmit.SET_INPUT_CNTL(INPUT_CNTL:PSPI_PS_INPUT_CNTL_0;NUM_INTERP:Byte); +var + i:Byte; +begin + if (NUM_INTERP<>0) then + for i:=0 to NUM_INTERP-1 do + begin + FPSInputCntl[i].OFFSET :=(INPUT_CNTL[i].OFFSET and 31); + FPSInputCntl[i].USE_DEFAULT:=(INPUT_CNTL[i].OFFSET shr 5)<>0; + FPSInputCntl[i].DEFAULT_VAL:=(INPUT_CNTL[i].DEFAULT_VAL); + FPSInputCntl[i].FLAT_SHADE :=(INPUT_CNTL[i].FLAT_SHADE)<>0; + end; +end; + Procedure TSprvEmit.InitCs(RSRC1:TCOMPUTE_PGM_RSRC1; RSRC2:TCOMPUTE_PGM_RSRC2; NTX:TCOMPUTE_NUM_THREAD_X; diff --git a/spirv/emit_vintrp.pas b/spirv/emit_vintrp.pas index 78749061..f84bbc63 100644 --- a/spirv/emit_vintrp.pas +++ b/spirv/emit_vintrp.pas @@ -9,6 +9,7 @@ uses spirv, ps4_pssl, srType, + srInterface, srInput, srReg, emit_fetch; @@ -20,6 +21,14 @@ type implementation +const + DEFAULT_VAL:array[0..3] of Tvec4f=( + (0.0, 0.0, 0.0, 0.0), + (0.0, 0.0, 0.0, 1.0), + (1.0, 1.0, 1.0, 0.0), + (1.0, 1.0, 1.0, 1.0) + ); + procedure TEmit_VINTRP.emit_VINTRP; var inp_M0:PsrInput; @@ -28,8 +37,39 @@ var dst:PsrRegSlot; inp_SRC:PsrInput; + itype:TpsslInputType; - rsl,elm:PsrRegNode; + procedure ExportValue(itype:TpsslInputType); + var + InputCntl:PPSInputCntl; + + rsl,elm:PsrRegNode; + begin + // + InputCntl:=@FPSInputCntl[FSPI.VINTRP.ATTR]; + + if InputCntl^.USE_DEFAULT then + begin + elm:=NewReg_s(dtFloat32,DEFAULT_VAL[InputCntl^.DEFAULT_VAL][FSPI.VINTRP.ATTRCHAN]); + + MakeCopy(dst,elm); + end else + begin + //force flat + if InputCntl^.FLAT_SHADE then + begin + itype:=itFlat; + end; + + //remap id + rsl:=AddFragLayout(itype,dtVec4f,InputCntl^.OFFSET); + + elm:=dst^.New(line,dtFloat32); + + OpExtract(line,elm,rsl,FSPI.VINTRP.ATTRCHAN); + end; + // + end; begin Assert(FExecutionModel=ExecutionModel.Fragment); //only pixel shader @@ -50,7 +90,9 @@ begin Assert(inp_SRC<>nil); - Case inp_SRC^.itype of + itype:=inp_SRC^.itype; + + Case itype of itPerspSample, itPerspCenter, //barycentrics with perspective interpolation itPerspCentroid, @@ -63,11 +105,7 @@ begin Assert(inp_SRC^.typeid=0); //I - rsl:=AddFragLayout(inp_SRC^.itype,dtVec4f,FSPI.VINTRP.ATTR); - - elm:=dst^.New(line,dtFloat32); - - OpExtract(line,elm,rsl,FSPI.VINTRP.ATTRCHAN); + ExportValue(itype); end; V_INTERP_P2_F32: @@ -78,7 +116,9 @@ begin Assert(inp_SRC<>nil); - Case inp_SRC^.itype of + itype:=inp_SRC^.itype; + + Case itype of itPerspSample, itPerspCenter, //barycentrics with perspective interpolation itPerspCentroid, @@ -91,11 +131,7 @@ begin Assert(inp_SRC^.typeid=1); //J - rsl:=AddFragLayout(inp_SRC^.itype,dtVec4f,FSPI.VINTRP.ATTR); - - elm:=dst^.New(line,dtFloat32); - - OpExtract(line,elm,rsl,FSPI.VINTRP.ATTRCHAN); + ExportValue(itype); end; V_INTERP_MOV_F32: @@ -103,13 +139,13 @@ begin //src ignore //just use nointerpolation - inp_SRC:=InputList.Fetch(dtVec4f,itFlat,0); + inp_SRC:=InputList.Fetch(dtFloat32,itFlat,0); - rsl:=AddFragLayout(inp_SRC^.itype,dtVec4f,FSPI.VINTRP.ATTR); + Assert(inp_SRC<>nil); - elm:=dst^.New(line,dtFloat32); + itype:=inp_SRC^.itype; - OpExtract(line,elm,rsl,FSPI.VINTRP.ATTRCHAN); + ExportValue(itype); end; diff --git a/spirv/pssl-spirv.lpr b/spirv/pssl-spirv.lpr index 91d89e8d..df368dbc 100644 --- a/spirv/pssl-spirv.lpr +++ b/spirv/pssl-spirv.lpr @@ -372,13 +372,15 @@ begin SprvEmit.SetUserData(@GPU_REGS.PS.USER_DATA); SprvEmit.SET_SHADER_CONTROL(GPU_REGS.PS.SHADER_CONTROL); + SprvEmit.SET_INPUT_CNTL (@GPU_REGS.PS.INPUT_CNTL,GPU_REGS.PS.IN_CONTROL.NUM_INTERP); end; kShaderTypeVsVs: begin if cfg.FPrintInfo then Writeln('USGPR:',GPU_REGS.VS.RSRC2.USER_SGPR,' VGPRS:',GPU_REGS.VS.RSRC1.VGPRS,' SGPRS:',GPU_REGS.VS.RSRC1.SGPRS); - SprvEmit.InitVs(GPU_REGS.VS.RSRC1,GPU_REGS.VS.RSRC2,GPU_REGS.VGT_NUM_INSTANCES); + SprvEmit.InitVs(GPU_REGS.VS.RSRC1,GPU_REGS.VS.RSRC2,1,1); + SprvEmit.SetUserData(@GPU_REGS.VS.USER_DATA); end; kShaderTypeCs: diff --git a/spirv/srBuffer.pas b/spirv/srBuffer.pas index 143b4d29..fd8c106f 100644 --- a/spirv/srBuffer.pas +++ b/spirv/srBuffer.pas @@ -112,6 +112,7 @@ type function chain_write:DWORD; function GetStorageName:RawByteString; function GetTypeChar:Char; + function GetRw:Char; function GetString:RawByteString; function GetStructName:RawByteString; function GetSize:PtrUint; @@ -697,6 +698,19 @@ begin end; end; +function TsrBuffer.GetRw:Char; +begin + Result:='0'; + if (chain_read<>0) then + begin + Result:='1'; + end; + if (chain_write<>0) then + begin + Result:=Char(ord(Result) or ord('2')); + end; +end; + function TsrBuffer.GetString:RawByteString; var PID:DWORD; @@ -710,7 +724,8 @@ begin ';PID='+HexStr(PID,8)+ ';BND='+HexStr(FBinding,8)+ ';LEN='+HexStr(GetSize,8)+ - ';OFS='+HexStr(align_offset,8); + ';OFS='+HexStr(align_offset,8)+ + ';MRW='+GetRw; end; function TsrBuffer.GetStructName:RawByteString; diff --git a/spirv/srInterface.pas b/spirv/srInterface.pas index 1cbe9cab..fa75a546 100644 --- a/spirv/srInterface.pas +++ b/spirv/srInterface.pas @@ -46,10 +46,19 @@ type foDepthUnchanged ); + PPSInputCntl=^TPSInputCntl; + TPSInputCntl=packed record + OFFSET :Byte; + USE_DEFAULT:Boolean; + DEFAULT_VAL:Byte; + FLAT_SHADE :Boolean; + end; + TEmitInterface=class(TCustomEmit) FExecutionModel:Word; FDepthMode:TDepthMode; FEarlyFragmentTests:Boolean; + FPSInputCntl:array[0..31] of TPSInputCntl; FLocalSize:TLocalSize; Config:TsrConfig; // diff --git a/spirv/srUniform.pas b/spirv/srUniform.pas index 933baffe..a4903f3c 100644 --- a/spirv/srUniform.pas +++ b/spirv/srUniform.pas @@ -66,6 +66,7 @@ type function pReg:PsrRegUniform; inline; function GetStorageName:RawByteString; function GetTypeChar:String2; + function GetRw:Char; function GetString:RawByteString; end; @@ -255,6 +256,19 @@ begin end; end; +function TsrUniform.GetRw:Char; +begin + Result:='0'; + if (FReg.read_count<>0) then + begin + Result:='1'; + end; + if (FReg.write_count<>0) then + begin + Result:=Char(ord(Result) or ord('2')); + end; +end; + function TsrUniform.GetString:RawByteString; var PID:DWORD; @@ -266,7 +280,8 @@ begin end; Result:=GetTypeChar+ ';PID='+HexStr(PID,8)+ - ';BND='+HexStr(FBinding,8); + ';BND='+HexStr(FBinding,8)+ + ';MRW='+GetRw; end; procedure TsrUniformList.Init(Emit:TCustomEmit); inline; diff --git a/vulkan/vShaderExt.pas b/vulkan/vShaderExt.pas index b671b5df..87478d3a 100644 --- a/vulkan/vShaderExt.pas +++ b/vulkan/vShaderExt.pas @@ -15,8 +15,8 @@ uses vShader, vImage, vSetLayoutManager, - vPipelineLayoutManager{, - vSetsPoolManager}; + vPipelineLayoutManager, + si_ci_vi_merged_registers; type @@ -45,6 +45,7 @@ type bind :DWORD; size :DWORD; offset:DWORD; + flags :DWORD; addr :ADataLayout; end; @@ -72,6 +73,8 @@ type procedure OnFuncLayout(P:PChar); end; + A_INPUT_CNTL=array[0..31] of TSPI_PS_INPUT_CNTL_0; + TvShaderExt=class(TvShader) FDescSetId:Integer; @@ -89,10 +92,16 @@ type FShaderFuncs:AShaderFuncKey; - FInstance:record + FParams:record VGPR_COMP_CNT:Byte; + // + NUM_INTERP:Byte; + STEP_RATE_0:DWORD; STEP_RATE_1:DWORD; + // + SHADER_CONTROL:TDB_SHADER_CONTROL; + INPUT_CNTL :A_INPUT_CNTL; end; procedure ClearInfo; override; @@ -105,22 +114,25 @@ type function GetLayoutAddr(parent:DWORD):ADataLayout; Procedure AddVertLayout(parent,bind:DWORD); Procedure EnumVertLayout(cb:TvCustomLayoutCb;Fset:TVkUInt32;FData:PDWORD); - Procedure AddBuffLayout(dtype:TVkDescriptorType;parent,bind,size,offset:DWORD); + Procedure AddBuffLayout(dtype:TVkDescriptorType;parent,bind,size,offset,flags:DWORD); Procedure SetPushConst(parent,size:DWORD); Function GetPushConstData(pUserData:Pointer):Pointer; - Procedure AddUnifLayout(dtype:TVkDescriptorType;parent,bind:DWORD); + Procedure AddUnifLayout(dtype:TVkDescriptorType;parent,bind,flags:DWORD); Procedure EnumUnifLayout(cb:TvCustomLayoutCb;Fset:TVkUInt32;FData:PDWORD); Procedure AddFuncLayout(parent,size:DWORD); Procedure EnumFuncLayout(cb:TvCustomLayoutCb;Fset:TVkUInt32;FData:PDWORD); procedure FreeShaderFuncs; Procedure PreloadShaderFuncs(pUserData:Pointer); - Procedure SetInstance(VGPR_COMP_CNT:Byte;STEP_RATE_0,STEP_RATE_1:DWORD); + Procedure SetInstance (VGPR_COMP_CNT:Byte;STEP_RATE_0,STEP_RATE_1:DWORD); + Procedure SET_SHADER_CONTROL(const SHADER_CONTROL:TDB_SHADER_CONTROL); + Procedure SET_INPUT_CNTL (const INPUT_CNTL:A_INPUT_CNTL;NUM_INTERP:Byte); end; TBufBindExt=packed record fset :TVkUInt32; bind :TVkUInt32; offset:TVkUInt32; + memuse:TVkUInt32; addr :Pointer; size :TVkUInt32; @@ -146,8 +158,8 @@ type FImages :array of TImageBindExt; FSamplers:array of TSamplerBindExt; - Procedure AddVSharp(PV:PVSharpResource4;fset,bind,offset:DWord); - Procedure AddBufPtr(P:Pointer;fset,size,bind,offset:DWord); + Procedure AddVSharp(PV:PVSharpResource4;fset,bind,offset,flags:DWord); + Procedure AddBufPtr(P:Pointer;fset,size,bind,offset,flags:DWord); Procedure AddTSharp4(PT:PTSharpResource4;fset,bind:DWord); Procedure AddTSharp8(PT:PTSharpResource8;fset,bind:DWord); @@ -366,6 +378,14 @@ begin Val(s,Result,Error); end; +function _get_hex_char(P:PChar):DWord; +begin + case P^ of + '0'..'9':Result:=ord(P^)-ord('0'); + 'A'..'F':Result:=ord(P^)-ord('A')+$A; + end; +end; + Procedure AddToCustomLayout(var A:ACustomLayout;const v:TvCustomLayout); var i:Integer; @@ -400,7 +420,8 @@ begin 'B':OnBuffLayout(P); 'U':OnUnifLayout(P); 'F':OnFuncLayout(P); - else; + else + Assert(false,'TODO OnSourceExtension:"'+P^+'"'); end; end; @@ -495,7 +516,7 @@ begin end; end; -Procedure TvShaderExt.AddBuffLayout(dtype:TVkDescriptorType;parent,bind,size,offset:DWORD); +Procedure TvShaderExt.AddBuffLayout(dtype:TVkDescriptorType;parent,bind,size,offset,flags:DWORD); var v:TvCustomLayout; begin @@ -511,11 +532,12 @@ begin end; v:=Default(TvCustomLayout); - v.dtype:=ord(dtype); - v.bind:=bind; - v.size:=size; + v.dtype :=ord(dtype); + v.bind :=bind; + v.size :=size; v.offset:=offset; - v.addr:=GetLayoutAddr(parent); + v.flags :=flags; + v.addr :=GetLayoutAddr(parent); AddToCustomLayout(FUnifLayouts,v); end; @@ -527,9 +549,9 @@ begin FPushConst.addr:=GetLayoutAddr(parent) end; -//BS;PID=00000002;BND=00000001;LEN=FFFFFFFF;OFS=00000000" -//0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF -//0 1 2 +//BS;PID=00000002;BND=00000001;LEN=FFFFFFFF;OFS=00000000;MRW=1" +//0123456789ABCDEF0123456789ABCDEF0123456789ABCDEF0123456789AB +//0 1 2 3 procedure TvShaderParserExt.OnBuffLayout(P:PChar); begin with TvShaderExt(FOwner) do @@ -539,12 +561,14 @@ begin _get_hex_dword(@P[7]), _get_hex_dword(@P[$14]), _get_hex_dword(@P[$21]), - _get_hex_dword(@P[$2E])); + _get_hex_dword(@P[$2E]), + _get_hex_char (@P[$3B])); 'S':AddBuffLayout(VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, _get_hex_dword(@P[7]), _get_hex_dword(@P[$14]), _get_hex_dword(@P[$21]), - _get_hex_dword(@P[$2E])); + _get_hex_dword(@P[$2E]), + _get_hex_char (@P[$3B])); else; end; end; @@ -567,24 +591,36 @@ begin end; -Procedure TvShaderExt.AddUnifLayout(dtype:TVkDescriptorType;parent,bind:DWORD); +Procedure TvShaderExt.AddUnifLayout(dtype:TVkDescriptorType;parent,bind,flags:DWORD); var v:TvCustomLayout; begin v:=Default(TvCustomLayout); v.dtype:=ord(dtype); - v.bind:=bind; - v.addr:=GetLayoutAddr(parent); + v.bind :=bind; + v.flags:=flags; + v.addr :=GetLayoutAddr(parent); AddToCustomLayout(FUnifLayouts,v); end; +//UI;PID=00000001;BND=00000000;MRW=1 +//US;PID=00000002;BND=00000001;MRW=1 +//0123456789ABCDEF0123456789ABCDEF01 +//0 1 2 + procedure TvShaderParserExt.OnUnifLayout(P:PChar); begin with TvShaderExt(FOwner) do Case P[1] of - 'I':AddUnifLayout(VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,_get_hex_dword(@P[7]),_get_hex_dword(@P[$14])); - 'S':AddUnifLayout(VK_DESCRIPTOR_TYPE_SAMPLER ,_get_hex_dword(@P[7]),_get_hex_dword(@P[$14])); + 'I':AddUnifLayout(VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + _get_hex_dword(@P[7]), + _get_hex_dword(@P[$14]), + _get_hex_char (@P[$21])); + 'S':AddUnifLayout(VK_DESCRIPTOR_TYPE_SAMPLER, + _get_hex_dword(@P[7]), + _get_hex_dword(@P[$14]), + _get_hex_char (@P[$21])); else; end; end; @@ -674,20 +710,33 @@ end; Procedure TvShaderExt.SetInstance(VGPR_COMP_CNT:Byte;STEP_RATE_0,STEP_RATE_1:DWORD); begin - FInstance.VGPR_COMP_CNT:=VGPR_COMP_CNT; + FParams.VGPR_COMP_CNT:=VGPR_COMP_CNT; if (VGPR_COMP_CNT>=1) then begin - FInstance.STEP_RATE_0:=STEP_RATE_0; + FParams.STEP_RATE_0:=STEP_RATE_0; end; if (VGPR_COMP_CNT>=2) then begin - FInstance.STEP_RATE_1:=STEP_RATE_1; + FParams.STEP_RATE_1:=STEP_RATE_1; end; end; +Procedure TvShaderExt.SET_SHADER_CONTROL(const SHADER_CONTROL:TDB_SHADER_CONTROL); +begin + FParams.SHADER_CONTROL:=SHADER_CONTROL; +end; + +Procedure TvShaderExt.SET_INPUT_CNTL(const INPUT_CNTL:A_INPUT_CNTL;NUM_INTERP:Byte); +begin + FParams.NUM_INTERP:=NUM_INTERP; + + Move(INPUT_CNTL,FParams.INPUT_CNTL,SizeOf(TSPI_PS_INPUT_CNTL_0)*NUM_INTERP); +end; + + /// function GetSharpByPatch(pData:Pointer;const addr:ADataLayout):Pointer; @@ -922,7 +971,13 @@ end; // -Procedure TvUniformBuilder.AddVSharp(PV:PVSharpResource4;fset,bind,offset:DWord); +function _get_buf_mem_usage(b:Byte):Byte; inline; +begin + Result:=((b and 1)*TM_READ) or + (((b shr 1) and 1)*TM_WRITE); +end; + +Procedure TvUniformBuilder.AddVSharp(PV:PVSharpResource4;fset,bind,offset,flags:DWord); var b:TBufBindExt; i,stride,num_records:Integer; @@ -936,6 +991,7 @@ begin b.fset:=fset; b.bind:=bind; b.offset:=offset; + b.memuse:=_get_buf_mem_usage(flags); b.addr:=Pointer(PV^.base); @@ -950,7 +1006,7 @@ begin FBuffers[i]:=b; end; -Procedure TvUniformBuilder.AddBufPtr(P:Pointer;fset,size,bind,offset:DWord); +Procedure TvUniformBuilder.AddBufPtr(P:Pointer;fset,size,bind,offset,flags:DWord); var b:TBufBindExt; i:Integer; @@ -962,6 +1018,7 @@ begin b.fset:=fset; b.bind:=bind; b.offset:=offset; + b.memuse:=_get_buf_mem_usage(flags); b.addr:=P; b.size:=size; @@ -1043,8 +1100,8 @@ begin VK_DESCRIPTOR_TYPE_STORAGE_BUFFER: Case b.addr[0].rtype of vtRoot, - vtBufPtr2:AddBufPtr(P,Fset,b.size,b.bind,b.offset); - vtVSharp4:AddVSharp(P,Fset,b.bind,b.offset); + vtBufPtr2:AddBufPtr(P,Fset,b.size,b.bind,b.offset,b.flags); + vtVSharp4:AddVSharp(P,Fset,b.bind,b.offset,b.flags); else Assert(false); end; diff --git a/vulkan/vShaderManager.pas b/vulkan/vShaderManager.pas index d45fc547..91479838 100644 --- a/vulkan/vShaderManager.pas +++ b/vulkan/vShaderManager.pas @@ -15,7 +15,7 @@ uses vRegs2Vulkan, shader_dump, - //ps4_program, + si_ci_vi_merged_registers, vDevice, @@ -299,6 +299,8 @@ begin SprvEmit.SetUserData(GPU_REGS.get_user_data(FStage)); SprvEmit.SET_SHADER_CONTROL(GPU_REGS.CX_REG^.DB_SHADER_CONTROL); + SprvEmit.SET_INPUT_CNTL (GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL, + GPU_REGS.CX_REG^.SPI_PS_IN_CONTROL.NUM_INTERP); end; vShaderStageVs: begin @@ -399,21 +401,36 @@ begin VGPR_COMP_CNT:=GPU_REGS.SH_REG^.SPI_SHADER_PGM_RSRC1_VS.VGPR_COMP_CNT; - if (FShader.FInstance.VGPR_COMP_CNT<>VGPR_COMP_CNT) then Exit(False); + if (FShader.FParams.VGPR_COMP_CNT<>VGPR_COMP_CNT) then Exit(False); if (VGPR_COMP_CNT>=1) then begin - if (FShader.FInstance.STEP_RATE_0<>GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_0) then Exit(False); + if (FShader.FParams.STEP_RATE_0<>GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_0) then Exit(False); end; if (VGPR_COMP_CNT>=2) then begin - if (FShader.FInstance.STEP_RATE_1<>GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_1) then Exit(False); + if (FShader.FParams.STEP_RATE_1<>GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_1) then Exit(False); end; Result:=True; end; +function test_ps_params(FShader:TvShaderExt;FStage:TvShaderStage;var GPU_REGS:TGPU_REGS):Boolean; +begin + if (FStage<>vShaderStagePs) then Exit(True); + + if (DWORD(FShader.FParams.SHADER_CONTROL)<>DWORD(GPU_REGS.CX_REG^.DB_SHADER_CONTROL)) then Exit(False); + + if (FShader.FParams.NUM_INTERP<>GPU_REGS.CX_REG^.SPI_PS_IN_CONTROL.NUM_INTERP) then Exit(False); + + if (CompareByte(FShader.FParams.INPUT_CNTL, + GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL, + SizeOf(TSPI_PS_INPUT_CNTL_0)*FShader.FParams.NUM_INTERP)<>0) then Exit(False); + + Result:=True; +end; + function test_unif(FShader:TvShaderExt;FDescSetId:Integer;pUserData:Pointer):Boolean; var ch:TvBufOffsetChecker; @@ -484,6 +501,7 @@ begin if test_func(FShader,pUserData) then if test_instance(FShader,FStage,GPU_REGS) then + if test_ps_params(FShader,FStage,GPU_REGS) then if test_unif(FShader,FDescSetId,pUserData) then //Checking offsets within a shader if test_push_const(FShader,pc_offset,pc_size) then begin @@ -505,11 +523,21 @@ begin FShader:=t.AddShader(FDescSetId,M,pUserData); - if (FStage=vShaderStageVs) then - begin - FShader.SetInstance(GPU_REGS.SH_REG^.SPI_SHADER_PGM_RSRC1_VS.VGPR_COMP_CNT, - GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_0, - GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_1); + case FStage of + vShaderStageVs: + begin + FShader.SetInstance(GPU_REGS.SH_REG^.SPI_SHADER_PGM_RSRC1_VS.VGPR_COMP_CNT, + GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_0, + GPU_REGS.CX_REG^.VGT_INSTANCE_STEP_RATE_1); + end; + vShaderStagePs: + begin + FShader.SET_SHADER_CONTROL(GPU_REGS.CX_REG^.DB_SHADER_CONTROL); + FShader.SET_INPUT_CNTL (GPU_REGS.CX_REG^.SPI_PS_INPUT_CNTL, + GPU_REGS.CX_REG^.SPI_PS_IN_CONTROL.NUM_INTERP); + + end; + else; end; DumpSpv(FStage,M);