Merge remote-tracking branch 'refs/remotes/LukeUsher/LLE' into LLE

This commit is contained in:
PatrickvL 2016-11-01 21:53:30 +01:00
commit e9657bb973
15 changed files with 613 additions and 61 deletions

1
.gitignore vendored
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@ -76,3 +76,4 @@ packages/
#Test files
*.testsettings
src/Version.h

6
Build/win32/Version.bat Normal file
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@ -0,0 +1,6 @@
@ECHO OFF
SET GIT_VERSION=
git describe --always > GIT_VERSION
for /f "delims=" %%x in (GIT_VERSION) do set GIT_VERSION=%%x
ECHO #define _GIT_VERSION "%GIT_VERSION%" > "%~1"
del GIT_VERSION

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@ -55,6 +55,18 @@
<IncludePath Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">..\..\import\DirectX8\include;$(IncludePath)</IncludePath>
<LibraryPath Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">..\..\import\DirectX8\lib;$(LibraryPath)</LibraryPath>
</PropertyGroup>
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
<CustomBuildBeforeTargets>
</CustomBuildBeforeTargets>
<CustomBuildAfterTargets>
</CustomBuildAfterTargets>
</PropertyGroup>
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
<CustomBuildBeforeTargets>
</CustomBuildBeforeTargets>
<CustomBuildAfterTargets>
</CustomBuildAfterTargets>
</PropertyGroup>
<ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
<Midl>
<PreprocessorDefinitions>NDEBUG;%(PreprocessorDefinitions)</PreprocessorDefinitions>
@ -100,6 +112,22 @@
<Command>
</Command>
</PostBuildEvent>
<CustomBuildStep>
<Command>
</Command>
</CustomBuildStep>
<CustomBuildStep>
<Outputs>
</Outputs>
<TreatOutputAsContent>
</TreatOutputAsContent>
</CustomBuildStep>
<PreBuildEvent>
<Command>$(SolutionDir)Version.bat $(SolutionDir)..\..\src\Version.h</Command>
</PreBuildEvent>
<PreBuildEvent>
<Message>Build Version.ini</Message>
</PreBuildEvent>
</ItemDefinitionGroup>
<ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
<Midl>
@ -149,6 +177,22 @@
<Command>
</Command>
</PostBuildEvent>
<CustomBuildStep>
<Command>
</Command>
</CustomBuildStep>
<CustomBuildStep>
<Outputs>
</Outputs>
<TreatOutputAsContent>
</TreatOutputAsContent>
</CustomBuildStep>
<PreBuildEvent>
<Command>$(SolutionDir)Version.bat $(SolutionDir)..\..\src\Version.h</Command>
</PreBuildEvent>
<PreBuildEvent>
<Message>Build Version.ini</Message>
</PreBuildEvent>
</ItemDefinitionGroup>
<ItemGroup>
<ClInclude Include="..\..\src\Common\Win32\AlignPosfix1.h" />

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@ -59,7 +59,14 @@ XBSYSAPI VOID *ExInterlockedAddLargeInteger;
XBSYSAPI VOID *ExInterlockedAddLargeStatistic;
XBSYSAPI VOID *ExInterlockedCompareExchange64;
XBSYSAPI VOID *ExMutantObjectType;
XBSYSAPI VOID *ExQueryPoolBlockSize;
// ******************************************************************
// * ExQueryPoolBlockSize
// ******************************************************************
XBSYSAPI EXPORTNUM(23) ULONG NTAPI ExQueryPoolBlockSize
(
IN PVOID PoolBlock
);
// ******************************************************************
// * ExQueryNonVolatileSetting

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@ -201,8 +201,27 @@ XBSYSAPI VOID *KeTestAlertThread;
XBSYSAPI EXPORTNUM(156) volatile DWORD KeTickCount;
XBSYSAPI VOID *KeTimeIncrement;
XBSYSAPI VOID *KeWaitForMultipleObjects;
XBSYSAPI VOID *KeWaitForSingleObject;
XBSYSAPI EXPORTNUM(158) NTSTATUS KeWaitForMultipleObjects
(
IN ULONG Count,
IN PVOID Object[],
IN WAIT_TYPE WaitType,
IN int WaitReason,
IN KPROCESSOR_MODE WaitMode,
IN BOOLEAN Alertable,
IN PLARGE_INTEGER Timeout OPTIONAL,
IN VOID* WaitBlockArray
);
XBSYSAPI EXPORTNUM(159) NTSTATUS KeWaitForSingleObject
(
IN PVOID Object,
IN int WaitReason,
IN KPROCESSOR_MODE WaitMode,
IN BOOLEAN Alertable,
IN PLARGE_INTEGER Timeout OPTIONAL
);
#endif

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@ -96,7 +96,7 @@ XBSYSAPI EXPORTNUM(173) PHYSICAL_ADDRESS NTAPI MmGetPhysicalAddress
XBSYSAPI VOID *MmIsAddressValid;
//XBSYSAPI VOID *MmLockUnlockBufferPages;
XBSYSAPI EXPORTNUM(175) PHYSICAL_ADDRESS NTAPI MmLockUnlockBufferPages
XBSYSAPI EXPORTNUM(175) VOID NTAPI MmLockUnlockBufferPages
(
IN PHYSICAL_ADDRESS BaseAddress,
IN ULONG NumberOfBytes,

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@ -67,7 +67,7 @@ XBSYSAPI VOID *KdDebuggerNotPresent;
// ******************************************************************
// * KfRaiseIrql
// ******************************************************************
XBSYSAPI EXPORTNUM(160) UCHAR NTAPI KfRaiseIrql
XBSYSAPI EXPORTNUM(160) UCHAR* NTAPI KfRaiseIrql
(
IN UCHAR NewIrql
);
@ -75,7 +75,7 @@ XBSYSAPI EXPORTNUM(160) UCHAR NTAPI KfRaiseIrql
// ******************************************************************
// * KfLowerIrql
// ******************************************************************
XBSYSAPI EXPORTNUM(161) UCHAR NTAPI KfLowerIrql
XBSYSAPI EXPORTNUM(161) VOID NTAPI KfLowerIrql
(
IN UCHAR NewIrql
);

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@ -82,11 +82,13 @@ typedef signed long sint32;
/*! define this to dump textures that are registered */
//#define _DEBUG_DUMP_TEXTURE_REGISTER "D:\\cxbx\\_textures\\"
#include "Version.h"
/*! version string dependent on trace flag */
#ifndef _DEBUG_TRACE
#define _CXBX_VERSION "0.0.1-POC"
#define _CXBX_VERSION _GIT_VERSION " ("__DATE__ ")"
#else
#define _CXBX_VERSION "0.0.1-POC-Trace"
#define _CXBX_VERSION _GIT_VERSION "-Trace ("__DATE__ ")"
#endif
/*! debug mode choices */

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@ -1507,8 +1507,24 @@ XBSYSAPI EXPORTNUM(17) VOID NTAPI xboxkrnl::ExFreePool
GetCurrentThreadId(), P);
CxbxFree(P);
}
// ******************************************************************
// * 0x0017 ExQueryPoolBlockSize
// ******************************************************************
XBSYSAPI EXPORTNUM(23) xboxkrnl::ULONG NTAPI xboxkrnl::ExQueryPoolBlockSize
(
IN PVOID PoolBlock
)
{
DbgPrintf("EmuKrnl (0x%X): ExQueryPoolBlockSize\n"
"(\n"
" PoolBlock : 0x%.08X\n"
");\n",
GetCurrentThreadId(), PoolBlock);
// Not strictly correct, but it will do for now
return MmQueryAllocationSize(PoolBlock);
}
// ******************************************************************
@ -2360,15 +2376,72 @@ LAUNCH_DATA_PAGE xLaunchDataPage =
// TODO: Verify this is the correct amount
xboxkrnl::ULONG xboxkrnl::HalDiskCachePartitionCount = 3;
// ******************************************************************
// * 0x009E - KeWaitForMultipleObjects
// ******************************************************************
XBSYSAPI EXPORTNUM(158) xboxkrnl::NTSTATUS xboxkrnl::KeWaitForMultipleObjects
(
IN ULONG Count,
IN PVOID Object[],
IN WAIT_TYPE WaitType,
IN int WaitReason,
IN KPROCESSOR_MODE WaitMode,
IN BOOLEAN Alertable,
IN PLARGE_INTEGER Timeout OPTIONAL,
IN VOID* WaitBlockArray
) {
DbgPrintf("EmuKrnl (0x%X): KeWaitForMultipleObjects\n"
"(\n"
" Count : 0x%.08X\n"
" Object : 0x%.08X\n"
" WaitType : 0x%.08X\n"
" WaitReason : 0x%.08X\n"
" WaitMode : 0x%.08X\n"
" Alertable : 0x%.08X\n"
" Timeout : 0x%.08X\n"
" WaitBlockArray : 0x%.08X\n"
");\n",
GetCurrentThreadId(), Count, Object, WaitType, WaitReason, WaitMode, Alertable, Timeout, WaitBlockArray);
EmuWarning("EmuKrnl: Redirecting KeWaitForMultipleObjects to NtWaitForMultipleObjectsEx");
return NtWaitForMultipleObjectsEx(Count, Object, WaitType, WaitMode, Alertable, Timeout);
}
// ******************************************************************
// * 0x009F - KeWaitForSingleObject
// ******************************************************************
XBSYSAPI EXPORTNUM(159) xboxkrnl::NTSTATUS xboxkrnl::KeWaitForSingleObject
(
IN PVOID Object,
IN int WaitReason,
IN KPROCESSOR_MODE WaitMode,
IN BOOLEAN Alertable,
IN PLARGE_INTEGER Timeout OPTIONAL
) {
DbgPrintf("EmuKrnl (0x%X): KeWaitForSingleObject\n"
"(\n"
" Object : 0x%.08X\n"
" WaitReason : 0x%.08X\n"
" WaitMode : 0x%.08X\n"
" Alertable : 0x%.08X\n"
" Timeout : 0x%.08X\n"
");\n",
GetCurrentThreadId(), Object, WaitReason, WaitMode, Alertable, Timeout);
EmuWarning("EmuKrnl: Redirecting KeWaitForSingleObject to NtWaitForSingleObjectEx");
return NtWaitForSingleObjectEx(Object, WaitMode, Alertable, Timeout);
}
// ******************************************************************
// * 0x00A0 - KfRaiseIrql
// ******************************************************************
XBSYSAPI EXPORTNUM(160) xboxkrnl::UCHAR NTAPI xboxkrnl::KfRaiseIrql
XBSYSAPI EXPORTNUM(160) xboxkrnl::UCHAR* NTAPI xboxkrnl::KfRaiseIrql
(
IN UCHAR NewIrql
)
{
// HACK: Not thread safe!
static xboxkrnl::UCHAR previousIrqlValue = 0;
DbgPrintf("EmuKrnl (0x%X): KfRaiseIrql\n"
"(\n"
@ -2377,14 +2450,14 @@ XBSYSAPI EXPORTNUM(160) xboxkrnl::UCHAR NTAPI xboxkrnl::KfRaiseIrql
GetCurrentThreadId(), NewIrql);
return 0;
// Return addr where old irq level should be stored
return &previousIrqlValue;
}
// ******************************************************************
// * 0x00A1 - KfLowerIrql
// ******************************************************************
XBSYSAPI EXPORTNUM(161) xboxkrnl::UCHAR NTAPI xboxkrnl::KfLowerIrql
XBSYSAPI EXPORTNUM(161) VOID NTAPI xboxkrnl::KfLowerIrql
(
IN UCHAR NewIrql
)
@ -2399,7 +2472,6 @@ XBSYSAPI EXPORTNUM(161) xboxkrnl::UCHAR NTAPI xboxkrnl::KfLowerIrql
return 0;
}
// ******************************************************************
@ -2670,6 +2742,28 @@ XBSYSAPI EXPORTNUM(172) xboxkrnl::NTSTATUS NTAPI xboxkrnl::MmFreeSystemMemory
return STATUS_SUCCESS;
}
// ******************************************************************
// * 0x00AF - MmLockUnlockBufferPages
// ******************************************************************
XBSYSAPI EXPORTNUM(175) void NTAPI xboxkrnl::MmLockUnlockBufferPages
(
IN PHYSICAL_ADDRESS BaseAddress,
IN ULONG NumberOfBytes,
IN ULONG Protect
)
{
DbgPrintf("EmuKrnl (0x%X): MmLockUnlockBufferPages\n"
"(\n"
" BaseAddress : 0x%.08X\n"
" NumberOfBytes : 0x%.08X\n"
" Protect : 0x%.08X\n"
");\n",
GetCurrentThreadId(), BaseAddress, NumberOfBytes, Protect);
EmuWarning("EmuKrnl: MmLockUnlockBufferPages ignored");
}
// ******************************************************************
// * 0x00B1 - MmMapIoSpace
// ******************************************************************
@ -4673,7 +4767,9 @@ XBSYSAPI EXPORTNUM(291) VOID NTAPI xboxkrnl::RtlInitializeCriticalSection
IN PRTL_CRITICAL_SECTION CriticalSection
)
{
if (CriticalSection == nullptr) {
return;
}
/*
DbgPrintf("EmuKrnl (0x%X): RtlInitializeCriticalSection\n"
@ -4708,7 +4804,9 @@ XBSYSAPI EXPORTNUM(294) VOID NTAPI xboxkrnl::RtlLeaveCriticalSection
IN PRTL_CRITICAL_SECTION CriticalSection
)
{
if (CriticalSection == nullptr) {
return;
}
int iSection = FindCriticalSection(CriticalSection);
@ -4835,6 +4933,9 @@ XBSYSAPI EXPORTNUM(306) xboxkrnl::BOOLEAN NTAPI xboxkrnl::RtlTryEnterCriticalSec
)
{
if (CriticalSection == nullptr) {
return false;
}
DbgPrintf("EmuKrnl (0x%X): RtlTryEnterCriticalSection\n"
"(\n"

View File

@ -28,6 +28,11 @@
// *
// * (c) 2002-2003 Aaron Robinson <caustik@caustik.com>
// * (c) 2016 Luke Usher <luke.usher@outlook.com>
// *
// * EmuNV2A.cpp is heavily based on code from XQEMU
// * (c) XQEMU Team
// * https://github.com/espes/xqemu/blob/xbox/hw/xbox/nv2a.c
// *
// * All rights reserved
// *
// ******************************************************************
@ -41,9 +46,80 @@
#include "EmuNV2A.h"
#include "nv2a_int.h" // from https://github.com/espes/xqemu/tree/xbox/hw/xbox
struct {
uint32_t pending_interrupts;
uint32_t enabled_interrupts;
} pmc;
struct {
uint32_t pending_interrupts;
uint32_t enabled_interrupts;
//TODO:
// QemuThread puller_thread;
// Cache1State cache1;
uint32_t regs[0x2000];
} pfifo;
struct {
uint32_t regs[0x1000];
} pvideo;
struct {
uint32_t pending_interrupts;
uint32_t enabled_interrupts;
uint32_t numerator;
uint32_t denominator;
uint32_t alarm_time;
} ptimer;
struct {
uint32_t regs[0x1000];
} pfb;
struct {
uint32_t pending_interrupts;
uint32_t enabled_interrupts;
uint32_t start;
} pcrtc;
struct {
uint32_t core_clock_coeff;
uint64_t core_clock_freq;
uint32_t memory_clock_coeff;
uint32_t video_clock_coeff;
} pramdac;
static void update_irq()
{
/* PFIFO */
if (pfifo.pending_interrupts & pfifo.enabled_interrupts) {
pmc.pending_interrupts |= NV_PMC_INTR_0_PFIFO;
} else {
pmc.pending_interrupts &= ~NV_PMC_INTR_0_PFIFO;
}
if (pcrtc.pending_interrupts & pcrtc.enabled_interrupts) {
pmc.pending_interrupts |= NV_PMC_INTR_0_PCRTC;
} else {
pmc.pending_interrupts &= ~NV_PMC_INTR_0_PCRTC;
}
/* TODO PGRAPH */
/*
if (pgraph.pending_interrupts & pgraph.enabled_interrupts) {
pmc.pending_interrupts |= NV_PMC_INTR_0_PGRAPH;
} else {
pmc.pending_interrupts &= ~NV_PMC_INTR_0_PGRAPH;
} */
if (pmc.pending_interrupts && pmc.enabled_interrupts) {
// TODO Raise IRQ
EmuWarning("EmuNV2A: Raise IRQ Not Implemented");
} else {
// TODO: Cancel IRQ
EmuWarning("EmuNV2A: Cancel IRQ Not Implemented");
}
}
uint32_t EmuNV2A_PMC_Read32(uint32_t addr)
{
switch (addr) {
case NV_PMC_BOOT_0: // chipset and stepping: NV2A, A02, Rev 0 return 0x02A000A2;
case NV_PMC_INTR_0: return pmc.pending_interrupts;
case NV_PMC_INTR_EN_0:
return pmc.enabled_interrupts;
default:
EmuWarning("EmuNV2A_PMC_Read32: Unknown Read Address %08X", addr);
}
@ -57,7 +133,7 @@ uint32_t EmuNV2A_PBUS_Read32(uint32_t addr)
case NV_PBUS_PCI_NV_0:
return 0x10de; // PCI_VENDOR_ID_NVIDIA
case NV_PBUS_PCI_NV_2:
return 0x0; // NV_PBUS_PCI_NV_2_REVISION_ID ??
return (0x02 << 24) | 161; // PCI_CLASS_DISPLAY_3D (0x02) Rev 161 (0xA1)
default:
EmuWarning("EmuNV2A_PBUS_Read32: Unknown Read Address %08X", addr);
}
@ -98,18 +174,10 @@ uint32_t EmuNV2A_PRMA_Read32(uint32_t addr)
uint32_t EmuNV2A_PVIDEO_Read32(uint32_t addr)
{
switch (addr) {
case NV_PVIDEO_STOP:
return 0;
default:
EmuWarning("EmuNV2A_PVIDEO_Read32: Unknown Read Address %08X", addr);
}
return 0;
}
uint32_t EmuNV2A_PTIMER_Read32(uint32_t addr)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PTIMER_Read32: Unknown Read Address %08X", addr);
return pvideo.regs[addr];
}
return 0;
@ -208,6 +276,12 @@ uint32_t EmuNV2A_PGRAPH_Read32(uint32_t addr)
uint32_t EmuNV2A_PCRTC_Read32(uint32_t addr)
{
switch (addr) {
case NV_PCRTC_INTR_0:
return pcrtc.pending_interrupts;
case NV_PCRTC_INTR_EN_0:
return pcrtc.enabled_interrupts;
case NV_PCRTC_START:
return pcrtc.start;
default:
EmuWarning("EmuNV2A_PCRTC_Read32: Unknown Read Address %08X", addr);
}
@ -227,11 +301,27 @@ uint32_t EmuNV2A_PRMCIO_Read32(uint32_t addr)
uint32_t EmuNV2A_PRAMDAC_Read32(uint32_t addr)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PRAMDAC_Read32: Unknown Read Address %08X", addr);
switch (addr & 3) {
case NV_PRAMDAC_NVPLL_COEFF:
return pramdac.core_clock_coeff;
break;
case NV_PRAMDAC_MPLL_COEFF:
return pramdac.memory_clock_coeff;
break;
case NV_PRAMDAC_VPLL_COEFF:
return pramdac.video_clock_coeff;
break;
case NV_PRAMDAC_PLL_TEST_COUNTER:
/* emulated PLLs locked instantly? */
return NV_PRAMDAC_PLL_TEST_COUNTER_VPLL2_LOCK
| NV_PRAMDAC_PLL_TEST_COUNTER_NVPLL_LOCK
| NV_PRAMDAC_PLL_TEST_COUNTER_MPLL_LOCK
| NV_PRAMDAC_PLL_TEST_COUNTER_VPLL_LOCK;
break;
default:
EmuWarning("EmuNV2A_PRAMDAC_Read32: Unknown Read Address %08X", addr);
}
return 0;
}
@ -316,33 +406,275 @@ uint32_t EmuNV2A_Read32(uint32_t addr)
return 0;
}
void EmuNV2A_PMC_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
case NV_PMC_INTR_0: pmc.pending_interrupts &= ~value;
update_irq();
break;
case NV_PMC_INTR_EN_0:
pmc.enabled_interrupts = value;
update_irq();
break;
default:
EmuWarning("EmuNV2A_PMC_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PBUS_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PBUS_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PFIFO_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PFIFO_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PFIFO_CACHE_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PFIFO_CACHE_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PRMA_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PRMA_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PVIDEO_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PVIDEO_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PCOUNTER_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PCOUNTER_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PTIMER_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
case NV_PTIMER_INTR_0:
ptimer.pending_interrupts &= ~value;
update_irq();
break;
case NV_PTIMER_INTR_EN_0:
ptimer.enabled_interrupts = value;
update_irq();
break;
case NV_PTIMER_DENOMINATOR:
ptimer.denominator = value;
break;
case NV_PTIMER_NUMERATOR:
ptimer.numerator = value;
break;
case NV_PTIMER_ALARM_0:
ptimer.alarm_time = value;
break;
default:
EmuWarning("EmuNV2A_PTIMER_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PVPE_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PVPE_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PTV_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PTV_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PRMFB_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PRMFB_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PRMVIO_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PRMVIO_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PFB_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
pfb.regs[addr] = value;
}
}
void EmuNV2A_PSTRAPS_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PSTRAPS_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PGRAPH_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PGRAPH_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PCRTC_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
case NV_PCRTC_INTR_0:
pcrtc.pending_interrupts &= ~value;
update_irq();
break;
case NV_PCRTC_INTR_EN_0:
pcrtc.enabled_interrupts = value;
update_irq();
break;
case NV_PCRTC_START: pcrtc.start = value &= 0x07FFFFFF;
break;
default:
EmuWarning("EmuNV2A_PCRTC_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PRMCIO_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PRMCIO_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PRAMDAC_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PRAMDAC_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PRMDIO_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PRMDIO_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_PRAMIN_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_PRAMIN_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_USER_Write32(uint32_t addr, uint32_t value)
{
switch (addr) {
default:
EmuWarning("EmuNV2A_USER_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}
}
void EmuNV2A_Write32(uint32_t addr, uint32_t value)
{
switch ((addr >> 12) & 31) {
// case NV_PMC : /* card master control */
// return EmuNV2A_PMC_Read32(addr & 0x0FFF);
// case NV_PBUS : /* bus control */
// return EmuNV2A_PBUS_Read32(addr & 0x0FFF);
// case NV_PFIFO : /* MMIO and DMA FIFO submission to PGRAPH and VPE */
// case NV_PFIFO_CACHE :
// case NV_PRMA : /* access to BAR0/BAR1 from real mode */
// case NV_PVIDEO : /* video overlay */
// case NV_PTIMER : /* time measurement and time-based alarms */
// case NV_PCOUNTER : /* performance monitoring counters */
// case NV_PVPE : /* MPEG2 decoding engine */
// case NV_PTV : /* TV encoder */
// case NV_PRMFB : /* aliases VGA memory window */
// case NV_PRMVIO : /* aliases VGA sequencer and graphics controller registers */
// case NV_PFB : /* memory interface */
// case NV_PSTRAPS : /* straps readout / override */
// case NV_PGRAPH : /* accelerated 2d/3d drawing engine */
// case NV_PCRTC : /* more CRTC controls */
// case NV_PRMCIO : /* aliases VGA CRTC and attribute controller registers */
// case NV_PRAMDAC : /* RAMDAC, cursor, and PLL control */
// case NV_PRMDIO : /* aliases VGA palette registers */
// case NV_PRAMIN : /* RAMIN access */
// case NV_USER : /* PFIFO MMIO and DMA submission area */
case NV_PMC: /* card master control */
EmuNV2A_PMC_Write32(addr & 0x0FFF, value);
break;
case NV_PBUS: /* bus control */
EmuNV2A_PBUS_Write32(addr & 0x0FFF, value);
break;
case NV_PFIFO: /* MMIO and DMA FIFO submission to PGRAPH and VPE */
EmuNV2A_PFIFO_Write32(addr & 0x0FFF, value);
break;
case NV_PFIFO_CACHE:
EmuNV2A_PFIFO_CACHE_Write32(addr & 0x0FFF, value);
break;
case NV_PRMA: /* access to BAR0/BAR1 from real mode */
EmuNV2A_PRMA_Write32(addr & 0x0FFF, value);
break;
case NV_PVIDEO: /* video overlay */
EmuNV2A_PVIDEO_Write32(addr & 0x0FFF, value);
break;
case NV_PTIMER: /* time measurement and time-based alarms */
EmuNV2A_PTIMER_Write32(addr & 0x0FFF, value);
break;
case NV_PCOUNTER: /* performance monitoring counters */
EmuNV2A_PCOUNTER_Write32(addr & 0x0FFF, value);
break;
case NV_PVPE: /* MPEG2 decoding engine */
EmuNV2A_PVPE_Write32(addr & 0x0FFF, value);
break;
case NV_PTV: /* TV encoder */
EmuNV2A_PTV_Write32(addr & 0x0FFF, value);
break;
case NV_PRMFB: /* aliases VGA memory window */
EmuNV2A_PRMFB_Write32(addr & 0x0FFF, value);
break;
case NV_PRMVIO: /* aliases VGA sequencer and graphics controller registers */
EmuNV2A_PRMVIO_Write32(addr & 0x0FFF, value);
break;
case NV_PFB: /* memory interface */
EmuNV2A_PFB_Write32(addr & 0x0FFF, value);
break;
case NV_PSTRAPS: /* straps readout / override */
EmuNV2A_PSTRAPS_Write32(addr & 0x0FFF, value);
break;
case NV_PGRAPH: /* accelerated 2d/3d drawing engine */
EmuNV2A_PGRAPH_Write32(addr & 0x0FFF, value);
break;
case NV_PCRTC: /* more CRTC controls */
EmuNV2A_PCRTC_Write32(addr & 0x0FFF, value);
break;
case NV_PRMCIO: /* aliases VGA CRTC and attribute controller registers */
EmuNV2A_PRMCIO_Write32(addr & 0x0FFF, value);
break;
case NV_PRAMDAC: /* RAMDAC, cursor, and PLL control */
EmuNV2A_PRAMDAC_Write32(addr & 0x0FFF, value);
break;
case NV_PRMDIO: /* aliases VGA palette registers */
EmuNV2A_PRMDIO_Write32(addr & 0x0FFF, value);
break;
case NV_PRAMIN: /* RAMIN access */
EmuNV2A_PRAMIN_Write32(addr & 0x0FFF, value);
break;
case NV_USER: /* PFIFO MMIO and DMA submission area */
EmuNV2A_USER_Write32(addr & 0x0FFF, value);
break;
default:
EmuWarning("EmuNV2A_Write32: Unknown Write Address %08X (value %08X)", addr, value);
}

View File

@ -664,6 +664,16 @@ OOVPATable DSound_1_0_4134[] =
"IDirectSoundBuffer8_SetBufferData"
#endif
},
// IDirectSound8_CreateStream
{
(OOVPA*)&IDirectSound8_CreateStream_1_0_3936,
XTL::EmuIDirectSound8_CreateStream,
#ifdef _DEBUG_TRACE
"EmuIDirectSound8_CreateStream"
#endif
},
// CDirectSoundVoiceSettings::SetMixBins
{
(OOVPA*)&DirectSound_CDirectSoundVoiceSettings_SetMixBins_1_0_4134, 0,

View File

@ -988,6 +988,16 @@ OOVPATable DSound_1_0_4361[] =
"CDirectSound::CreateSoundStream (XREF)"
#endif
},
// IDirectSound8_CreateStream
{
(OOVPA*)&IDirectSound8_CreateStream_1_0_3936,
XTL::EmuIDirectSound8_CreateStream,
#ifdef _DEBUG_TRACE
"EmuIDirectSound8_CreateStream"
#endif
},
// DirectSoundCreateStream
{
(OOVPA*)&DirectSoundCreateStream_1_0_4361,

View File

@ -683,6 +683,16 @@ OOVPATable DSound_1_0_4432[] =
"EmuDirectSoundCreate"
#endif
},
// IDirectSound8_CreateStream
{
(OOVPA*)&IDirectSound8_CreateStream_1_0_3936,
XTL::EmuIDirectSound8_CreateStream,
#ifdef _DEBUG_TRACE
"EmuIDirectSound8_CreateStream"
#endif
},
// CDirectSound_CreateSoundStream (* unchanged since 4361 *)
{
(OOVPA*)&CDirectSound_CreateSoundStream_1_0_4361, 0,

View File

@ -3833,6 +3833,16 @@ OOVPATable DSound_1_0_4627[] =
"CDirectSound::CreateSoundStream (XREF)"
#endif
},
// IDirectSound8_CreateStream
{
(OOVPA*)&IDirectSound8_CreateStream_1_0_3936,
XTL::EmuIDirectSound8_CreateStream,
#ifdef _DEBUG_TRACE
"EmuIDirectSound8_CreateStream"
#endif
},
// DirectSoundCreateStream (* unchanged since 4361 *)
{
(OOVPA*)&DirectSoundCreateStream_1_0_4361,

View File

@ -80,7 +80,7 @@ extern "C" CXBXKRNL_API uint32 CxbxKrnl_KernelThunkTable[367] =
(uint32)PANIC(0x0014), // 0x0014 (20) ExInterlockedAddLargeStatistic
(uint32)PANIC(0x0015), // 0x0015 (21) ExInterlockedCompareExchange64
(uint32)PANIC(0x0016), // 0x0016 (22) ExMutantObjectType
(uint32)PANIC(0x0017), // 0x0017 (23) ExQueryPoolBlockSize
(uint32)&xboxkrnl::ExQueryPoolBlockSize, // 0x0017 (23) ExQueryPoolBlockSize
(uint32)&xboxkrnl::ExQueryNonVolatileSetting, // 0x0018 (24)
(uint32)&xboxkrnl::ExReadWriteRefurbInfo, // 0x0019 (25)
(uint32)PANIC(0x001A), // 0x001A (26) ExQueryPoolBlockSize
@ -215,8 +215,8 @@ extern "C" CXBXKRNL_API uint32 CxbxKrnl_KernelThunkTable[367] =
(uint32)PANIC(0x009B), // 0x009B (155) KeTestAlertThread
(uint32)&xboxkrnl::KeTickCount, // 0x009C (156)
(uint32)PANIC(0x009D), // 0x009D (157) KeTimeIncrement
(uint32)PANIC(0x009E), // 0x009E (158) KeWaitForMultipleObjects
(uint32)PANIC(0x009F), // 0x009F (159) KeWaitForSingleObject
(uint32)&xboxkrnl::KeWaitForMultipleObjects, // 0x009E (158) KeWaitForMultipleObjects
(uint32)&xboxkrnl::KeWaitForSingleObject, // 0x009F (159) KeWaitForSingleObject
(uint32)&xboxkrnl::KfRaiseIrql, // 0x00A0 (160)
(uint32)&xboxkrnl::KfLowerIrql, // 0x00A1 (161)
(uint32)PANIC(0x00A2), // 0x00A2 (162) KiBugCheckData
@ -232,7 +232,7 @@ extern "C" CXBXKRNL_API uint32 CxbxKrnl_KernelThunkTable[367] =
(uint32)&xboxkrnl::MmFreeSystemMemory, // 0x00AC (172)
(uint32)PANIC(0x00AD), // 0x00AD (173) MmGetPhysicalAddress
(uint32)PANIC(0x00AE), // 0x00AE (174) MmIsAddressValid
(uint32)PANIC(0x00AF), // 0x00AF (175) MmLockUnlockBufferPages
(uint32)&xboxkrnl::MmLockUnlockBufferPages, // 0x00AF (175) MmLockUnlockBufferPages
(uint32)PANIC(0x00B0), // 0x00B0 (176) MmLockUnlockPhysicalPage
(uint32)&xboxkrnl::MmMapIoSpace, // 0x00B1 (177)
(uint32)&xboxkrnl::MmPersistContiguousMemory, // 0x00B2 (178)