Rearranged header files (introducing nv2a_regs.h)
This commit is contained in:
PatrickvL
patrickvl
parent
8584f09513
commit
28c672ac0c
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@ -293,6 +293,7 @@
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<ClInclude Include="..\..\src\devices\video\nv2a_debug.h" />
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<ClInclude Include="..\..\src\devices\video\nv2a_int.h" />
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<ClInclude Include="..\..\src\devices\video\nv2a_psh.h" />
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<ClInclude Include="..\..\src\devices\video\nv2a_regs.h" />
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<ClInclude Include="..\..\src\devices\video\nv2a_shaders.h" />
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<ClInclude Include="..\..\src\devices\video\nv2a_shaders_common.h" />
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<ClInclude Include="..\..\src\devices\video\nv2a_vsh.h" />
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@ -808,4 +808,9 @@
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<Image Include="..\..\resource\Cxbx-R.ico" />
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<Image Include="..\..\resource\Logo-License-CC4.bmp" />
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</ItemGroup>
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<ItemGroup>
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<ClInclude Include="..\..\src\devices\video\nv2a_regs.h">
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<Filter>Hardware\Video</Filter>
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</ClInclude>
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</ItemGroup>
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</Project>
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@ -30,15 +30,15 @@
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// *
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// * (c) 2002-2003 Aaron Robinson <caustik@caustik.com>
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// *
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// * nv2a.cpp is heavily based on code from XQEMU
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// * Copyright(c) 2012 espes
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// * Copyright(c) 2015 Jannik Vogel
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// * This file is heavily based on code from XQEMU
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// * https://github.com/xqemu/xqemu/blob/master/hw/xbox/nv2a/nv2a.c
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// * Copyright (c) 2012 espes
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// * Copyright (c) 2015 Jannik Vogel
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// * Copyright (c) 2018 Matt Borgerson
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// *
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// * https://github.com/espes/xqemu/blob/xbox/hw/xbox/nv2a.c
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// *
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// * (c) 2016-2018 Luke Usher <luke.usher@outlook.com>
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// * (c) 2017-2018 Patrick van Logchem <pvanlogchem@gmail.com>
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// * Contributions for Cxbx-Reloaded
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// * Copyright (c) 2017-2018 Luke Usher <luke.usher@outlook.com>
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// * Copyright (c) 2018 Patrick van Logchem <pvanlogchem@gmail.com>
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// *
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// * All rights reserved
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// *
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@ -101,6 +101,9 @@ struct _GError
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#include "CxbxKrnl/gloffscreen/glextensions.h" // for glextensions_init
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GLuint create_gl_shader(GLenum gl_shader_type,
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const char *code,
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const char *name); // forward to nv2a_shaders.cpp
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static void update_irq(NV2AState *d)
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{
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@ -34,451 +34,9 @@
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// ******************************************************************
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#pragma once
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#undef USE_SHADER_CACHE
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#ifdef USE_SHADER_CACHE
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#include "glib_compat.h" // For GHashTable, g_hash_table_new, g_hash_table_lookup, g_hash_table_insert
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#endif
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#include "Cxbx.h" // For xbaddr
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#include "devices\PCIDevice.h" // For PCIDevice
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#include <queue>
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#include <thread>
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#include <GL/glew.h>
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#include "swizzle.h"
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#include "nv2a_int.h"
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#include "nv2a_debug.h" // For HWADDR_PRIx, NV2A_DPRINTF, NV2A_GL_DPRINTF, etc.
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#include "CxbxKrnl/gloffscreen/gloffscreen.h"
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#include "qemu-thread.h" // For qemu_mutex, etc
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#include "nv2a_shaders.h" // For ShaderBinding
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#define NV_PMC_SIZE 0x001000
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#define _NV_PFIFO_SIZE 0x002000 // Underscore prefix to prevent clash with NV_PFIFO_SIZE
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#define NV_PVIDEO_SIZE 0x001000
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#define NV_PTIMER_SIZE 0x001000
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#define NV_PFB_SIZE 0x001000
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#define NV_PGRAPH_SIZE 0x002000
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#define NV_PCRTC_SIZE 0x001000
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#define NV_PRAMDAC_SIZE 0x001000
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typedef xbaddr hwaddr; // Compatibility; Cxbx uses xbaddr, xqemu and OpenXbox use hwaddr
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typedef uint32_t value_t; // Compatibility; Cxbx values are uint32_t (xqemu and OpenXbox use uint64_t)
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#ifdef __cplusplus
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template <size_t N> struct ArraySizeHelper { char _[N]; };
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template <typename T, size_t N>
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ArraySizeHelper<N> makeArraySizeHelper(T(&)[N]);
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# define ARRAY_SIZE(a) sizeof(makeArraySizeHelper(a))
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#else
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// The expression ARRAY_SIZE(a) is a compile-time constant of type
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// size_t which represents the number of elements of the given
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// array. You should only use ARRAY_SIZE on statically allocated
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// arrays.
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#define ARRAY_SIZE(a) \
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((sizeof(a) / sizeof(*(a))) / \
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static_cast<size_t>(!(sizeof(a) % sizeof(*(a)))))
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#endif
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#define VSH_TOKEN_SIZE 4 // Compatibility; TODO : Move this to nv2a_vsh.h
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#define MAX(a,b) ((a)>(b) ? (a) : (b)) // Compatibility
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#define MIN(a,b) ((a)<(b) ? (a) : (b)) // Compatibility
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#define g_free(x) free(x) // Compatibility
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#define g_malloc(x) malloc(x) // Compatibility
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#define g_malloc0(x) calloc(1, x) // Compatibility
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#define g_realloc(x, y) realloc(x, y) // Compatibility
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#undef USE_TEXTURE_CACHE
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#if __cplusplus >= 201402L
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# define NV2A_CONSTEXPR constexpr
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#else
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# define NV2A_CONSTEXPR static
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#endif
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// GCC implementation of FFS
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static int ffs(register int valu)
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{
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register int bit;
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if (valu == 0)
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return 0;
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for (bit = 1; !(valu & 1); bit++)
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valu >>= 1;
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return bit;
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}
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#define GET_MASK(v, mask) (((v) & (mask)) >> (ffs(mask)-1))
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#define SET_MASK(v, mask, val) \
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do { \
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const unsigned int __val = (val); \
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const unsigned int __mask = (mask); \
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(v) &= ~(__mask); \
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(v) |= ((__val) << (ffs(__mask) - 1)) & (__mask); \
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} while (0)
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// Power-of-two CASE statements
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#define CASE_1(v, step) case (v)
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#define CASE_2(v, step) CASE_1(v, step) : CASE_1(v + (step) * 1, step)
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#define CASE_4(v, step) CASE_2(v, step) : CASE_2(v + (step) * 2, step)
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#define CASE_8(v, step) CASE_4(v, step) : CASE_4(v + (step) * 4, step)
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#define CASE_16(v, step) CASE_8(v, step) : CASE_8(v + (step) * 8, step)
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#define CASE_32(v, step) CASE_16(v, step) : CASE_16(v + (step) * 16, step)
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#define CASE_64(v, step) CASE_32(v, step) : CASE_32(v + (step) * 32, step)
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#define CASE_128(v, step) CASE_64(v, step) : CASE_64(v + (step) * 64, step)
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#define CASE_256(v, step) CASE_128(v, step) : CASE_128(v + (step) * 128, step)
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// Non-power-of-two CASE statements
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#define CASE_3(v, step) CASE_2(v, step) : CASE_1(v + (step) * 2, step)
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#define NV2A_DEVICE(obj) \
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OBJECT_CHECK(NV2AState, (obj), "nv2a")
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//void reg_log_read(int block, hwaddr addr, uint64_t val);
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//void reg_log_write(int block, hwaddr addr, uint64_t val);
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enum FifoMode {
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FIFO_PIO = 0,
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FIFO_DMA = 1,
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};
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enum FIFOEngine {
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ENGINE_SOFTWARE = 0,
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ENGINE_GRAPHICS = 1,
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ENGINE_DVD = 2,
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};
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typedef struct DMAObject {
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unsigned int dma_class;
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unsigned int dma_target;
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xbaddr address;
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xbaddr limit;
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} DMAObject;
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typedef struct VertexAttribute {
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bool dma_select;
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xbaddr offset;
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/* inline arrays are packed in order?
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* Need to pass the offset to converted attributes */
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unsigned int inline_array_offset;
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float inline_value[4];
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unsigned int format;
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unsigned int size; /* size of the data type */
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unsigned int count; /* number of components */
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uint32_t stride;
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bool needs_conversion;
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uint8_t *converted_buffer;
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unsigned int converted_elements;
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unsigned int converted_size;
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unsigned int converted_count;
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float *inline_buffer;
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GLint gl_count;
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GLenum gl_type;
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GLboolean gl_normalize;
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GLuint gl_converted_buffer;
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GLuint gl_inline_buffer;
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} VertexAttribute;
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typedef struct Surface {
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bool draw_dirty;
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bool buffer_dirty;
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bool write_enabled_cache;
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unsigned int pitch;
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xbaddr offset;
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} Surface;
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typedef struct SurfaceShape {
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unsigned int z_format;
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unsigned int color_format;
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unsigned int zeta_format;
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unsigned int log_width, log_height;
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unsigned int clip_x, clip_y;
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unsigned int clip_width, clip_height;
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unsigned int anti_aliasing;
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} SurfaceShape;
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typedef struct TextureShape {
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bool cubemap;
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unsigned int dimensionality;
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unsigned int color_format;
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unsigned int levels;
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unsigned int width, height, depth;
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unsigned int min_mipmap_level, max_mipmap_level;
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unsigned int pitch;
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} TextureShape;
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typedef struct TextureKey {
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TextureShape state;
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uint64_t data_hash;
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uint8_t* texture_data;
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uint8_t* palette_data;
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} TextureKey;
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typedef struct TextureBinding {
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GLenum gl_target;
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GLuint gl_texture;
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unsigned int refcnt;
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} TextureBinding;
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typedef struct KelvinState {
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xbaddr object_instance;
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} KelvinState;
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typedef struct ContextSurfaces2DState {
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xbaddr object_instance;
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xbaddr dma_image_source;
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xbaddr dma_image_dest;
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unsigned int color_format;
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unsigned int source_pitch, dest_pitch;
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xbaddr source_offset, dest_offset;
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} ContextSurfaces2DState;
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typedef struct ImageBlitState {
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xbaddr object_instance;
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xbaddr context_surfaces;
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unsigned int operation;
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unsigned int in_x, in_y;
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unsigned int out_x, out_y;
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unsigned int width, height;
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} ImageBlitState;
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typedef struct PGRAPHState {
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bool opengl_enabled; // == bLLE_GPU
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QemuMutex pgraph_lock;
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uint32_t pending_interrupts;
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uint32_t enabled_interrupts;
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QemuCond interrupt_cond;
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/* subchannels state we're not sure the location of... */
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ContextSurfaces2DState context_surfaces_2d;
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ImageBlitState image_blit;
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KelvinState kelvin;
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QemuCond fifo_access_cond;
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QemuCond flip_3d;
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xbaddr dma_color, dma_zeta;
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Surface surface_color, surface_zeta;
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unsigned int surface_type;
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SurfaceShape surface_shape;
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SurfaceShape last_surface_shape;
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xbaddr dma_a, dma_b;
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#ifdef USE_TEXTURE_CACHE
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GLruCache *texture_cache;
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#endif
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bool texture_dirty[NV2A_MAX_TEXTURES];
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TextureBinding *texture_binding[NV2A_MAX_TEXTURES];
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#ifdef USE_SHADER_CACHE
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GHashTable *shader_cache;
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#endif
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ShaderBinding *shader_binding;
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bool texture_matrix_enable[NV2A_MAX_TEXTURES];
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/* FIXME: Move to NV_PGRAPH_BUMPMAT... */
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float bump_env_matrix[NV2A_MAX_TEXTURES - 1][4]; /* 3 allowed stages with 2x2 matrix each */
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GloContext *gl_context;
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GLuint gl_framebuffer;
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GLuint gl_color_buffer, gl_zeta_buffer;
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xbaddr dma_state;
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xbaddr dma_notifies;
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xbaddr dma_semaphore;
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xbaddr dma_report;
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xbaddr report_offset;
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bool zpass_pixel_count_enable;
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unsigned int zpass_pixel_count_result;
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unsigned int gl_zpass_pixel_count_query_count;
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GLuint* gl_zpass_pixel_count_queries;
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xbaddr dma_vertex_a, dma_vertex_b;
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unsigned int primitive_mode;
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unsigned int clear_surface;
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bool enable_vertex_program_write;
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uint32_t program_data[NV2A_MAX_TRANSFORM_PROGRAM_LENGTH][VSH_TOKEN_SIZE];
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uint32_t vsh_constants[NV2A_VERTEXSHADER_CONSTANTS][4];
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bool vsh_constants_dirty[NV2A_VERTEXSHADER_CONSTANTS];
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/* lighting constant arrays */
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uint32_t ltctxa[NV2A_LTCTXA_COUNT][4];
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bool ltctxa_dirty[NV2A_LTCTXA_COUNT];
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uint32_t ltctxb[NV2A_LTCTXB_COUNT][4];
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bool ltctxb_dirty[NV2A_LTCTXB_COUNT];
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uint32_t ltc1[NV2A_LTC1_COUNT][4];
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bool ltc1_dirty[NV2A_LTC1_COUNT];
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// should figure out where these are in lighting context
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float light_infinite_half_vector[NV2A_MAX_LIGHTS][3];
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float light_infinite_direction[NV2A_MAX_LIGHTS][3];
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float light_local_position[NV2A_MAX_LIGHTS][3];
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float light_local_attenuation[NV2A_MAX_LIGHTS][3];
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VertexAttribute vertex_attributes[NV2A_VERTEXSHADER_ATTRIBUTES];
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unsigned int inline_array_length;
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uint32_t inline_array[NV2A_MAX_BATCH_LENGTH];
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GLuint gl_inline_array_buffer;
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unsigned int inline_elements_length;
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uint16_t inline_elements[NV2A_MAX_BATCH_LENGTH]; // Cxbx-Reloaded TODO : Restore uint32_t once HLE_draw_inline_elements can using that
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unsigned int inline_buffer_length;
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unsigned int draw_arrays_length;
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unsigned int draw_arrays_max_count;
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/* FIXME: Unknown size, possibly endless, 1000 will do for now */
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GLint gl_draw_arrays_start[1000];
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GLsizei gl_draw_arrays_count[1000];
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GLuint gl_element_buffer;
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GLuint gl_memory_buffer;
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GLuint gl_vertex_array;
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uint32_t regs[NV_PGRAPH_SIZE]; // TODO : union
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} PGRAPHState;
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typedef struct OverlayState {
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bool video_buffer_use;
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int pitch;
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bool is_transparent;
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#ifdef DEBUG
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hwaddr base;
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hwaddr limit;
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#endif
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hwaddr offset;
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uint32_t in_height;
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uint32_t in_width;
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int out_x;
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int out_y;
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int out_width;
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int out_height;
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bool covers_framebuffer;
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int old_in_width;
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int old_in_height;
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int old_pitch;
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GLuint gl_texture;
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} OverlayState;
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typedef struct NV2AState {
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// PCIDevice dev;
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// qemu_irq irq;
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bool exiting;
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bool enable_overlay = false;
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// VGACommonState vga;
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// GraphicHwOps hw_ops;
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// QEMUTimer *vblank_timer;
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// MemoryRegion *vram;
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// MemoryRegion vram_pci;
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uint8_t *vram_ptr;
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size_t vram_size;
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// MemoryRegion ramin;
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struct {
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uint8_t *ramin_ptr;
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size_t ramin_size;
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} pramin;
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// MemoryRegion mmio;
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// MemoryRegion block_mmio[NV_NUM_BLOCKS];
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struct {
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uint32_t pending_interrupts;
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uint32_t enabled_interrupts;
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uint32_t regs[NV_PMC_SIZE]; // Not in xqemu/openxbox? TODO : union
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} pmc;
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struct {
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uint32_t pending_interrupts;
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uint32_t enabled_interrupts;
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uint32_t regs[_NV_PFIFO_SIZE]; // TODO : union
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QemuMutex pfifo_lock;
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std::thread puller_thread;
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QemuCond puller_cond;
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std::thread pusher_thread;
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QemuCond pusher_cond;
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} pfifo;
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struct {
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uint32_t pending_interrupts;
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uint32_t enabled_interrupts;
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//QemuCond interrupt_cond; // pvideo.interrupt_cond not used (yet)
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OverlayState overlays[2]; // NV2A supports 2 video overlays
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uint32_t regs[NV_PVIDEO_SIZE]; // TODO : union
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} pvideo;
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struct {
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uint32_t pending_interrupts;
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uint32_t enabled_interrupts;
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uint32_t numerator;
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uint32_t denominator;
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uint32_t alarm_time;
|
||||
uint32_t regs[NV_PTIMER_SIZE]; // Not in xqemu/openxbox? TODO : union
|
||||
} ptimer;
|
||||
|
||||
struct {
|
||||
uint32_t regs[NV_PFB_SIZE]; // TODO : union
|
||||
} pfb;
|
||||
|
||||
struct PGRAPHState pgraph;
|
||||
|
||||
struct {
|
||||
uint32_t pending_interrupts;
|
||||
uint32_t enabled_interrupts;
|
||||
hwaddr start;
|
||||
uint32_t regs[NV_PCRTC_SIZE]; // Not in xqemu/openxbox? TODO : union
|
||||
} pcrtc;
|
||||
|
||||
struct {
|
||||
uint32_t core_clock_coeff;
|
||||
uint64_t core_clock_freq;
|
||||
uint32_t memory_clock_coeff;
|
||||
uint32_t video_clock_coeff;
|
||||
uint32_t regs[NV_PRAMDAC_SIZE]; // Not in xqemu/openxbox? TODO : union
|
||||
} pramdac;
|
||||
|
||||
// PRMCIO (Actually the VGA controller)
|
||||
struct {
|
||||
uint8_t cr_index;
|
||||
uint8_t cr[256]; /* CRT registers */
|
||||
} prmcio; // Not in xqemu/openxbox?
|
||||
} NV2AState;
|
||||
|
||||
typedef value_t(*read_func)(NV2AState *d, hwaddr addr); //, unsigned int size);
|
||||
typedef void(*write_func)(NV2AState *d, hwaddr addr, value_t val); //, unsigned int size);
|
||||
|
||||
typedef struct {
|
||||
read_func read;
|
||||
write_func write;
|
||||
} MemoryRegionOps;
|
||||
#include "nv2a_int.h" // For NV2AState
|
||||
|
||||
typedef struct NV2ABlockInfo {
|
||||
const char* name;
|
||||
|
|
@ -489,69 +47,8 @@ typedef struct NV2ABlockInfo {
|
|||
|
||||
const NV2ABlockInfo* EmuNV2A_Block(xbaddr addr);
|
||||
|
||||
#if 0
|
||||
// Valid after PCI init :
|
||||
#define NV20_REG_BASE_KERNEL 0xFD000000
|
||||
|
||||
typedef volatile DWORD *PPUSH;
|
||||
|
||||
typedef struct {
|
||||
DWORD Ignored[0x10];
|
||||
PPUSH Put; // On Xbox1, this field is only written to by the CPU (the GPU uses this as a trigger to start executing from the given address)
|
||||
PPUSH Get; // On Xbox1, this field is only read from by the CPU (the GPU reflects in here where it is/stopped executing)
|
||||
PPUSH Reference; // TODO : xbaddr / void* / DWORD ?
|
||||
DWORD Ignored2[0x7ED];
|
||||
} Nv2AControlDma;
|
||||
|
||||
#define PUSH_TYPE_MASK 0x00000002 // 2 bits
|
||||
#define PUSH_TYPE_SHIFT 0
|
||||
#define PUSH_TYPE_METHOD 0 // method
|
||||
#define PUSH_TYPE_JMP_FAR 1 // jump far
|
||||
#define PUSH_TYPE_CALL_FAR 2 // call far
|
||||
#define PUSH_TYPE_METHOD_UNUSED 3 // method (unused)
|
||||
#define PUSH_METHOD_MASK 0x00001FFC // 12 bits
|
||||
#define PUSH_METHOD_SHIFT 0 // Dxbx note : Not 2, because methods are actually DWORD offsets (and thus defined with increments of 4)
|
||||
#define PUSH_SUBCH_MASK 0x0000E000 // 3 bits
|
||||
#define PUSH_SUBCH_SHIFT 13
|
||||
#define PUSH_COUNT_MASK 0x1FFC0000 // 11 bits
|
||||
#define PUSH_COUNT_SHIFT 18
|
||||
#define PUSH_INSTR_MASK 0xE0000000 // 3 bits
|
||||
#define PUSH_INSTR_SHIFT 29
|
||||
#define PUSH_INSTR_IMM_INCR 0 // immediate, increment
|
||||
#define PUSH_INSTR_JMP_NEAR 1 // near jump
|
||||
#define PUSH_INSTR_IMM_NOINC 2 // immediate, no-increment
|
||||
#define PUSH_ADDR_FAR_MASK 0xFFFFFFFC // 30 bits
|
||||
#define PUSH_ADDR_FAR_SHIFT 0
|
||||
#define PUSH_ADDR_NEAR_MASK 0x1FFFFFFC // 27 bits
|
||||
#define PUSH_ADDR_NEAR_SHIFT 0 // Cxbx note : Not 2, because methods are actually DWORD offsets (and thus defined with increments of 4)
|
||||
|
||||
#define PUSH_TYPE(dwPushCommand) ((dwPushCommand & PUSH_TYPE_MASK) >> PUSH_TYPE_SHIFT)
|
||||
#define PUSH_METHOD(dwPushCommand) ((dwPushCommand & PUSH_METHOD_MASK) >> PUSH_METHOD_SHIFT)
|
||||
#define PUSH_SUBCH(dwPushCommand) ((dwPushCommand & PUSH_SUBCH_MASK) >> PUSH_SUBCH_SHIFT)
|
||||
#define PUSH_COUNT(dwPushCommand) ((dwPushCommand & PUSH_COUNT_MASK) >> PUSH_COUNT_SHIFT)
|
||||
#define PUSH_INSTR(dwPushCommand) ((dwPushCommand & PUSH_INSTR_MASK) >> PUSH_INSTR_SHIFT)
|
||||
#define PUSH_ADDR_FAR(dwPushCommand) ((dwPushCommand & PUSH_ADDR_FAR_MASK) >> PUSH_ADDR_FAR_SHIFT)
|
||||
#define PUSH_ADDR_NEAR(dwPushCommand) ((dwPushCommand & PUSH_ADDR_NEAR_MASK) >> PUSH_ADDR_NEAR_SHIFT)
|
||||
|
||||
#define PUSH_METHOD_MAX ((PUSH_METHOD_MASK | 3) >> PUSH_METHOD_SHIFT) // = 8191
|
||||
#define PUSH_SUBCH_MAX (PUSH_SUBCH_MASK >> PUSH_SUBCH_SHIFT) // = 7
|
||||
#define PUSH_COUNT_MAX (PUSH_COUNT_MASK >> PUSH_COUNT_SHIFT) // = 2047
|
||||
|
||||
// Decode push buffer conmmand (inverse of D3DPUSH_ENCODE)
|
||||
inline void D3DPUSH_DECODE(const DWORD dwPushCommand, DWORD &dwMethod, DWORD &dwSubCh, DWORD &dwCount)
|
||||
{
|
||||
dwMethod = PUSH_METHOD(dwPushCommand);
|
||||
dwSubCh = PUSH_SUBCH(dwPushCommand);
|
||||
dwCount = PUSH_COUNT(dwPushCommand);
|
||||
}
|
||||
#endif
|
||||
|
||||
void CxbxReserveNV2AMemory(NV2AState *d);
|
||||
|
||||
GLuint create_gl_shader(GLenum gl_shader_type,
|
||||
const char *code,
|
||||
const char *name); // forward to nv2a_shaders.cpp
|
||||
|
||||
class NV2ADevice : public PCIDevice {
|
||||
public:
|
||||
// constructor
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@
|
|||
#ifdef DEBUG_NV2A_GL
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdbool.h>
|
||||
#include <stdarg.h>
|
||||
#include <assert.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -25,9 +25,6 @@
|
|||
|
||||
// Enable for NV2A Debug logging (Warning: Slow!)
|
||||
// #define DEBUG_NV2A
|
||||
#include "CxbxKrnl/gloffscreen/gloffscreen.h"
|
||||
#include "CxbxKrnl/gloffscreen/glextensions.h"
|
||||
|
||||
#ifdef DEBUG_NV2A
|
||||
# define NV2A_DPRINTF(format, ...) printf("[0x????] NV2A: " format, ## __VA_ARGS__)
|
||||
#else
|
||||
|
|
@ -39,6 +36,9 @@
|
|||
#ifdef DEBUG_NV2A_GL
|
||||
|
||||
#include <stdbool.h>
|
||||
#include "CxbxKrnl/gloffscreen/gloffscreen.h"
|
||||
#include "CxbxKrnl/gloffscreen/glextensions.h"
|
||||
|
||||
void gl_debug_message(bool cc, const char *fmt, ...);
|
||||
void gl_debug_group_begin(const char *fmt, ...);
|
||||
void gl_debug_group_end(void);
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -22,12 +22,11 @@
|
|||
#define HW_NV2A_SHADERS_H
|
||||
|
||||
#include "qstring.h"
|
||||
#include "CxbxKrnl/gloffscreen/gloffscreen.h"
|
||||
#include "CxbxKrnl/gloffscreen/gloffscreen.h" // For GLenum, etc
|
||||
|
||||
#include "nv2a_vsh.h"
|
||||
#include "nv2a_psh.h"
|
||||
#include "nv2a_int.h"
|
||||
|
||||
#include "nv2a_regs.h"
|
||||
|
||||
enum ShaderPrimitiveMode {
|
||||
PRIM_TYPE_NONE,
|
||||
|
|
|
|||
Loading…
Reference in New Issue