491 lines
13 KiB
C#
491 lines
13 KiB
C#
using System;
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using System.IO;
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using System.Diagnostics;
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namespace BizHawk.Emulation.Consoles.Nintendo
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{
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//AKA MMC1
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//http://wiki.nesdev.com/w/index.php/SxROM
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//consult nestopia as well.
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//the initial conditions for MMC1 games are known to be different. this may have to do with which MMC1 rev it is.
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//but how do we know which revision a game is? i don't know which revision is on which board
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//check UNIF for more information.. it may specify board and MMC1 rev independently because boards may have any MMC1 rev
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//in that case, we need to capture MMC1 rev in the game database (maybe add a new `chip` parameter)
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//TODO - this could be refactored to use more recent techniques (bank regs instead of nested if/then)
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//Final Fantasy
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//Mega Man 2
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//Blaster Master
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//Metroid
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//Kid Icarus
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//Zelda
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//Zelda 2
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//Castlevania 2
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public class MMC1
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{
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NES.NESBoardBase board;
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public MMC1_SerialController scnt = new MMC1_SerialController();
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public MMC1(NES.NESBoardBase board)
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{
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this.board = board;
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scnt.WriteRegister = SerialWriteRegister;
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scnt.Reset = SerialReset;
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//collect data about whether this is required here:
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//kid icarus requires it
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//zelda doesnt; nor megaman2; nor blastermaster; nor metroid
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StandardReset();
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//well, lets leave it.
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}
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public void SyncState(Serializer ser)
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{
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scnt.SyncState(ser);
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ser.Sync("chr_mode", ref chr_mode);
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ser.Sync("prg_mode", ref prg_mode);
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ser.Sync("prg_slot", ref prg_slot);
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ser.Sync("chr_0", ref chr_0);
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ser.Sync("chr_1", ref chr_1);
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ser.Sync("wram_disable", ref wram_disable);
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ser.Sync("prg", ref prg);
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ser.SyncEnum("mirror", ref mirror);
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}
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public enum Rev
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{
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A, B1, B2, B3
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}
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//register 0:
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public int chr_mode;
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public int prg_mode;
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public int prg_slot; //complicated
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public NES.NESBoardBase.EMirrorType mirror;
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static NES.NESBoardBase.EMirrorType[] _mirrorTypes = new NES.NESBoardBase.EMirrorType[] { NES.NESBoardBase.EMirrorType.OneScreenA, NES.NESBoardBase.EMirrorType.OneScreenB, NES.NESBoardBase.EMirrorType.Vertical, NES.NESBoardBase.EMirrorType.Horizontal };
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//register 1,2:
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int chr_0, chr_1;
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//register 3:
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int wram_disable;
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int prg;
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public class MMC1_SerialController
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{
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//state
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int shift_count, shift_val;
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public void SyncState(Serializer ser)
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{
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ser.Sync("shift_count", ref shift_count);
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ser.Sync("shift_val", ref shift_val);
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}
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public Action Reset;
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public Action<int, int> WriteRegister;
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public void ResetShift()
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{
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shift_count = shift_val = 0;
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}
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public void Write(int addr, byte value)
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{
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int data = value & 1;
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int reset = (value >> 7) & 1;
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if (reset == 1)
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{
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shift_count = 0;
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shift_val = 0;
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if (Reset != null)
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Reset();
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}
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else
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{
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shift_val >>= 1;
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shift_val |= (data << 4);
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shift_count++;
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if (shift_count == 5)
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{
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WriteRegister(addr >> 13, shift_val);
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shift_count = 0;
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shift_val = 0;
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}
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}
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}
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}
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void SerialReset()
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{
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prg_mode = 1;
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prg_slot = 1;
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}
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public void StandardReset()
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{
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prg_mode = 1;
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prg_slot = 1;
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chr_mode = 1;
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scnt.Reset();
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mirror = NES.NESBoardBase.EMirrorType.Horizontal;
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}
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public void Write(int addr, byte value)
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{
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scnt.Write(addr, value);
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}
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//logical register writes, called from the serial controller
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public void SerialWriteRegister(int addr, int value)
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{
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switch (addr)
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{
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case 0: //8000-9FFF
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mirror = _mirrorTypes[value & 3];
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prg_slot = ((value >> 2) & 1);
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prg_mode = ((value >> 3) & 1);
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chr_mode = ((value >> 4) & 1);
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break;
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case 1: //A000-BFFF
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chr_0 = value & 0x1F;
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break;
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case 2: //C000-DFFF
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chr_1 = value & 0x1F;
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break;
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case 3: //E000-FFFF
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prg = value & 0xF;
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wram_disable = (value >> 4) & 1;
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break;
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}
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//board.NES.LogLine("mapping.. chr_mode={0}, chr={1},{2}", chr_mode, chr_0, chr_1);
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//board.NES.LogLine("mapping.. prg_mode={0}, prg_slot{1}, prg={2}", prg_mode, prg_slot, prg);
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}
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public int Get_PRGBank(int addr)
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{
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int PRG_A14 = (addr >> 14) & 1;
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if (prg_mode == 0)
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if (PRG_A14 == 0)
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return prg;
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else
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{
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//"not tested very well yet! had to guess!
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return prg + 1;
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}
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else if (prg_slot == 0)
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if (PRG_A14 == 0)
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return 0;
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else return prg;
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else
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if (PRG_A14 == 0)
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return prg;
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else return 0xF;
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}
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public int Get_CHRBank_4K(int addr)
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{
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int CHR_A12 = (addr >> 12) & 1;
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int CHR_A14 = (addr >> 14) & 1;
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if (chr_mode == 0)
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if (CHR_A12 == 0)
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return chr_0;
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else return chr_0 + 1;
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else if (CHR_A12 == 0)
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return chr_0;
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else return chr_1;
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}
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}
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[NES.INESBoardImplPriority]
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public class SxROM : NES.NESBoardBase
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{
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//configuration
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protected int prg_mask, chr_mask;
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protected int vram_mask;
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const int pputimeout = 4; // i don't know if this is right, but anything lower will not boot Bill & Ted
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bool disablemirror = false; // mapper 171: mmc1 without mirroring control
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//state
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public MMC1 mmc1;
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/// <summary>number of cycles since last WritePRG()</summary>
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uint ppuclock;
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public override void ClockPPU()
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{
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if (ppuclock < pputimeout)
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ppuclock++;
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}
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public override void WritePRG(int addr, byte value)
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{
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// mmc1 ignores subsequent writes that are very close together
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if (ppuclock >= pputimeout)
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{
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ppuclock = 0;
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mmc1.Write(addr, value);
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if (!disablemirror)
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SetMirrorType(mmc1.mirror); //often redundant, but gets the job done
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}
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}
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public override byte ReadPRG(int addr)
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{
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int bank = mmc1.Get_PRGBank(addr) & prg_mask;
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addr = (bank << 14) | (addr & 0x3FFF);
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return ROM[addr];
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}
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int Gen_CHR_Address(int addr)
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{
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int bank = mmc1.Get_CHRBank_4K(addr);
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addr = ((bank & chr_mask) << 12) | (addr & 0x0FFF);
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return addr;
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}
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public override byte ReadPPU(int addr)
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{
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if (addr < 0x2000)
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{
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if (Cart.vram_size != 0)
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return VRAM[addr & vram_mask];
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else return VROM[Gen_CHR_Address(addr)];
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}
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else return base.ReadPPU(addr);
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}
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public override void WritePPU(int addr, byte value)
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{
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if (addr < 0x2000)
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{
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if (Cart.vram_size != 0)
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VRAM[addr & vram_mask] = value;
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}
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else base.WritePPU(addr, value);
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}
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public override void SyncState(Serializer ser)
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{
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base.SyncState(ser);
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mmc1.SyncState(ser);
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ser.Sync("ppuclock", ref ppuclock);
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}
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public override bool Configure(NES.EDetectionOrigin origin)
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{
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switch (Cart.board_type)
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{
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case "MAPPER116_HACKY":
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break;
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case "MAPPER001":
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break;
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case "MAPPER171": // Tui Do Woo Ma Jeung
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AssertPrg(32); AssertChr(32); Cart.wram_size = 0;
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disablemirror = true;
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SetMirrorType(Cart.pad_h, Cart.pad_v);
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break;
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case "NES-SAROM": //dragon warrior
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AssertPrg(64); AssertChr(16, 32, 64); AssertVram(0); AssertWram(8);
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break;
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case "NES-SBROM": //dance aerobics
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AssertPrg(64); AssertChr(16, 32, 64); AssertVram(0); AssertWram(0);
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break;
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case "NES-SCROM": //mechanized attack
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case "NES-SC1ROM": //knight rider
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AssertPrg(64); AssertChr(128); AssertVram(0); AssertWram(0);
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break;
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case "NES-SEROM": //lolo
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case "HVC-SEROM": //dr. mario
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AssertPrg(32); AssertChr(16,32); AssertVram(0); AssertWram(0);
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break;
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case "NES-SFROM": //bubble bobble
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AssertPrg(128, 256); AssertChr(16, 32, 64); AssertVram(0); AssertWram(0);
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break;
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case "NES-SGROM": //bionic commando
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case "HVC-SGROM": //Ankoku Shinwa - Yamato Takeru Densetsu (J)
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AssertPrg(128, 256); AssertChr(0); AssertVram(8); AssertWram(0);
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break;
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case "NES-SHROM": //family feud
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case "NES-SH1ROM": //airwolf
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AssertPrg(32); AssertChr(128); AssertVram(0); AssertWram(0);
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break;
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case "HVC-SIROM": //Igo: Kyuu Roban Taikyoku
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AssertPrg(32); AssertChr(16); AssertVram(0); AssertWram(8);
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break;
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case "NES-SJROM": //air fortress
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AssertPrg(128, 256); AssertChr(16, 32, 64); AssertVram(0); AssertWram(8);
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break;
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case "NES-SKROM": //zelda 2
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case "HVC-SKROM": //ad&d dragons of flame (J)
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AssertPrg(128, 256); AssertChr(128); AssertVram(0); AssertWram(8);
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break;
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case "NES-SLROM": //castlevania 2
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case "KONAMI-SLROM": //bayou billy
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case "HVC-SLROM": //Adventures of Lolo 2 (J)
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AssertPrg(128, 256); AssertChr(128); AssertVram(0); AssertWram(0);
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break;
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case "NES-SL1ROM": //hoops
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AssertPrg(64, 128, 256); AssertChr(128); AssertVram(0); AssertWram(0);
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break;
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case "NES-SL2ROM": //blaster master
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AssertPrg(128); AssertChr(128); AssertVram(0); AssertWram(0);
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break;
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case "NES-SL3ROM": //goal!
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AssertPrg(256); AssertChr(128); AssertVram(0); AssertWram(0);
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break;
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case "NES-SLRROM": //tecmo bowl
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AssertPrg(128); AssertChr(128); AssertVram(0); AssertWram(0);
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break;
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case "HVC-SMROM": //Hokkaidou Rensa Satsujin: Okhotsu ni Shoyu
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AssertPrg(256); AssertChr(0); AssertVram(8); AssertWram(0);
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break;
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case "NES-SNROM": //dragon warrior 2
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case "HVC-SNROM":
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AssertPrg(128, 256); AssertChr(0); AssertVram(8); AssertWram(8);
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break;
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case "SxROM-JUNK":
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break;
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default:
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return false;
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}
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BaseConfigure();
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return true;
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}
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protected void BaseConfigure()
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{
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mmc1 = new MMC1(this);
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prg_mask = (Cart.prg_size / 16) - 1;
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vram_mask = (Cart.vram_size*1024) - 1;
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chr_mask = (Cart.chr_size / 8 * 2) - 1;
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if (!disablemirror)
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SetMirrorType(mmc1.mirror);
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ppuclock = pputimeout;
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}
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} //class SxROM
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[NES.INESBoardImplPriority]
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class SoROM : SuROM
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{
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//this uses a CHR bit to select WRAM banks
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//TODO - only the latter 8KB is supposed to be battery backed
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public override bool Configure(NES.EDetectionOrigin origin)
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{
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switch (Cart.board_type)
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{
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case "NES-SOROM": //Nobunaga's Ambition
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AssertPrg(128, 256); AssertChr(0); AssertVram(8); AssertWram(16);
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break;
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default: return false;
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}
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BaseConfigure();
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return true;
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}
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int Map_WRAM(int addr)
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{
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//$A000-BFFF: [...R ...C]
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// R = PRG-RAM page select
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// C = CHR reg 0
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//* BUT THIS IS WRONG ??? R IS ONE BIT LOWER !!!??? ?!? *
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int chr_bank = mmc1.Get_CHRBank_4K(0);
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int ofs = addr & ((8 * 1024) - 1);
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int wram_bank_8k = (chr_bank >> 3) & 1;
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return (wram_bank_8k << 13) | ofs;
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}
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public override void WriteWRAM(int addr, byte value)
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{
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base.WriteWRAM(Map_WRAM(addr), value);
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}
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public override byte ReadWRAM(int addr)
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{
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return base.ReadWRAM(Map_WRAM(addr));
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}
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}
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class SXROM : SuROM
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{
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//SXROM's PRG behaves similar to SuROM (and so inherits from it)
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//it also has some WRAM select bits like SoROM
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public override bool Configure(NES.EDetectionOrigin origin)
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{
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switch (Cart.board_type)
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{
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case "HVC-SXROM": //final fantasy 1& 2
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AssertPrg(128, 256, 512); AssertChr(0); AssertVram(8); AssertWram(32);
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break;
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default: return false;
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}
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BaseConfigure();
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return true;
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}
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int Map_WRAM(int addr)
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{
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//$A000-BFFF: [...P RR..]
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// P = PRG-ROM 256k block select (just like on SUROM)
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// R = PRG-RAM page select (selects 8k @ $6000-7FFF, just like SOROM)
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int chr_bank = mmc1.Get_CHRBank_4K(0);
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int ofs = addr & ((8 * 1024) - 1);
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int wram_bank_8k = (chr_bank >> 2) & 3;
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return (wram_bank_8k << 13) | ofs;
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}
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public override void WriteWRAM(int addr, byte value)
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{
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base.WriteWRAM(Map_WRAM(addr), value);
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}
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public override byte ReadWRAM(int addr)
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{
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return base.ReadWRAM(Map_WRAM(addr));
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}
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}
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[NES.INESBoardImplPriority]
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class SuROM : SxROM
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{
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public override bool Configure(NES.EDetectionOrigin origin)
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{
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//SUROM uses CHR A16 to control the upper address line (PRG A18) of its 512KB PRG ROM.
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switch (Cart.board_type)
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{
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case "NES-SUROM": //dragon warrior 4
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case "HVC-SUROM":
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AssertPrg(512); AssertChr(0); AssertVram(8); AssertWram(8);
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break;
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default: return false;
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}
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BaseConfigure();
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return true;
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}
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public override byte ReadPRG(int addr)
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{
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int bank = mmc1.Get_PRGBank(addr);
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int chr_bank = mmc1.Get_CHRBank_4K(0);
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int bank_bit18 = chr_bank >> 4;
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bank |= (bank_bit18 << 4);
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bank &= prg_mask;
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addr = (bank << 14) | (addr & 0x3FFF);
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return ROM[addr];
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}
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}
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}
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