Commit Graph

15 Commits

Author SHA1 Message Date
alyosha-tas c2476f1d36 Z80: Actually upload the correct file >__> 2017-06-28 16:34:01 -04:00
J.D. Purcell b53502eed8 Spaces -> tabs. 2017-04-15 16:37:30 -04:00
Ben Russell c07e8b0a79 Z80 - instruction timing fixes 2016-11-09 14:06:56 +13:00
alyosha-tas 3fa2828d5b Accuracy improvement to z80
properly set interrupt enable after the NEXT instruction
2016-11-03 20:50:47 -04:00
feos 76eaea3619 tracer unification for cores: spacing, headers, etc 2016-08-16 01:39:26 +03:00
adelikat 2975d699ef Traceer - header for NesHawk and PCE 2016-02-28 08:28:00 -05:00
adelikat d477bc1fb6 nice Trace header for SMS, and Coleco 2016-02-28 08:07:02 -05:00
adelikat f5e679fa0d Refactor ITraceable to work on TraceInfo objects that separate Disassembly and Register information. Make Tracelogger two columns. 2016-02-21 17:34:42 -05:00
adelikat 538f0160d2 Z80 - don't assume FetchMemory exists 2015-12-20 11:22:24 -05:00
zeromus 642f965685 CDL - preliminary SMS support (only one mapper) 2015-10-30 00:00:57 -05:00
adelikat 8c12c5cbff do read/writes in the z80 core itself, refactor sms and ti83 to not use them on their end of the callback, fixes sms only having read/write callbacks on a few mappers 2015-01-24 20:57:37 +00:00
adelikat cdd0716420 wire up memory execute callbacks to SMS and TI83 2015-01-24 20:36:36 +00:00
goyuken 98b12af680 sms: disassemble 2015-01-05 21:19:38 +00:00
beirich 77857f0e51 Convert SMS, Coleco, and TI83 to zeromus Serializer-class savestates 2014-03-22 04:46:01 +00:00
adelikat 7393f132ab Move CPUs from Emulation.Common to Emulation.Cores 2014-01-22 01:14:36 +00:00