adelikat
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cd289c474e
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memorycallbacks with domains - Phase 2 - change api to Call methods and refactor accordingly, everything should behave as it was before the refactor at this point. No cores have yet to be implemented with domains other than the default bus they already had
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2017-08-03 18:08:07 -05:00 |
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adelikat
|
8ad021c6fd
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Intellivision - implement memory callbacks
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2017-04-23 13:28:40 -05:00 |
|
adelikat
|
d03577ade6
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Intellivision - partially implement IDebuggable - flag/register getting and setting, and TotalExecutedCycles
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2017-04-23 12:30:41 -05:00 |
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alyosha-tas
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2526f8c7b9
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Update CP1610
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2017-03-05 18:44:34 -05:00 |
|
alyosha-tas
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a36b7093e3
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Intellivision implement System Bus memory domain
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2017-02-09 12:53:55 -05:00 |
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adelikat
|
eb1f477f9d
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Intellivision - turn off logging
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2017-02-08 17:26:30 -06:00 |
|
J.D. Purcell
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206ea9887b
|
Text savestate fixes.
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2016-12-14 18:35:03 -05:00 |
|
alyosha-tas
|
33843265f8
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Update CP1610 to include Halts from SR2
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2016-12-13 16:47:21 -05:00 |
|
alyosha-tas
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ba149320c5
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INtellivision fill out save states
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2016-12-07 10:55:25 -05:00 |
|
alyosha-tas
|
c230609656
|
Cp1610 trace logger
WIP
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2016-11-12 12:58:10 -05:00 |
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adelikat
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e44493d9fb
|
Intellivision - wire up trace logger to the core. Currently does nothing since the TraceCallback in CP1610 needs to be wired up in the object in the right places
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2016-11-11 16:17:35 -06:00 |
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adelikat
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7393f132ab
|
Move CPUs from Emulation.Common to Emulation.Cores
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2014-01-22 01:14:36 +00:00 |