GBHawk: work on some accuracy edge cases
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15f69cf80e
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cb5c21f8d3
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@ -58,6 +58,15 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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do_frame(controller);
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// if the game is stopped but controller interrupts are on, check for interrupts
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if ((cpu.stopped || cpu.halted) && _islag && ((REG_FFFF & 0x10) == 0x10))
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{
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// update the controller state on VBlank
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GetControllerState(controller);
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do_controller_check();
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}
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if (_scanlineCallback != null)
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{
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if (_scanlineCallbackLine == -1)
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@ -88,14 +97,14 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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{
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// These things all tick twice as fast in GBC double speed mode
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// Note that DMA is halted when the CPU is halted
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if (ppu.DMA_start && !cpu.halted) { ppu.DMA_tick(); }
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if (ppu.DMA_start && !cpu.halted && !cpu.stopped) { ppu.DMA_tick(); }
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serialport.serial_transfer_tick();
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cpu.ExecuteOne();
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timer.tick();
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if (double_speed)
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{
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if (ppu.DMA_start && !cpu.halted) { ppu.DMA_tick(); }
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if (ppu.DMA_start && !cpu.halted && !cpu.stopped) { ppu.DMA_tick(); }
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serialport.serial_transfer_tick();
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cpu.ExecuteOne();
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timer.tick();
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@ -104,11 +113,11 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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else
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{
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cpu.TotalExecutedCycles++;
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timer.tick();
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timer.tick();
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if (double_speed)
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{
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cpu.TotalExecutedCycles++;
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timer.tick();
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timer.tick();
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}
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}
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@ -165,14 +174,14 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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if (!HDMA_transfer)
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{
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// These things all tick twice as fast in GBC double speed mode
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if (ppu.DMA_start && !cpu.halted) { ppu.DMA_tick(); }
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if (ppu.DMA_start && !cpu.halted && !cpu.stopped) { ppu.DMA_tick(); }
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serialport.serial_transfer_tick();
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cpu.ExecuteOne();
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timer.tick();
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if (double_speed)
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{
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if (ppu.DMA_start && !cpu.halted) { ppu.DMA_tick(); }
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if (ppu.DMA_start && !cpu.halted && !cpu.stopped) { ppu.DMA_tick(); }
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serialport.serial_transfer_tick();
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cpu.ExecuteOne();
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timer.tick();
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@ -244,7 +253,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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{
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speed_switch = false;
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Console.WriteLine("Speed Switch: " + cpu.TotalExecutedCycles);
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int ret = double_speed ? 35112 : 35112; // actual time needs checking
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int ret = double_speed ? (32768 - 19) : (32768 - 19); // actual time needs checking
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double_speed = !double_speed;
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return ret;
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}
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@ -33,7 +33,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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return ret ? PutSettingsDirtyBits.RebootCore : PutSettingsDirtyBits.None;
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}
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private GBSettings _settings = new GBSettings();
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public GBSettings _settings = new GBSettings();
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public GBSyncSettings _syncSettings = new GBSyncSettings();
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public class GBSettings
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@ -47,16 +47,20 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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return mapper.ReadMemoryLow(addr);
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}
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if (addr >= 0xE000 && (addr < 0xF000))
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if (addr >= 0xA000 && addr < 0xC000 && is_GBC)
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{
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return RAM[addr - 0xE000];
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// on GBC only, cart is accessible during DMA
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return mapper.ReadMemoryHigh(addr);
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}
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if (addr >= 0xE000 && addr < 0xF000)
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{
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return RAM[addr - 0xE000];
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}
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if (addr >= 0xF000 && addr < 0xFE00)
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{
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return RAM[(RAM_Bank * 0x1000) + (addr - 0xF000)];
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}
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if (addr >= 0xFE00 && addr < 0xFEA0 && ppu.DMA_OAM_access)
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{
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return OAM[addr - 0xFE00];
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@ -67,13 +71,19 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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return Read_Registers(addr);
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}
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if ((addr >= 0xFF80))
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if (addr >= 0xFF80)
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{
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// register FFFF?
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return ZP_RAM[addr - 0xFF80];
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if (addr != 0xFFFF)
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{
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return ZP_RAM[addr - 0xFF80];
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}
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else
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{
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return Read_Registers(addr);
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}
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}
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return 0xFF;
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return ppu.DMA_byte;
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}
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if (addr < 0x8000)
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@ -171,6 +181,13 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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if (ppu.DMA_start)
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{
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// some of gekkio's tests require this to be accessible during DMA
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if (addr >= 0xA000 && addr < 0xC000 && is_GBC)
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{
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// on GBC only, cart is accessible during DMA
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mapper.WriteMemory(addr, value);
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}
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if (addr >= 0xE000 && addr < 0xF000)
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{
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RAM[addr - 0xE000] = value;
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@ -189,7 +206,14 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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}
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else if (addr >= 0xFF80)
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{
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ZP_RAM[addr - 0xFF80] = value;
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if (addr != 0xFFFF)
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{
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ZP_RAM[addr - 0xFF80] = value;
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}
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else
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{
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Write_Registers(addr, value);
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}
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}
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return;
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@ -284,11 +308,16 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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return mapper.PeekMemoryLow(addr);
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}
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if (addr >= 0xA000 && addr < 0xC000 && is_GBC)
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{
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// on GBC only, cart is accessible during DMA
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return mapper.ReadMemoryHigh(addr);
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}
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if (addr >= 0xE000 && addr < 0xF000)
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{
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return RAM[addr - 0xE000];
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}
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if (addr >= 0xF000 && addr < 0xFE00)
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{
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return RAM[(RAM_Bank * 0x1000) + (addr - 0xF000)];
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@ -306,10 +335,17 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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if (addr >= 0xFF80)
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{
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return ZP_RAM[addr - 0xFF80];
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if (addr != 0xFFFF)
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{
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return ZP_RAM[addr - 0xFF80];
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}
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else
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{
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return Read_Registers(addr);
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}
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}
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return 0xFF;
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return ppu.DMA_byte;
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}
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if (addr < 0x8000)
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@ -48,12 +48,24 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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if (((value & 2) > 0) && Core.GBC_compat)
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{
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clk_rate = 16;
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serial_clock = (15 - (int)(Core.cpu.TotalExecutedCycles % 16)) + 1;
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serial_clock = (16 - (int)(Core.cpu.TotalExecutedCycles % 8)) + 1;
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}
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else
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{
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clk_rate = 512;
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serial_clock = (511 - (int)(Core.cpu.TotalExecutedCycles % 512)) + 1;
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serial_clock = 512 - (int)(Core.cpu.TotalExecutedCycles % 256) + 1;
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// there seems to be some clock inverting happening on some transfers
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// not sure of the exact nature of it, here is one methor that gives correct result on one test rom but not others
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/*
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if (Core._syncSettings.GBACGB && Core.is_GBC)
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{
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if ((Core.TotalExecutedCycles % 256) > 127)
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{
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serial_clock = (8 - (int)(Core.cpu.TotalExecutedCycles % 8)) + 1;
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}
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}
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*/
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}
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can_pulse = true;
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}
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@ -71,12 +83,12 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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if (((value & 2) > 0) && Core.GBC_compat)
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{
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clk_rate = 16;
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serial_clock = (15 - (int)(Core.cpu.TotalExecutedCycles % 16)) + 1;
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serial_clock = (16 - (int)(Core.cpu.TotalExecutedCycles % 8)) + 1;
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}
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else
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{
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clk_rate = 512;
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serial_clock = (511 - (int)(Core.cpu.TotalExecutedCycles % 512)) + 1;
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serial_clock = 512 - (int)(Core.cpu.TotalExecutedCycles % 256) + 1;
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}
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can_pulse = true;
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}
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