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namespace changes to BizHawk.Emulation Cpus

This commit is contained in:
adelikat 2013-11-14 15:01:32 +00:00
parent c076931d0c
commit 906c0316a6
53 changed files with 6362 additions and 6021 deletions
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2
BizHawk.Emulation/CPUs/68000/Diassembler.cs
View File

@ -1,6 +1,6 @@
using System.Text;
namespace BizHawk.Emulation.CPUs.M68000
namespace BizHawk.Emulation.Common.Components.M68000
{
public sealed class DisassemblyInfo
{

28
BizHawk.Emulation/CPUs/68000/Instructions/BitArithemetic.cs
View File

@ -1,6 +1,6 @@
using System;
namespace BizHawk.Emulation.CPUs.M68000
namespace BizHawk.Emulation.Common.Components.M68000
{
partial class MC68000
{
@ -311,8 +311,8 @@ namespace BizHawk.Emulation.CPUs.M68000
{
case 0: // byte
{
sbyte immed = (sbyte) ReadWord(PC); PC += 2;
sbyte value = (sbyte) (PeekValueB(mode, reg) ^ immed);
sbyte immed = (sbyte)ReadWord(PC); PC += 2;
sbyte value = (sbyte)(PeekValueB(mode, reg) ^ immed);
WriteValueB(mode, reg, value);
N = (value & 0x80) != 0;
Z = value == 0;
@ -354,7 +354,7 @@ namespace BizHawk.Emulation.CPUs.M68000
case 0: // byte
{
info.Mnemonic = "eori.b";
sbyte immed = (sbyte) ReadWord(pc); pc += 2;
sbyte immed = (sbyte)ReadWord(pc); pc += 2;
info.Args = String.Format("${0:X}, {1}", immed, DisassembleValue(mode, reg, 1, ref pc));
break;
}
@ -524,8 +524,8 @@ namespace BizHawk.Emulation.CPUs.M68000
{
case 0: // byte
{
sbyte immed = (sbyte) ReadWord(PC); PC += 2;
sbyte value = (sbyte) (PeekValueB(mode, reg) | immed);
sbyte immed = (sbyte)ReadWord(PC); PC += 2;
sbyte value = (sbyte)(PeekValueB(mode, reg) | immed);
WriteValueB(mode, reg, value);
N = (value & 0x80) != 0;
Z = value == 0;
@ -567,7 +567,7 @@ namespace BizHawk.Emulation.CPUs.M68000
case 0: // byte
{
info.Mnemonic = "ori.b";
sbyte immed = (sbyte) ReadWord(pc); pc += 2;
sbyte immed = (sbyte)ReadWord(pc); pc += 2;
info.Args = String.Format("${0:X}, {1}", immed, DisassembleValue(mode, reg, 1, ref pc));
break;
}
@ -604,7 +604,7 @@ namespace BizHawk.Emulation.CPUs.M68000
case 0: // Byte
{
sbyte value = PeekValueB(mode, reg);
value = (sbyte) ~value;
value = (sbyte)~value;
WriteValueB(mode, reg, value);
PendingCycles -= (mode == 0) ? 4 : 8 + EACyclesBW[mode, reg];
N = (value & 0x80) != 0;
@ -614,7 +614,7 @@ namespace BizHawk.Emulation.CPUs.M68000
case 1: // Word
{
short value = PeekValueW(mode, reg);
value = (short) ~value;
value = (short)~value;
WriteValueW(mode, reg, value);
PendingCycles -= (mode == 0) ? 4 : 8 + EACyclesBW[mode, reg];
N = (value & 0x8000) != 0;
@ -677,7 +677,7 @@ namespace BizHawk.Emulation.CPUs.M68000
switch (size)
{
case 0: // byte
for (int i=0; i<rot; i++)
for (int i = 0; i < rot; i++)
{
C = X = (D[reg].u8 & 0x80) != 0;
D[reg].u8 <<= 1;
@ -725,8 +725,8 @@ namespace BizHawk.Emulation.CPUs.M68000
case 1: info.Mnemonic = "lsl.w"; break;
case 2: info.Mnemonic = "lsl.l"; break;
}
if (m==0) info.Args = rot+", D"+reg;
else info.Args = "D"+rot+", D"+reg;
if (m == 0) info.Args = rot + ", D" + reg;
else info.Args = "D" + rot + ", D" + reg;
info.Length = pc - info.PC;
}
@ -972,7 +972,7 @@ namespace BizHawk.Emulation.CPUs.M68000
for (int i = 0; i < rot; i++)
{
C = (D[reg].u8 & 0x80) != 0;
D[reg].u8 = (byte) ((D[reg].u8 << 1) | (D[reg].u8 >> 7));
D[reg].u8 = (byte)((D[reg].u8 << 1) | (D[reg].u8 >> 7));
}
N = (D[reg].s8 & 0x80) != 0;
Z = D[reg].u8 == 0;
@ -982,7 +982,7 @@ namespace BizHawk.Emulation.CPUs.M68000
for (int i = 0; i < rot; i++)
{
C = (D[reg].u16 & 0x8000) != 0;
D[reg].u16 = (ushort) ((D[reg].u16 << 1) | (D[reg].u16 >> 15));
D[reg].u16 = (ushort)((D[reg].u16 << 1) | (D[reg].u16 >> 15));
}
N = (D[reg].s16 & 0x8000) != 0;
Z = D[reg].u16 == 0;

44
BizHawk.Emulation/CPUs/68000/Instructions/DataMovement.cs
View File

@ -1,7 +1,7 @@
using System;
using System.Text;
namespace BizHawk.Emulation.CPUs.M68000
namespace BizHawk.Emulation.Common.Components.M68000
{
partial class MC68000
{
@ -18,7 +18,7 @@ namespace BizHawk.Emulation.CPUs.M68000
{
case 1: // Byte
value = ReadValueB(srcMode, srcReg);
WriteValueB(dstMode, dstReg, (sbyte) value);
WriteValueB(dstMode, dstReg, (sbyte)value);
PendingCycles -= MoveCyclesBW[srcMode + (srcMode == 7 ? srcReg : 0), dstMode + (dstMode == 7 ? dstReg : 0)];
N = (value & 0x80) != 0;
break;
@ -54,7 +54,7 @@ namespace BizHawk.Emulation.CPUs.M68000
{
case 1:
info.Mnemonic = "move.b";
info.Args = DisassembleValue(srcMode, srcReg, 1, ref pc) +", ";
info.Args = DisassembleValue(srcMode, srcReg, 1, ref pc) + ", ";
info.Args += DisassembleValue(dstMode, dstReg, 1, ref pc);
break;
case 3:
@ -103,7 +103,9 @@ namespace BizHawk.Emulation.CPUs.M68000
}
break;
}
} else { // Long
}
else
{ // Long
A[dstReg].s32 = ReadValueL(srcMode, srcReg);
switch (srcMode)
{
@ -141,7 +143,9 @@ namespace BizHawk.Emulation.CPUs.M68000
{
info.Mnemonic = "movea.w";
info.Args = DisassembleValue(srcMode, srcReg, 2, ref pc) + ", A" + dstReg;
} else {
}
else
{
info.Mnemonic = "movea.l";
info.Args = DisassembleValue(srcMode, srcReg, 4, ref pc) + ", A" + dstReg;
}
@ -150,7 +154,7 @@ namespace BizHawk.Emulation.CPUs.M68000
void MOVEQ()
{
int value = (sbyte) op; // 8-bit data payload is sign-extended to 32-bits.
int value = (sbyte)op; // 8-bit data payload is sign-extended to 32-bits.
N = (value & 0x80) != 0;
Z = (value == 0);
V = false;
@ -162,7 +166,7 @@ namespace BizHawk.Emulation.CPUs.M68000
void MOVEQ_Disasm(DisassemblyInfo info)
{
info.Mnemonic = "moveq";
info.Args = String.Format("{0}, D{1}", (sbyte) op, (op >> 9) & 7);
info.Args = String.Format("{0}, D{1}", (sbyte)op, (op >> 9) & 7);
}
void MOVEM0()
@ -172,7 +176,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int dstMode = (op >> 3) & 7;
int dstReg = (op >> 0) & 7;
ushort registers = (ushort) ReadWord(PC); PC += 2;
ushort registers = (ushort)ReadWord(PC); PC += 2;
int address = ReadAddress(dstMode, dstReg);
int regCount = 0;
@ -226,12 +230,14 @@ namespace BizHawk.Emulation.CPUs.M68000
registers >>= 1;
}
}
PendingCycles -= regCount*4;
} else {
PendingCycles -= regCount * 4;
}
else
{
// long-assign
if (dstMode == 4) // decrement address
{
for (int i=7; i>= 0; i--)
for (int i = 7; i >= 0; i--)
{
if ((registers & 1) == 1)
{
@ -252,7 +258,9 @@ namespace BizHawk.Emulation.CPUs.M68000
registers >>= 1;
}
A[dstReg].s32 = address;
} else { // increment address
}
else
{ // increment address
for (int i = 7; i >= 0; i--)
{
if ((registers & 1) == 1)
@ -331,7 +339,9 @@ namespace BizHawk.Emulation.CPUs.M68000
PendingCycles -= regCount * 4;
if (srcMode == 3)
A[srcReg].s32 = address;
} else {
}
else
{
// long-assign
for (int i = 0; i < 8; i++)
{
@ -381,12 +391,12 @@ namespace BizHawk.Emulation.CPUs.M68000
{
var str = new StringBuilder();
int count = 0;
for (int i = 0; i<8; i++)
for (int i = 0; i < 8; i++)
{
if ((registers & 0x8000) != 0)
{
if (count > 0) str.Append(",");
str.Append("D"+i);
str.Append("D" + i);
count++;
}
registers <<= 1;
@ -396,7 +406,7 @@ namespace BizHawk.Emulation.CPUs.M68000
if ((registers & 0x8000) != 0)
{
if (count > 0) str.Append(",");
str.Append("A"+i);
str.Append("A" + i);
count++;
}
registers <<= 1;
@ -494,7 +504,7 @@ namespace BizHawk.Emulation.CPUs.M68000
info.Mnemonic = "lea";
info.Args = DisassembleAddress(mode, sReg, ref pc);
info.Args += ", A"+dReg;
info.Args += ", A" + dReg;
info.Length = pc - info.PC;
}

54
BizHawk.Emulation/CPUs/68000/Instructions/IntegerMath.cs
View File

@ -1,6 +1,6 @@
using System;
namespace BizHawk.Emulation.CPUs.M68000
namespace BizHawk.Emulation.Common.Components.M68000
{
partial class MC68000
{
@ -22,7 +22,7 @@ namespace BizHawk.Emulation.CPUs.M68000
V = result > sbyte.MaxValue || result < sbyte.MinValue;
N = (result & 0x80) != 0;
Z = result == 0;
D[Dreg].s8 = (sbyte) result;
D[Dreg].s8 = (sbyte)result;
PendingCycles -= 4 + EACyclesBW[mode, reg];
return;
}
@ -138,7 +138,7 @@ namespace BizHawk.Emulation.CPUs.M68000
{
case 0: // byte
{
int immed = (sbyte) ReadWord(PC); PC += 2;
int immed = (sbyte)ReadWord(PC); PC += 2;
sbyte value = PeekValueB(mode, reg);
int result = value + immed;
int uresult = (byte)value + (byte)immed;
@ -230,7 +230,7 @@ namespace BizHawk.Emulation.CPUs.M68000
Z = result == 0;
V = result > sbyte.MaxValue || result < sbyte.MinValue;
C = X = (uresult & 0x100) != 0;
WriteValueB(mode, reg, (sbyte) result);
WriteValueB(mode, reg, (sbyte)result);
if (mode == 0) PendingCycles -= 4;
else PendingCycles -= 8 + EACyclesBW[mode, reg];
return;
@ -240,7 +240,7 @@ namespace BizHawk.Emulation.CPUs.M68000
if (mode == 1)
{
int value = PeekValueL(mode, reg);
WriteValueL(mode, reg, value+data);
WriteValueL(mode, reg, value + data);
}
else
{
@ -289,9 +289,9 @@ namespace BizHawk.Emulation.CPUs.M68000
switch (size)
{
case 0: info.Mnemonic = "addq.b"; info.Args = data+", "+DisassembleValue(mode, reg, 1, ref pc); break;
case 1: info.Mnemonic = "addq.w"; info.Args = data+", "+DisassembleValue(mode, reg, 2, ref pc); break;
case 2: info.Mnemonic = "addq.l"; info.Args = data+", "+DisassembleValue(mode, reg, 4, ref pc); break;
case 0: info.Mnemonic = "addq.b"; info.Args = data + ", " + DisassembleValue(mode, reg, 1, ref pc); break;
case 1: info.Mnemonic = "addq.w"; info.Args = data + ", " + DisassembleValue(mode, reg, 2, ref pc); break;
case 2: info.Mnemonic = "addq.l"; info.Args = data + ", " + DisassembleValue(mode, reg, 4, ref pc); break;
}
info.Length = pc - info.PC;
}
@ -308,7 +308,9 @@ namespace BizHawk.Emulation.CPUs.M68000
int value = ReadValueW(mode, reg);
A[aReg].s32 += value;
PendingCycles -= 8 + EACyclesBW[mode, reg];
} else { // long
}
else
{ // long
int value = ReadValueL(mode, reg);
A[aReg].s32 += value;
if (mode == 0 || mode == 1 || (mode == 7 && reg == 4))
@ -350,7 +352,7 @@ namespace BizHawk.Emulation.CPUs.M68000
V = result > sbyte.MaxValue || result < sbyte.MinValue;
N = (result & 0x80) != 0;
Z = result == 0;
D[dReg].s8 = (sbyte) result;
D[dReg].s8 = (sbyte)result;
PendingCycles -= 4 + EACyclesBW[mode, reg];
return;
}
@ -363,7 +365,7 @@ namespace BizHawk.Emulation.CPUs.M68000
V = result > short.MaxValue || result < short.MinValue;
N = (result & 0x8000) != 0;
Z = result == 0;
D[dReg].s16 = (short) result;
D[dReg].s16 = (short)result;
PendingCycles -= 4 + EACyclesBW[mode, reg];
return;
}
@ -401,7 +403,7 @@ namespace BizHawk.Emulation.CPUs.M68000
V = result > sbyte.MaxValue || result < sbyte.MinValue;
N = (result & 0x80) != 0;
Z = result == 0;
WriteValueB(mode, reg, (sbyte) result);
WriteValueB(mode, reg, (sbyte)result);
PendingCycles -= 8 + EACyclesBW[mode, reg];
return;
}
@ -414,7 +416,7 @@ namespace BizHawk.Emulation.CPUs.M68000
V = result > short.MaxValue || result < short.MinValue;
N = (result & 0x8000) != 0;
Z = result == 0;
WriteValueW(mode, reg, (short) result);
WriteValueW(mode, reg, (short)result);
PendingCycles -= 8 + EACyclesBW[mode, reg];
return;
}
@ -427,7 +429,7 @@ namespace BizHawk.Emulation.CPUs.M68000
V = result > int.MaxValue || result < int.MinValue;
N = (result & 0x80000000) != 0;
Z = result == 0;
WriteValueL(mode, reg, (int) result);
WriteValueL(mode, reg, (int)result);
PendingCycles -= 12 + EACyclesL[mode, reg];
return;
}
@ -466,7 +468,7 @@ namespace BizHawk.Emulation.CPUs.M68000
{
case 0: // byte
{
sbyte b = (sbyte) ReadWord(PC); PC += 2;
sbyte b = (sbyte)ReadWord(PC); PC += 2;
sbyte a = PeekValueB(mode, reg);
int result = a - b;
X = C = ((a < b) ^ ((a ^ b) >= 0) == false);
@ -554,7 +556,7 @@ namespace BizHawk.Emulation.CPUs.M68000
Z = result == 0;
V = result > sbyte.MaxValue || result < sbyte.MinValue;
C = X = ((value < data) ^ ((value ^ data) >= 0) == false);
WriteValueB(mode, reg, (sbyte) result);
WriteValueB(mode, reg, (sbyte)result);
if (mode == 0) PendingCycles -= 4;
else PendingCycles -= 8 + EACyclesBW[mode, reg];
return;
@ -611,9 +613,9 @@ namespace BizHawk.Emulation.CPUs.M68000
switch (size)
{
case 0: info.Mnemonic = "subq.b"; info.Args = data+", "+DisassembleValue(mode, reg, 1, ref pc); break;
case 1: info.Mnemonic = "subq.w"; info.Args = data+", "+DisassembleValue(mode, reg, 2, ref pc); break;
case 2: info.Mnemonic = "subq.l"; info.Args = data+", "+DisassembleValue(mode, reg, 4, ref pc); break;
case 0: info.Mnemonic = "subq.b"; info.Args = data + ", " + DisassembleValue(mode, reg, 1, ref pc); break;
case 1: info.Mnemonic = "subq.w"; info.Args = data + ", " + DisassembleValue(mode, reg, 2, ref pc); break;
case 2: info.Mnemonic = "subq.l"; info.Args = data + ", " + DisassembleValue(mode, reg, 4, ref pc); break;
}
info.Length = pc - info.PC;
}
@ -630,7 +632,9 @@ namespace BizHawk.Emulation.CPUs.M68000
int value = ReadValueW(mode, reg);
A[aReg].s32 -= value;
PendingCycles -= 8 + EACyclesBW[mode, reg];
} else { // long
}
else
{ // long
int value = ReadValueL(mode, reg);
A[aReg].s32 -= value;
if (mode == 0 || mode == 1 || (mode == 7 && reg == 4))
@ -650,7 +654,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int reg = (op >> 0) & 7;
info.Mnemonic = (size == 0) ? "suba.w" : "suba.l";
info.Args = DisassembleValue(mode, reg, (size == 0) ? 2 : 4, ref pc) + ", A"+aReg;
info.Args = DisassembleValue(mode, reg, (size == 0) ? 2 : 4, ref pc) + ", A" + aReg;
info.Length = pc - info.PC;
}
@ -944,7 +948,7 @@ namespace BizHawk.Emulation.CPUs.M68000
{
case 0: // byte
{
sbyte b = (sbyte) ReadWord(PC); PC += 2;
sbyte b = (sbyte)ReadWord(PC); PC += 2;
sbyte a = ReadValueB(mode, reg);
int result = a - b;
N = (result & 0x80) != 0;
@ -1019,7 +1023,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int mode = (op >> 3) & 7;
int reg = (op >> 0) & 7;
uint result = (uint) (D[dreg].u16 * (ushort)ReadValueW(mode, reg));
uint result = (uint)(D[dreg].u16 * (ushort)ReadValueW(mode, reg));
D[dreg].u32 = result;
V = false;
@ -1077,7 +1081,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int mode = (op >> 3) & 7;
int reg = (op >> 0) & 7;
uint source = (ushort) ReadValueW(mode, reg);
uint source = (ushort)ReadValueW(mode, reg);
uint dest = D[dreg].u32;
if (source == 0)
@ -1086,7 +1090,7 @@ namespace BizHawk.Emulation.CPUs.M68000
uint quotient = dest / source;
uint remainder = dest % source;
V = ((int) quotient < short.MinValue || (int) quotient > short.MaxValue);
V = ((int)quotient < short.MinValue || (int)quotient > short.MaxValue);
N = (quotient & 0x8000) != 0;
Z = quotient == 0;
C = false;

64
BizHawk.Emulation/CPUs/68000/Instructions/ProgramFlow.cs
View File

@ -1,6 +1,6 @@
using System;
namespace BizHawk.Emulation.CPUs.M68000
namespace BizHawk.Emulation.Common.Components.M68000
{
partial class MC68000
{
@ -25,7 +25,7 @@ namespace BizHawk.Emulation.CPUs.M68000
case 0x0E: return N && V && !Z || !N && !V && !Z; // Greater Than
case 0x0F: return Z || N && !V || !N && V; // Less or Equal
default:
throw new Exception("Invalid condition "+condition);
throw new Exception("Invalid condition " + condition);
}
}
@ -55,7 +55,7 @@ namespace BizHawk.Emulation.CPUs.M68000
void Bcc() // Branch on condition
{
sbyte displacement8 = (sbyte) op;
sbyte displacement8 = (sbyte)op;
int cond = (op >> 8) & 0x0F;
if (TestCondition(cond) == true)
@ -65,15 +65,20 @@ namespace BizHawk.Emulation.CPUs.M68000
// use opcode-embedded displacement
PC += displacement8;
PendingCycles -= 10;
} else {
}
else
{
// use extension word displacement
PC += ReadWord(PC);
PendingCycles -= 10;
}
} else { // false
}
else
{ // false
if (displacement8 != 0)
PendingCycles -= 8;
else {
else
{
PC += 2;
PendingCycles -= 12;
}
@ -90,7 +95,9 @@ namespace BizHawk.Emulation.CPUs.M68000
if (displacement8 != 0)
{
info.Args = string.Format("${0:X}", pc + displacement8);
} else {
}
else
{
info.Args = string.Format("${0:X}", pc + ReadWord(pc));
pc += 2;
}
@ -134,7 +141,9 @@ namespace BizHawk.Emulation.CPUs.M68000
// use embedded displacement
WriteLong(A[7].s32, PC);
PC += displacement8;
} else {
}
else
{
// use extension word displacement
WriteLong(A[7].s32, PC + 2);
PC += ReadWord(PC);
@ -150,7 +159,8 @@ namespace BizHawk.Emulation.CPUs.M68000
sbyte displacement8 = (sbyte)op;
if (displacement8 != 0)
info.Args = String.Format("${0:X}", pc + displacement8);
else {
else
{
info.Args = String.Format("${0:X}", pc + ReadWord(pc));
pc += 2;
}
@ -163,7 +173,9 @@ namespace BizHawk.Emulation.CPUs.M68000
{
PC += 2; // condition met, break out of loop
PendingCycles -= 12;
} else {
}
else
{
int reg = op & 7;
D[reg].u16--;
@ -171,7 +183,9 @@ namespace BizHawk.Emulation.CPUs.M68000
{
PC += 2; // counter underflowed, break out of loop
PendingCycles -= 14;
} else {
}
else
{
PC += ReadWord(PC); // condition false and counter not exhausted, so branch.
PendingCycles -= 10;
}
@ -250,9 +264,9 @@ namespace BizHawk.Emulation.CPUs.M68000
int value;
switch (size)
{
case 0: value = ReadValueB(mode, reg); PendingCycles -= 4 + EACyclesBW[mode, reg]; N = (value & 0x80) !=0; break;
case 1: value = ReadValueW(mode, reg); PendingCycles -= 4 + EACyclesBW[mode, reg]; N = (value & 0x8000) !=0; break;
default: value = ReadValueL(mode, reg); PendingCycles -= 4 + EACyclesL[mode, reg]; N = (value & 0x80000000) !=0; break;
case 0: value = ReadValueB(mode, reg); PendingCycles -= 4 + EACyclesBW[mode, reg]; N = (value & 0x80) != 0; break;
case 1: value = ReadValueW(mode, reg); PendingCycles -= 4 + EACyclesBW[mode, reg]; N = (value & 0x8000) != 0; break;
default: value = ReadValueL(mode, reg); PendingCycles -= 4 + EACyclesL[mode, reg]; N = (value & 0x80000000) != 0; break;
}
V = false;
C = false;
@ -287,7 +301,9 @@ namespace BizHawk.Emulation.CPUs.M68000
int mask = 1 << bit;
Z = (D[reg].s32 & mask) == 0;
PendingCycles -= 10;
} else {
}
else
{
bit &= 7;
int mask = 1 << bit;
Z = (ReadValueB(mode, reg) & mask) == 0;
@ -362,7 +378,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int mask = 1 << bit;
sbyte value = PeekValueB(mode, reg);
Z = (value & mask) == 0;
value ^= (sbyte) mask;
value ^= (sbyte)mask;
WriteValueB(mode, reg, value);
PendingCycles -= 8 + EACyclesBW[mode, reg];
}
@ -401,7 +417,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int mask = 1 << bit;
sbyte value = PeekValueB(mode, reg);
Z = (value & mask) == 0;
value ^= (sbyte) mask;
value ^= (sbyte)mask;
WriteValueB(mode, reg, value);
PendingCycles -= 4 + EACyclesBW[mode, reg];
}
@ -439,7 +455,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int mask = 1 << bit;
sbyte value = PeekValueB(mode, reg);
Z = (value & mask) == 0;
value &= (sbyte) ~mask;
value &= (sbyte)~mask;
WriteValueB(mode, reg, value);
PendingCycles -= 8 + EACyclesBW[mode, reg];
}
@ -478,7 +494,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int mask = 1 << bit;
sbyte value = PeekValueB(mode, reg);
Z = (value & mask) == 0;
value &= (sbyte) ~mask;
value &= (sbyte)~mask;
WriteValueB(mode, reg, value);
PendingCycles -= 4 + EACyclesBW[mode, reg];
}
@ -516,7 +532,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int mask = 1 << bit;
sbyte value = PeekValueB(mode, reg);
Z = (value & mask) == 0;
value |= (sbyte) mask;
value |= (sbyte)mask;
WriteValueB(mode, reg, value);
PendingCycles -= 8 + EACyclesBW[mode, reg];
}
@ -555,7 +571,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int mask = 1 << bit;
sbyte value = PeekValueB(mode, reg);
Z = (value & mask) == 0;
value |= (sbyte) mask;
value |= (sbyte)mask;
WriteValueB(mode, reg, value);
PendingCycles -= 4 + EACyclesBW[mode, reg];
}
@ -659,7 +675,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int pc = info.PC + 2;
int reg = op & 7;
info.Mnemonic = "link";
info.Args = "A"+reg+", "+DisassembleImmediate(2, ref pc); // TODO need a DisassembleSigned or something
info.Args = "A" + reg + ", " + DisassembleImmediate(2, ref pc); // TODO need a DisassembleSigned or something
info.Length = pc - info.PC;
}
@ -701,7 +717,9 @@ namespace BizHawk.Emulation.CPUs.M68000
WriteValueB(mode, reg, -1);
if (mode == 0) PendingCycles -= 6;
else PendingCycles -= 8 + EACyclesBW[mode, reg];
} else {
}
else
{
WriteValueB(mode, reg, 0);
if (mode == 0) PendingCycles -= 4;
else PendingCycles -= 8 + EACyclesBW[mode, reg];

6
BizHawk.Emulation/CPUs/68000/Instructions/Supervisor.cs
View File

@ -1,6 +1,6 @@
using System;
namespace BizHawk.Emulation.CPUs.M68000
namespace BizHawk.Emulation.Common.Components.M68000
{
partial class MC68000
{
@ -29,7 +29,7 @@ namespace BizHawk.Emulation.CPUs.M68000
{
int mode = (op >> 3) & 7;
int reg = (op >> 0) & 7;
WriteValueW(mode, reg, (short) SR);
WriteValueW(mode, reg, (short)SR);
PendingCycles -= (mode == 0) ? 6 : 8 + EACyclesBW[mode, reg];
}
@ -120,7 +120,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int mode = (op >> 3) & 7;
int reg = (op >> 0) & 7;
ushort sr = (ushort) (SR & 0xFF00);
ushort sr = (ushort)(SR & 0xFF00);
sr |= (byte)ReadValueB(mode, reg);
SR = (short)sr;
PendingCycles -= 12 + EACyclesBW[mode, reg];

16
BizHawk.Emulation/CPUs/68000/MC68000.cs
View File

@ -3,7 +3,7 @@ using System.Runtime.InteropServices;
using System.IO;
using System.Globalization;
namespace BizHawk.Emulation.CPUs.M68000
namespace BizHawk.Emulation.Common.Components.M68000
{
public sealed partial class MC68000
{
@ -36,7 +36,9 @@ namespace BizHawk.Emulation.CPUs.M68000
usp = A[7].s32;
A[7].s32 = ssp;
s = true;
} else { // exiting supervisor mode
}
else
{ // exiting supervisor mode
Console.WriteLine("&^&^&^&^& LEAVE SUPERVISOR MODE");
ssp = A[7].s32;
A[7].s32 = usp;
@ -69,7 +71,7 @@ namespace BizHawk.Emulation.CPUs.M68000
if (X) value |= 0x0010;
if (M) value |= 0x1000;
if (S) value |= 0x2000;
value |= (short) ((InterruptMaskLevel & 7) << 8);
value |= (short)((InterruptMaskLevel & 7) << 8);
return value;
}
set
@ -120,7 +122,7 @@ namespace BizHawk.Emulation.CPUs.M68000
{
Console.WriteLine(Disassemble(PC));
op = (ushort) ReadWord(PC);
op = (ushort)ReadWord(PC);
PC += 2;
Opcodes[op]();
}
@ -134,7 +136,7 @@ namespace BizHawk.Emulation.CPUs.M68000
{
// TODO: Entering interrupt is not free. how many cycles does it take?
//Log.Error("CPU","****** ENTER INTERRUPT {0} *******", Interrupt);
short sr = (short) SR; // capture current SR.
short sr = (short)SR; // capture current SR.
S = true; // switch to supervisor mode, if not already in it.
A[7].s32 -= 4; // Push PC on stack
WriteLong(A[7].s32, PC);
@ -149,7 +151,7 @@ namespace BizHawk.Emulation.CPUs.M68000
int prevCycles = PendingCycles;
//Log.Note("CPU", State());
op = (ushort)ReadWord(PC);
if (Opcodes[op] == null) throw new Exception(string.Format("unhandled opcode at pc={0:X6}",PC));
if (Opcodes[op] == null) throw new Exception(string.Format("unhandled opcode at pc={0:X6}", PC));
PC += 2;
Opcodes[op]();
int delta = prevCycles - PendingCycles;
@ -210,7 +212,7 @@ namespace BizHawk.Emulation.CPUs.M68000
{
string[] args = reader.ReadLine().Split(' ');
if (args[0].Trim() == "") continue;
if (args[0] == "[/"+id+"]") break;
if (args[0] == "[/" + id + "]") break;
else if (args[0] == "D0") D[0].s32 = int.Parse(args[1], NumberStyles.HexNumber);
else if (args[0] == "D1") D[1].s32 = int.Parse(args[1], NumberStyles.HexNumber);
else if (args[0] == "D2") D[2].s32 = int.Parse(args[1], NumberStyles.HexNumber);

32
BizHawk.Emulation/CPUs/68000/Memory.cs
View File

@ -1,6 +1,6 @@
using System;
namespace BizHawk.Emulation.CPUs.M68000
namespace BizHawk.Emulation.Common.Components.M68000
{
partial class MC68000
{
@ -44,7 +44,7 @@ namespace BizHawk.Emulation.CPUs.M68000
value = ReadByte((pc + GetIndex()));
return value;
case 4: // immediate
value = (sbyte) ReadWord(PC); PC += 2;
value = (sbyte)ReadWord(PC); PC += 2;
return value;
default:
throw new Exception("Invalid addressing mode!");
@ -190,7 +190,7 @@ namespace BizHawk.Emulation.CPUs.M68000
value = ReadByte((PC + PeekIndex()));
return value;
case 4: // immediate
return (sbyte) ReadWord(PC);
return (sbyte)ReadWord(PC);
default:
throw new Exception("Invalid addressing mode!");
}
@ -324,13 +324,13 @@ namespace BizHawk.Emulation.CPUs.M68000
int addr;
switch (mode)
{
case 0: return "D"+reg; // Dn
case 1: return "A"+reg; // An
case 2: return "(A"+reg+")"; // (An)
case 3: return "(A"+reg+")+"; // (An)+
case 4: return "-(A"+reg+")"; // -(An)
case 0: return "D" + reg; // Dn
case 1: return "A" + reg; // An
case 2: return "(A" + reg + ")"; // (An)
case 3: return "(A" + reg + ")+"; // (An)+
case 4: return "-(A" + reg + ")"; // -(An)
case 5: value = string.Format("(${0:X},A{1})", ReadWord(pc), reg); pc += 2; return value; // (d16,An)
case 6: addr = ReadWord(pc); pc += 2; return DisassembleIndex("A" + reg, (short) addr); // (d8,An,Xn)
case 6: addr = ReadWord(pc); pc += 2; return DisassembleIndex("A" + reg, (short)addr); // (d8,An,Xn)
case 7:
switch (reg)
{
@ -361,7 +361,7 @@ namespace BizHawk.Emulation.CPUs.M68000
immed = (byte)ReadWord(pc); pc += 2;
return String.Format("${0:X}", immed);
case 2:
immed = (ushort) ReadWord(pc); pc += 2;
immed = (ushort)ReadWord(pc); pc += 2;
return String.Format("${0:X}", immed);
case 4:
immed = ReadLong(pc); pc += 4;
@ -377,17 +377,17 @@ namespace BizHawk.Emulation.CPUs.M68000
{
case 0: return "INVALID"; // Dn
case 1: return "INVALID"; // An
case 2: return "(A"+reg+")"; // (An)
case 3: return "(A"+reg+")+"; // (An)+
case 4: return "-(A"+reg+")"; // -(An)
case 2: return "(A" + reg + ")"; // (An)
case 3: return "(A" + reg + ")+"; // (An)+
case 4: return "-(A" + reg + ")"; // -(An)
case 5: addr = ReadWord(pc); pc += 2; return String.Format("({0},A{1})", addr, reg); // (d16,An)
case 6: addr = ReadWord(pc); pc += 2; return DisassembleIndex("A" + reg, (short)addr); // (d8,An,Xn)
case 7:
switch (reg)
{
case 0: addr = ReadWord(pc); pc += 2; return String.Format("${0:X}.w",addr); // (imm).w
case 1: addr = ReadLong(pc); pc += 4; return String.Format("${0:X}.l",addr); // (imm).l
case 2: addr = ReadWord(pc); pc += 2; return String.Format("(${0:X},PC)",addr); // (d16,PC)
case 0: addr = ReadWord(pc); pc += 2; return String.Format("${0:X}.w", addr); // (imm).w
case 1: addr = ReadLong(pc); pc += 4; return String.Format("${0:X}.l", addr); // (imm).l
case 2: addr = ReadWord(pc); pc += 2; return String.Format("(${0:X},PC)", addr); // (d16,PC)
case 3: addr = ReadWord(pc); pc += 2; return DisassembleIndex("PC", (short)addr); // (d8,PC,Xn)
case 4: return "INVALID"; // immediate
}

24
BizHawk.Emulation/CPUs/68000/OpcodeTable.cs
View File

@ -3,7 +3,7 @@ using System.Collections.Generic;
using BizHawk.Common;
namespace BizHawk.Emulation.CPUs.M68000
namespace BizHawk.Emulation.Common.Components.M68000
{
partial class MC68000
{
@ -17,8 +17,8 @@ namespace BizHawk.Emulation.CPUs.M68000
Assign("move", MOVE, "00", "Size2_0", "XnAm", "AmXn");
Assign("movea", MOVEA, "00", "Size2_0", "Xn", "001", "AmXn");
Assign("moveq", MOVEQ, "0111", "Xn", "0", "Data8");
Assign("movem", MOVEM0,"010010001", "Size1", "AmXn");
Assign("movem", MOVEM1,"010011001", "Size1", "AmXn");
Assign("movem", MOVEM0, "010010001", "Size1", "AmXn");
Assign("movem", MOVEM1, "010011001", "Size1", "AmXn");
Assign("lea", LEA, "0100", "Xn", "111", "AmXn");
Assign("clr", CLR, "01000010", "Size2_1", "AmXn");
Assign("ext", EXT, "010010001", "Size1", "000", "Xn");
@ -35,7 +35,7 @@ namespace BizHawk.Emulation.CPUs.M68000
Assign("roxr", ROXRd, "1110", "Data3", "0", "Size2_1", "Data1", "10", "Xn");
Assign("rol", ROLd, "1110", "Data3", "1", "Size2_1", "Data1", "11", "Xn");
Assign("ror", RORd, "1110", "Data3", "0", "Size2_1", "Data1", "11", "Xn");
Assign("swap", SWAP, "0100100001000","Xn");
Assign("swap", SWAP, "0100100001000", "Xn");
Assign("and", AND0, "1100", "Xn", "0", "Size2_1", "AmXn");
Assign("and", AND1, "1100", "Xn", "1", "Size2_1", "AmXn");
Assign("eor", EOR, "1011", "Xn", "1", "Size2_1", "AmXn");
@ -49,7 +49,7 @@ namespace BizHawk.Emulation.CPUs.M68000
Assign("bcc", Bcc, "0110", "CondMain", "Data8");
Assign("bra", BRA, "01100000", "Data8");
Assign("bsr", BSR, "01100001", "Data8");
Assign("scc", Scc, "0101", "CondAll", "11","AmXn");
Assign("scc", Scc, "0101", "CondAll", "11", "AmXn");
Assign("dbcc", DBcc, "0101", "CondAll", "11001", "Xn");
Assign("rte", RTE, "0100111001110011");
Assign("rts", RTS, "0100111001110101");
@ -121,7 +121,7 @@ namespace BizHawk.Emulation.CPUs.M68000
foreach (var opcode in opList)
{
int opc = Convert.ToInt32(opcode, 2);
if (Opcodes[opc] != null && instr.NotIn("movea","andi2sr","eori2sr","ori2sr","ext","dbcc","swap","cmpm"))
if (Opcodes[opc] != null && instr.NotIn("movea", "andi2sr", "eori2sr", "ori2sr", "ext", "dbcc", "swap", "cmpm"))
Console.WriteLine("Setting opcode for {0}, a handler is already set. overwriting. {1:X4}", instr, opc);
Opcodes[opc] = exec;
}
@ -129,7 +129,7 @@ namespace BizHawk.Emulation.CPUs.M68000
void AppendConstant(List<string> ops, string constant)
{
for (int i=0; i<ops.Count; i++)
for (int i = 0; i < ops.Count; i++)
ops[i] = ops[i] + constant;
}
@ -150,7 +150,7 @@ namespace BizHawk.Emulation.CPUs.M68000
foreach (var input in ops)
for (int i = 0; i < BinaryExp(bits); i++)
output.Add(input+Convert.ToString(i, 2).PadLeft(bits, '0'));
output.Add(input + Convert.ToString(i, 2).PadLeft(bits, '0'));
return output;
}
@ -165,10 +165,10 @@ namespace BizHawk.Emulation.CPUs.M68000
#region Tables
static readonly string[] Size2_0 = {"01", "11", "10"};
static readonly string[] Size2_1 = {"00", "01", "10"};
static readonly string[] Size1 = {"0", "1" };
static readonly string[] Xn3 = {"000","001","010","011","100","101","110","111"};
static readonly string[] Size2_0 = { "01", "11", "10" };
static readonly string[] Size2_1 = { "00", "01", "10" };
static readonly string[] Size1 = { "0", "1" };
static readonly string[] Xn3 = { "000", "001", "010", "011", "100", "101", "110", "111" };
static readonly string[] Xn3Am3 = {
"000000", // Dn Data register

4
BizHawk.Emulation/CPUs/68000/Tables.cs
View File

@ -1,8 +1,8 @@
namespace BizHawk.Emulation.CPUs.M68000
namespace BizHawk.Emulation.Common.Components.M68000
{
partial class MC68000
{
static readonly int[,] MoveCyclesBW = new int[12,9]
static readonly int[,] MoveCyclesBW = new int[12, 9]
{
{ 4, 4, 8, 8, 8, 12, 14, 12, 16 },
{ 4, 4, 8, 8, 8, 12, 14, 12, 16 },

2
BizHawk.Emulation/CPUs/CP1610/CP1610.cs
View File

@ -1,7 +1,7 @@
using System;
using System.IO;
namespace BizHawk.Emulation.CPUs.CP1610
namespace BizHawk.Emulation.Common.Components.CP1610
{
public sealed partial class CP1610
{

2
BizHawk.Emulation/CPUs/CP1610/Disassembler.cs
View File

@ -1,4 +1,4 @@
namespace BizHawk.Emulation.CPUs.CP1610
namespace BizHawk.Emulation.Common.Components.CP1610
{
public sealed partial class CP1610
{

2
BizHawk.Emulation/CPUs/CP1610/Execute.cs
View File

@ -1,6 +1,6 @@
using System;
namespace BizHawk.Emulation.CPUs.CP1610
namespace BizHawk.Emulation.Common.Components.CP1610
{
public sealed partial class CP1610
{

2
BizHawk.Emulation/CPUs/HuC6280/Disassembler.cs
View File

@ -1,4 +1,4 @@
namespace BizHawk.Emulation.CPUs.H6280
namespace BizHawk.Emulation.Common.Components.H6280
// Do not modify this file directly! This is GENERATED code.
// Please open the CpuCoreGenerator solution and make your modifications there.

2
BizHawk.Emulation/CPUs/HuC6280/Execute.cs
View File

@ -3,7 +3,7 @@ using System;
// Do not modify this file directly! This is GENERATED code.
// Please open the CpuCoreGenerator solution and make your modifications there.
namespace BizHawk.Emulation.CPUs.H6280
namespace BizHawk.Emulation.Common.Components.H6280
{
public partial class HuC6280
{

2
BizHawk.Emulation/CPUs/HuC6280/HuC6280.cs
View File

@ -4,7 +4,7 @@ using System.IO;
using BizHawk.Common;
namespace BizHawk.Emulation.CPUs.H6280
namespace BizHawk.Emulation.Common.Components.H6280
{
public sealed partial class HuC6280
{

2
BizHawk.Emulation/CPUs/MOS 6502X/Disassembler.cs
View File

@ -1,7 +1,7 @@
// Do not modify this file directly! This is GENERATED code.
// Please open the CpuCoreGenerator solution and make your modifications there.
namespace BizHawk.Emulation.CPUs.M6502
namespace BizHawk.Emulation.Common.Components.M6502
{
public partial class MOS6502X
{

3
BizHawk.Emulation/CPUs/MOS 6502X/Execute.cs
View File

@ -1,10 +1,9 @@
//http://nesdev.parodius.com/6502_cpu.txt
using System;
using BizHawk.Common;
namespace BizHawk.Emulation.CPUs.M6502
namespace BizHawk.Emulation.Common.Components.M6502
{
public partial class MOS6502X
{

2
BizHawk.Emulation/CPUs/MOS 6502X/MOS6502X.cs
View File

@ -3,7 +3,7 @@ using System.IO;
using BizHawk.Common;
namespace BizHawk.Emulation.CPUs.M6502
namespace BizHawk.Emulation.Common.Components.M6502
{
public sealed partial class MOS6502X
{

2
BizHawk.Emulation/CPUs/MOS 6502X/MOS6502XDouble.cs
View File

@ -4,7 +4,7 @@ using System.IO;
using BizHawk.Common;
namespace BizHawk.Emulation.CPUs.M6502
namespace BizHawk.Emulation.Common.Components.M6502
{
/// <summary>
/// maintains a managed 6502X and an unmanaged 6502X, running them alongside and ensuring consistency

2
BizHawk.Emulation/CPUs/MOS 6502X/MOS6502XNative.cs
View File

@ -3,7 +3,7 @@ using System.Runtime.InteropServices;
using BizHawk.Common;
namespace BizHawk.Emulation.CPUs.M6502
namespace BizHawk.Emulation.Common.Components.M6502
{
public static class MOS6502X_DLL
{

2
BizHawk.Emulation/CPUs/Z80-GB/Execute.cs
View File

@ -30,7 +30,7 @@ using System;
SRL
*/
namespace BizHawk.Emulation.CPUs.Z80GB
namespace BizHawk.Emulation.Common.Components.Z80GB
{
public partial class Z80
{

2
BizHawk.Emulation/CPUs/Z80-GB/Interrupts.cs
View File

@ -1,6 +1,6 @@
using System;
namespace BizHawk.Emulation.CPUs.Z80GB
namespace BizHawk.Emulation.Common.Components.Z80GB
{
public partial class Z80
{

2
BizHawk.Emulation/CPUs/Z80-GB/NewDisassembler.cs
View File

@ -2,7 +2,7 @@
using System.Collections.Generic;
using System.Text;
namespace BizHawk.Emulation.CPUs.Z80GB
namespace BizHawk.Emulation.Common.Components.Z80GB
{
// adapted from the information at http://www.pastraiser.com/cpu/gameboy/gameboy_opcodes.html
public class NewDisassembler

6
BizHawk.Emulation/CPUs/Z80-GB/Registers.cs
View File

@ -1,7 +1,7 @@
using System.Runtime.InteropServices;
using System;
namespace BizHawk.Emulation.CPUs.Z80GB
namespace BizHawk.Emulation.Common.Components.Z80GB
{
public partial class Z80
{
@ -86,13 +86,13 @@ namespace BizHawk.Emulation.CPUs.Z80GB
public byte RegisterF
{
get { return RegAF.Low; }
set { RegAF.Low = (byte)(value&0xF0); }
set { RegAF.Low = (byte)(value & 0xF0); }
}
public ushort RegisterAF
{
get { return RegAF.Word; }
set { RegAF.Word = (byte)(value&0xFFF0); }
set { RegAF.Word = (byte)(value & 0xFFF0); }
}
public byte RegisterB

2
BizHawk.Emulation/CPUs/Z80-GB/Tables.cs
View File

@ -1,4 +1,4 @@
namespace BizHawk.Emulation.CPUs.Z80GB
namespace BizHawk.Emulation.Common.Components.Z80GB
{
public partial class Z80
{

2
BizHawk.Emulation/CPUs/Z80-GB/Z80.cs
View File

@ -5,7 +5,7 @@ using System.IO;
// This Z80-Gameboy emulator is a modified version of Ben Ryves 'Brazil' emulator.
// It is MIT licensed (not public domain). (See Licenses)
namespace BizHawk.Emulation.CPUs.Z80GB
namespace BizHawk.Emulation.Common.Components.Z80GB
{
public sealed partial class Z80
{

2
BizHawk.Emulation/CPUs/Z80/Disassembler.cs
View File

@ -12,7 +12,7 @@
using System;
namespace BizHawk.Emulation.CPUs.Z80
namespace BizHawk.Emulation.Common.Components.Z80
{
public class Disassembler
{

715
BizHawk.Emulation/CPUs/Z80/Execute.cs
View File

File diff suppressed because it is too large Load Diff

2
BizHawk.Emulation/CPUs/Z80/Interrupts.cs
View File

@ -1,6 +1,6 @@
using System;
namespace BizHawk.Emulation.CPUs.Z80
namespace BizHawk.Emulation.Common.Components.Z80
{
public partial class Z80A
{

2
BizHawk.Emulation/CPUs/Z80/Registers.cs
View File

@ -1,7 +1,7 @@
using System.Runtime.InteropServices;
using System;
namespace BizHawk.Emulation.CPUs.Z80
namespace BizHawk.Emulation.Common.Components.Z80
{
public partial class Z80A
{

24
BizHawk.Emulation/CPUs/Z80/Tables.cs
View File

@ -1,4 +1,4 @@
namespace BizHawk.Emulation.CPUs.Z80
namespace BizHawk.Emulation.Common.Components.Z80
{
public partial class Z80A
{
@ -212,21 +212,29 @@ namespace BizHawk.Emulation.CPUs.Z80
New <<= 1;
if ((y & 0x04) == 0) {
if ((y & 0x04) == 0)
{
if (((y & 0x02) == 0) ? ((newAf & 0x01) != 0) : OldCarry) New |= 0x01;
} else {
}
else
{
if ((y & 0x02) != 0) New |= 0x01;
}
} else {
}
else
{
if ((Old & 0x01) != 0) ++newAf;
New >>= 1;
if ((y & 0x04) == 0) {
if ((y & 0x04) == 0)
{
if (((y & 0x02) == 0) ? ((newAf & 0x01) != 0) : OldCarry) New |= 0x80;
} else {
}
else
{
if ((y & 0x02) == 0) New |= (byte)(Old & 0x80);
}
}
@ -276,7 +284,9 @@ namespace BizHawk.Emulation.CPUs.Z80
{
if (IsH(af) || ((a & 0x0F) > 0x09)) tmp -= 0x06;
if (IsC(af) || a > 0x99) tmp -= 0x60;
} else {
}
else
{
if (IsH(af) || ((a & 0x0F) > 0x09)) tmp += 0x06;
if (IsC(af) || a > 0x99) tmp += 0x60;
}

4
BizHawk.Emulation/CPUs/Z80/Z80A.cs
View File

@ -5,7 +5,7 @@ using System.IO;
// This Z80 emulator is a modified version of Ben Ryves 'Brazil' emulator.
// It is MIT licensed.
namespace BizHawk.Emulation.CPUs.Z80
namespace BizHawk.Emulation.Common.Components.Z80
{
/// <summary>
/// ZiLOG Z80A CPU Emulator
@ -51,7 +51,7 @@ namespace BizHawk.Emulation.CPUs.Z80
public ushort ReadWord(ushort addr)
{
ushort value = ReadMemory(addr++);
value |= (ushort) (ReadMemory(addr) << 8);
value |= (ushort)(ReadMemory(addr) << 8);
return value;
}

4
BizHawk.Emulation/CPUs/x86/Disassembler.cs
View File

@ -1,6 +1,6 @@
using System.Text;
namespace BizHawk.Emulation.CPUs.x86
namespace BizHawk.Emulation.Common.Components.x86
{
public class DisassemblyInfo
{
@ -43,7 +43,7 @@ namespace BizHawk.Emulation.CPUs.x86
case 7: reg = "BH"; break;
default: reg = "UNKNOWN"; break;
}
return reg+", "+DisassembleMod(ref addr, mod, m, 1);
return reg + ", " + DisassembleMod(ref addr, mod, m, 1);
}
private string DisassembleMod(ref int addr, int mod, int m, int size)

4
BizHawk.Emulation/CPUs/x86/Execute.cs
View File

@ -1,8 +1,8 @@
using System;
namespace BizHawk.Emulation.CPUs.x86
namespace BizHawk.Emulation.Common.Components.x86
{
public partial class x86<CpuType> where CpuType: struct, x86CpuType
public partial class x86<CpuType> where CpuType : struct, x86CpuType
{
public void Execute(int cycles)
{

2
BizHawk.Emulation/CPUs/x86/Timing.cs
View File

@ -1,4 +1,4 @@
namespace BizHawk.Emulation.CPUs.x86
namespace BizHawk.Emulation.Common.Components.x86
{
public partial class x86<CpuType> where CpuType : struct, x86CpuType
{

4
BizHawk.Emulation/CPUs/x86/x86.cs
View File

@ -1,12 +1,12 @@
using System;
using System.Runtime.InteropServices;
namespace BizHawk.Emulation.CPUs.x86
namespace BizHawk.Emulation.Common.Components.x86
{
public interface x86CpuType { };
public struct Intel8086 : x86CpuType { };
public sealed partial class x86<CpuType> where CpuType: struct, x86CpuType
public sealed partial class x86<CpuType> where CpuType : struct, x86CpuType
{
// Machine State
public Register16 RegAX;

2
BizHawk.Emulation/Calculator/TI83.cs
View File

@ -5,7 +5,7 @@ using System.Collections.Generic;
using BizHawk.Common;
using BizHawk.Emulation.Common;
using BizHawk.Emulation.CPUs.Z80;
using BizHawk.Emulation.Common.Components.Z80;
//http://www.ticalc.org/pub/text/calcinfo/

2
BizHawk.Emulation/Computers/Commodore64/Disk/VIC1541.cs
View File

@ -1,5 +1,5 @@
using System;
using BizHawk.Emulation.CPUs.M6502;
using BizHawk.Emulation.Common.Components.M6502;
#if false

5
BizHawk.Emulation/Computers/Commodore64/Experimental/Chips/Internals/Cpu.Internal.cs
View File

@ -1,9 +1,10 @@
using BizHawk.Emulation.CPUs.M6502;
using System;
using System;
using System.Collections.Generic;
using System.Linq;
using System.Text;
using BizHawk.Emulation.Common.Components.M6502;
namespace BizHawk.Emulation.Cores.Computers.Commodore64.Experimental
{
sealed public partial class Cpu

4
BizHawk.Emulation/Computers/Commodore64/MOS/MOS6510.cs
View File

@ -1,9 +1,9 @@
using BizHawk.Emulation.CPUs.M6502;
using System;
using System;
using System.Collections.Generic;
using System.Runtime.InteropServices;
using BizHawk.Common;
using BizHawk.Emulation.Common.Components.M6502;
namespace BizHawk.Emulation.Cores.Computers.Commodore64
{

2
BizHawk.Emulation/Consoles/Atari/2600/Atari2600.Core.cs
View File

@ -1,7 +1,7 @@
using System;
using BizHawk.Common;
using BizHawk.Emulation.CPUs.M6502;
using BizHawk.Emulation.Common.Components.M6502;
namespace BizHawk.Emulation.Cores.Atari.Atari2600

2
BizHawk.Emulation/Consoles/Coleco/ColecoVision.cs
View File

@ -4,7 +4,7 @@ using System.IO;
using BizHawk.Common;
using BizHawk.Emulation.Common;
using BizHawk.Emulation.CPUs.Z80;
using BizHawk.Emulation.Common.Components.Z80;
using BizHawk.Emulation.Sound;
namespace BizHawk.Emulation.Cores.ColecoVision

2
BizHawk.Emulation/Consoles/Coleco/TMS9918A.cs
View File

@ -4,7 +4,7 @@ using System.IO;
using BizHawk.Common;
using BizHawk.Emulation.Common;
using BizHawk.Emulation.CPUs.Z80;
using BizHawk.Emulation.Common.Components.Z80;
namespace BizHawk.Emulation.Cores.ColecoVision
{

2
BizHawk.Emulation/Consoles/Intellivision/Intellivision.cs
View File

@ -3,7 +3,7 @@ using System.IO;
using System.Collections.Generic;
using BizHawk.Emulation.Common;
using BizHawk.Emulation.CPUs.CP1610;
using BizHawk.Emulation.Common.Components.CP1610;
namespace BizHawk.Emulation.Cores.Intellivision
{

2
BizHawk.Emulation/Consoles/Nintendo/Gameboy/Gambatte.cs
View File

@ -543,7 +543,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.Gameboy
s[10] & 0xff,
s[11] != 0 ? "skip" : "",
s[12] & 0xff,
CPUs.Z80GB.NewDisassembler.Disassemble((ushort)s[1], (addr) => LibGambatte.gambatte_cpuread(GambatteState, addr), out unused).PadRight(30)
Common.Components.Z80GB.NewDisassembler.Disassemble((ushort)s[1], (addr) => LibGambatte.gambatte_cpuread(GambatteState, addr), out unused).PadRight(30)
));
}

2
BizHawk.Emulation/Consoles/Nintendo/NES/Core.cs
View File

@ -4,7 +4,7 @@ using System.Runtime.CompilerServices;
using BizHawk.Common;
using BizHawk.Emulation.Common;
using BizHawk.Emulation.CPUs.M6502;
using BizHawk.Emulation.Common.Components.M6502;
#pragma warning disable 162

2
BizHawk.Emulation/Consoles/PC Engine/PCEngine.cs
View File

@ -5,7 +5,7 @@ using System.IO;
using BizHawk.Common;
using BizHawk.Emulation.Common;
using BizHawk.Emulation.CPUs.H6280;
using BizHawk.Emulation.Common.Components.H6280;
using BizHawk.Emulation.DiscSystem;
using BizHawk.Emulation.Sound;

2
BizHawk.Emulation/Consoles/PC Engine/VDC.cs
View File

@ -4,7 +4,7 @@ using System.IO;
using BizHawk.Common;
using BizHawk.Emulation.Common;
using BizHawk.Emulation.CPUs.H6280;
using BizHawk.Emulation.Common.Components.H6280;
namespace BizHawk.Emulation.Cores.PCEngine
{

2
BizHawk.Emulation/Consoles/PC Engine/VPC.cs
View File

@ -3,7 +3,7 @@ using System.IO;
using BizHawk.Common;
using BizHawk.Emulation.Common;
using BizHawk.Emulation.CPUs.H6280;
using BizHawk.Emulation.Common.Components.H6280;
namespace BizHawk.Emulation.Cores.PCEngine
{

4
BizHawk.Emulation/Consoles/Sega/Genesis/Genesis.cs
View File

@ -7,8 +7,8 @@ using System.Runtime.InteropServices;
using BizHawk.Common;
using BizHawk.Emulation.Common;
using BizHawk.Emulation.CPUs.M68000;
using BizHawk.Emulation.CPUs.Z80;
using BizHawk.Emulation.Common.Components.M68000;
using BizHawk.Emulation.Common.Components.Z80;
using BizHawk.Emulation.Sound;
using Native68000;

2
BizHawk.Emulation/Consoles/Sega/SMS/SMS.cs
View File

@ -5,7 +5,7 @@ using System.IO;
using BizHawk.Common;
using BizHawk.Emulation.Common;
using BizHawk.Emulation.CPUs.Z80;
using BizHawk.Emulation.Common.Components.Z80;
using BizHawk.Emulation.Sound;
/*****************************************************

2
BizHawk.Emulation/Consoles/Sega/SMS/VDP.cs
View File

@ -4,7 +4,7 @@ using System.IO;
using BizHawk.Common;
using BizHawk.Emulation.Common;
using BizHawk.Emulation.CPUs.Z80;
using BizHawk.Emulation.Common.Components.Z80;
namespace BizHawk.Emulation.Cores.Sega.MasterSystem