From 7655e5194e16794b3c04d51bd2612e89d5634592 Mon Sep 17 00:00:00 2001 From: alyosha-tas Date: Tue, 2 Apr 2019 19:25:48 -0500 Subject: [PATCH] Vectrex 6809 --- .../CPUs/MC6809/Execute.cs | 32 ++--- .../CPUs/MC6809/Indexed_Modes.cs | 32 ++++- BizHawk.Emulation.Cores/CPUs/MC6809/MC6809.cs | 44 +++++- .../CPUs/MC6809/Tables_Direct.cs | 125 +++++++++++++++++- 4 files changed, 203 insertions(+), 30 deletions(-) diff --git a/BizHawk.Emulation.Cores/CPUs/MC6809/Execute.cs b/BizHawk.Emulation.Cores/CPUs/MC6809/Execute.cs index be0896922c..5f60b7966d 100644 --- a/BizHawk.Emulation.Cores/CPUs/MC6809/Execute.cs +++ b/BizHawk.Emulation.Cores/CPUs/MC6809/Execute.cs @@ -76,17 +76,17 @@ namespace BizHawk.Emulation.Common.Components.MC6809 case 0x32: INDEX_OP(LEAS); break; // LEAS (Indexed) case 0x33: INDEX_OP(LEAU); break; // LEAU (Indexed) case 0x34: PSH(SP); break; // PSHS (Immediate) - case 0x35: ; break; // PULS (Immediate) + case 0x35: PUL(SP); break; // PULS (Immediate) case 0x36: PSH(US); break; // PSHU (Immediate) - case 0x37: ; break; // PULU (Immediate) + case 0x37: PUL(US); break; // PULU (Immediate) case 0x38: ILLEGAL(); break; // ILLEGAL case 0x39: RTS(); break; // RTS (Inherent) case 0x3A: ABX_(); break; // ABX (Inherent) case 0x3B: RTI(); break; // RTI (Inherent) - case 0x3C: ; break; // CWAI (Inherent) + case 0x3C: CWAI_(); break; // CWAI (Inherent) case 0x3D: MUL_(); break; // MUL (Inherent) case 0x3E: ILLEGAL(); break; // ILLEGAL - case 0x3F: ; break; // SWI (Inherent) + case 0x3F: SWI1(); break; // SWI (Inherent) case 0x40: REG_OP(NEG, A); break; // NEGA (Inherent) case 0x41: ILLEGAL(); break; // ILLEGAL case 0x42: ILLEGAL(); break; // ILLEGAL @@ -119,22 +119,22 @@ namespace BizHawk.Emulation.Common.Components.MC6809 case 0x5D: REG_OP(TST, B); break; // TSTB (Inherent) case 0x5E: ILLEGAL(); break; // ILLEGAL case 0x5F: REG_OP(CLR, B); break; // CLRB (Inherent) - case 0x60: REG_OP(TR, B); break; // NEG (Indexed) + case 0x60: INDEX_OP(I_NEG); break; // NEG (Indexed) case 0x61: ILLEGAL(); break; // ILLEGAL case 0x62: ILLEGAL(); break; // ILLEGAL - case 0x63: REG_OP(TR, B); break; // COM (Indexed) - case 0x64: REG_OP(TR, B); break; // LSR (Indexed) + case 0x63: INDEX_OP(I_COM); break; // COM (Indexed) + case 0x64: INDEX_OP(I_LSR); break; // LSR (Indexed) case 0x65: ILLEGAL(); break; // ILLEGAL - case 0x66: REG_OP(TR, B); break; // ROR (Indexed) - case 0x67: REG_OP(TR, A); break; // ASR (Indexed) - case 0x68: REG_OP(TR, A); break; // ASL , LSL (Indexed) - case 0x69: REG_OP(TR, A); break; // ROL (Indexed) - case 0x6A: REG_OP(TR, A); break; // DEC (Indexed) + case 0x66: INDEX_OP(I_ROR); break; // ROR (Indexed) + case 0x67: INDEX_OP(I_ASR); break; // ASR (Indexed) + case 0x68: INDEX_OP(I_ASL); break; // ASL , LSL (Indexed) + case 0x69: INDEX_OP(I_ROL); break; // ROL (Indexed) + case 0x6A: INDEX_OP(I_DEC); break; // DEC (Indexed) case 0x6B: ILLEGAL(); break; // ILLEGAL - case 0x6C: REG_OP(TR, A); break; // INC (Indexed) - case 0x6D: REG_OP(TR, A); break; // TST (Indexed) - case 0x6E: REG_OP(TR, A); break; // JMP (Indexed) - case 0x6F: REG_OP(TR, A); break; // CLR (Indexed) + case 0x6C: INDEX_OP(I_INC); break; // INC (Indexed) + case 0x6D: INDEX_OP(I_TST); break; // TST (Indexed) + case 0x6E: INDEX_OP(I_JMP); break; // JMP (Indexed) + case 0x6F: INDEX_OP(I_CLR); break; // CLR (Indexed) case 0x70: EXT_MEM(NEG); break; // NEG (Extended) case 0x71: ILLEGAL(); break; // ILLEGAL case 0x72: ILLEGAL(); break; // ILLEGAL diff --git a/BizHawk.Emulation.Cores/CPUs/MC6809/Indexed_Modes.cs b/BizHawk.Emulation.Cores/CPUs/MC6809/Indexed_Modes.cs index 867e94dfe4..51ceca997c 100644 --- a/BizHawk.Emulation.Cores/CPUs/MC6809/Indexed_Modes.cs +++ b/BizHawk.Emulation.Cores/CPUs/MC6809/Indexed_Modes.cs @@ -8,7 +8,18 @@ namespace BizHawk.Emulation.Common.Components.MC6809 public const ushort LEAY = 1; public const ushort LEAS = 2; public const ushort LEAU = 3; - public const ushort JMP = 4; + public const ushort I_NEG = 4; + public const ushort I_COM = 5; + public const ushort I_LSR = 6; + public const ushort I_ROR = 7; + public const ushort I_ASR = 8; + public const ushort I_ASL = 9; + public const ushort I_ROL = 10; + public const ushort I_DEC = 11; + public const ushort I_INC = 12; + public const ushort I_TST = 13; + public const ushort I_JMP = 14; + public const ushort I_CLR = 15; public ushort indexed_op; public ushort indexed_reg; @@ -38,9 +49,12 @@ namespace BizHawk.Emulation.Common.Components.MC6809 PopulateCURINSTR(RD_INC_OP, ALU, PC, IDX_DCDE); } - private void INDEX_OP_EX6() + private void INDEX_OP_EX6(ushort oper) { - PopulateCURINSTR(RD_INC_OP, ALU, PC, IDX_DCDE); + PopulateCURINSTR(IDLE, + RD, ALU, IDX_EA, + oper, ALU, + WR, IDX_EA, ALU); } private void INDEX_OP_EX7() @@ -284,6 +298,18 @@ namespace BizHawk.Emulation.Common.Components.MC6809 case LEAY: INDEX_OP_LEA(Y); break; // LEAY case LEAS: INDEX_OP_LEA(SP); break; // LEAS case LEAU: INDEX_OP_LEA(US); break; // LEAU + case I_NEG: INDEX_OP_EX6(NEG); break; // NEG + case I_COM: INDEX_OP_EX6(COM); break; // COM + case I_LSR: INDEX_OP_EX6(LSR); break; // LSR + case I_ROR: INDEX_OP_EX6(ROR); break; // ROR + case I_ASR: INDEX_OP_EX6(ASR); break; // ASR + case I_ASL: INDEX_OP_EX6(ASL); break; // ASL + case I_ROL: INDEX_OP_EX6(ROL); break; // ROL + case I_DEC: INDEX_OP_EX6(DEC8); break; // DEC + case I_INC: INDEX_OP_EX6(INC8); break; // INC + case I_TST: INDEX_OP_EX6(TST); break; // TST + case I_JMP: INDEX_OP_JMP(); break; // JMP + case I_CLR: INDEX_OP_EX6(CLR); break; // CLR } } } diff --git a/BizHawk.Emulation.Cores/CPUs/MC6809/MC6809.cs b/BizHawk.Emulation.Cores/CPUs/MC6809/MC6809.cs index e57d79cf01..e15ad9c7c8 100644 --- a/BizHawk.Emulation.Cores/CPUs/MC6809/MC6809.cs +++ b/BizHawk.Emulation.Cores/CPUs/MC6809/MC6809.cs @@ -47,7 +47,7 @@ namespace BizHawk.Emulation.Common.Components.MC6809 public const ushort SET = 32; public const ushort EI = 33; public const ushort DI = 34; - public const ushort HALT = 35; + public const ushort CWAI = 35; public const ushort STOP = 36; public const ushort ASGN = 38; public const ushort ADDS = 39; // signed 16 bit operation used in 2 instructions @@ -80,8 +80,13 @@ namespace BizHawk.Emulation.Common.Components.MC6809 public const ushort EA_8 = 66; public const ushort EA_16 = 67; public const ushort PSH_n = 68; - public const ushort WR_DEC_LO_OP = 69; - public const ushort WR_DEC_HI_OP = 70; + public const ushort PUL_n = 69; + public const ushort WR_DEC_LO_OP = 70; + public const ushort WR_DEC_HI_OP = 71; + public const ushort SET_ADDR_PUL = 72; + public const ushort SET_F_I = 73; + public const ushort SET_E = 74; + public const ushort ANDCC = 75; public MC6809() { @@ -233,6 +238,13 @@ namespace BizHawk.Emulation.Common.Components.MC6809 Regs[IDX_EA] = (ushort)(Regs[indexed_reg] + (((Regs[ALU2] & 0x80) == 0x80) ? (Regs[ALU2] | 0xFF00) : Regs[ALU2])); Index_Op_Builder(); break; + case PUL_n: + PUL_n_BLD(cur_instr[instr_pntr++]); + break; + case SET_ADDR_PUL: + Regs[cur_instr[instr_pntr++]] = (ushort)((Regs[ALU2] << 8) + Regs[ADDR]); + PUL_n_BLD(cur_instr[instr_pntr++]); + break; } break; case WR: @@ -302,9 +314,21 @@ namespace BizHawk.Emulation.Common.Components.MC6809 case MUL: Mul_Func(); break; + case SET_F_I: + FlagI = true; FlagF = true; + break; + case SET_E: + FlagE = true; + break; + case ANDCC: + Regs[CC] &= Regs[instr_pntr++]; + break; case PSH_n: PSH_n_BLD(cur_instr[instr_pntr++]); break; + case PUL_n: + PUL_n_BLD(cur_instr[instr_pntr++]); + break; case ADD16BR: ADD16BR_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++]); break; @@ -399,7 +423,7 @@ namespace BizHawk.Emulation.Common.Components.MC6809 interrupts_enabled = false; EI_pending = 0; break; - case HALT: + case CWAI: break; case STOP: @@ -479,7 +503,8 @@ namespace BizHawk.Emulation.Common.Components.MC6809 ushort d9 = 0, ushort d10 = 0, ushort d11 = 0, ushort d12 = 0, ushort d13 = 0, ushort d14 = 0, ushort d15 = 0, ushort d16 = 0, ushort d17 = 0, ushort d18 = 0, ushort d19 = 0, ushort d20 = 0, ushort d21 = 0, ushort d22 = 0, ushort d23 = 0, ushort d24 = 0, ushort d25 = 0, ushort d26 = 0, ushort d27 = 0, ushort d28 = 0, ushort d29 = 0, ushort d30 = 0, ushort d31 = 0, ushort d32 = 0, ushort d33 = 0, ushort d34 = 0, ushort d35 = 0, ushort d36 = 0, ushort d37 = 0, ushort d38 = 0, - ushort d39 = 0, ushort d40 = 0, ushort d41 = 0, ushort d42 = 0, ushort d43 = 0, ushort d44 = 0, ushort d45 = 0, ushort d46 = 0, ushort d47 = 0, ushort d48 = 0) + ushort d39 = 0, ushort d40 = 0, ushort d41 = 0, ushort d42 = 0, ushort d43 = 0, ushort d44 = 0, ushort d45 = 0, ushort d46 = 0, ushort d47 = 0, ushort d48 = 0, + ushort d49 = 0, ushort d50 = 0, ushort d51 = 0, ushort d52 = 0, ushort d53 = 0, ushort d54 = 0, ushort d55 = 0, ushort d56 = 0, ushort d57 = 0, ushort d58 = 0) { cur_instr[0] = d0; cur_instr[1] = d1; cur_instr[2] = d2; cur_instr[3] = d3; cur_instr[4] = d4; cur_instr[5] = d5; @@ -493,7 +518,14 @@ namespace BizHawk.Emulation.Common.Components.MC6809 cur_instr[27] = d27; cur_instr[28] = d28; cur_instr[29] = d29; cur_instr[30] = d30; cur_instr[31] = d31; cur_instr[32] = d32; cur_instr[33] = d33; cur_instr[34] = d34; cur_instr[35] = d35; - cur_instr[36] = d36; cur_instr[37] = d37; + cur_instr[36] = d36; cur_instr[37] = d37; cur_instr[38] = d38; + cur_instr[39] = d39; cur_instr[40] = d40; cur_instr[41] = d41; + cur_instr[42] = d42; cur_instr[43] = d43; cur_instr[44] = d44; + cur_instr[45] = d45; cur_instr[46] = d46; cur_instr[47] = d47; + cur_instr[48] = d48; cur_instr[49] = d49; cur_instr[50] = d50; + cur_instr[51] = d51; cur_instr[52] = d52; cur_instr[53] = d53; + cur_instr[54] = d54; cur_instr[55] = d55; cur_instr[56] = d56; + cur_instr[57] = d57; cur_instr[58] = d58; } // State Save/Load diff --git a/BizHawk.Emulation.Cores/CPUs/MC6809/Tables_Direct.cs b/BizHawk.Emulation.Cores/CPUs/MC6809/Tables_Direct.cs index 8304e32ec7..1f9242a311 100644 --- a/BizHawk.Emulation.Cores/CPUs/MC6809/Tables_Direct.cs +++ b/BizHawk.Emulation.Cores/CPUs/MC6809/Tables_Direct.cs @@ -262,6 +262,126 @@ namespace BizHawk.Emulation.Common.Components.MC6809 } } + private void PUL(ushort src) + { + PopulateCURINSTR(RD_INC, ALU, PC, + IDLE, + PSH_n, src); + } + + // Post byte info is in ALU + // mask out bits until the end + private void PUL_n_BLD(ushort src) + { + if (Regs[ALU].Bit(7)) + { + PopulateCURINSTR(RD_INC_OP, CC, src, PUL_n, src); + + Regs[ALU] &= 0x7F; + } + else if (Regs[ALU].Bit(6)) + { + PopulateCURINSTR(RD_INC_OP, A, src, PUL_n, src); + + Regs[ALU] &= 0x3F; + } + else if (Regs[ALU].Bit(5)) + { + PopulateCURINSTR(RD_INC_OP, B, src, PUL_n, src); + + + Regs[ALU] &= 0x1F; + } + else if (Regs[ALU].Bit(4)) + { + PopulateCURINSTR(RD_INC_OP, DP, src, PUL_n, src); + + Regs[ALU] &= 0xF; + } + else if (Regs[ALU].Bit(3)) + { + PopulateCURINSTR(RD_INC_OP, ALU2, src, + RD_INC_OP, ADDR, src, SET_ADDR_PUL, X, src); + + Regs[ALU] &= 0x7; + } + else if (Regs[ALU].Bit(2)) + { + PopulateCURINSTR(RD_INC_OP, ALU2, src, + RD_INC_OP, ADDR, src, SET_ADDR_PUL, Y, src); + + Regs[ALU] &= 0x3; + } + else if (Regs[ALU].Bit(1)) + { + if (src == US) + { + PopulateCURINSTR(RD_INC_OP, ALU2, src, + RD_INC_OP, ADDR, src, SET_ADDR_PUL, SP, src); + } + else + { + PopulateCURINSTR(RD_INC_OP, ALU2, src, + RD_INC_OP, ADDR, src, SET_ADDR_PUL, US, src); + } + + Regs[ALU] &= 0x1; + } + else if (Regs[ALU].Bit(0)) + { + PopulateCURINSTR(RD_INC_OP, ALU2, src, + RD_INC_OP, ADDR, src, SET_ADDR_PUL, PC, src); + } + else + { + // extra end cycle + PopulateCURINSTR(RD_INC_OP, IDLE); + } + } + + private void SWI1() + { + Regs[ADDR] = 0xFFFA; + PopulateCURINSTR(SET_E, + DEC16, SP, + WR_DEC_LO, SP, PC, + WR_DEC_HI, SP, PC, + WR_DEC_LO, SP, US, + WR_DEC_HI, SP, US, + WR_DEC_LO, SP, Y, + WR_DEC_HI, SP, Y, + WR_DEC_LO, SP, X, + WR_DEC_HI, SP, X, + WR_DEC_LO, SP, DP, + WR_DEC_LO, SP, B, + WR_DEC_LO, SP, A, + WR, SP, CC, + SET_F_I, + RD_INC, ALU, ADDR, + RD_INC, ALU2, ADDR, + SET_ADDR, ADDR, ALU, ALU2); + } + + private void CWAI_() + { + PopulateCURINSTR(RD_INC_OP, ALU, PC, ANDCC, ALU, + SET_E, + DEC16, SP, + WR_DEC_LO, SP, PC, + WR_DEC_HI, SP, PC, + WR_DEC_LO, SP, US, + WR_DEC_HI, SP, US, + WR_DEC_LO, SP, Y, + WR_DEC_HI, SP, Y, + WR_DEC_LO, SP, X, + WR_DEC_HI, SP, X, + WR_DEC_LO, SP, DP, + WR_DEC_LO, SP, B, + WR_DEC_LO, SP, A, + WR, SP, CC, + CWAI); + } + private void DEC_16(ushort src_l, ushort src_h) { @@ -277,11 +397,6 @@ namespace BizHawk.Emulation.Common.Components.MC6809 } - private void HALT_() - { - - } - private void JR_COND(bool cond) {