GameBoy:
-Remove BIOS support from Gambatte -Fix GBHawk audio desync -Fix controllers
This commit is contained in:
alyosha-tas
parent
a3ae61f03f
commit
63ef676251
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@ -85,7 +85,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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public int SQ1_vol_per, SQ2_vol_per, NOISE_vol_per;
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public int SQ1_intl_swp_cnt;
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public int NOISE_LFSR;
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public ushort SQ1_len_cntr, SQ2_len_cntr, WAVE_len_cntr, NOISE_len_cntr;
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public ushort SQ1_len_cntr, SQ2_len_cntr, WAVE_len_cntr, NOISE_len_cntr;
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// computed
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public int SQ1_output, SQ2_output, WAVE_output, NOISE_output;
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@ -454,10 +454,10 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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AUD_CTRL_sq2_R_en = (value & 2) > 0;
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AUD_CTRL_sq1_R_en = (value & 1) > 0;
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break;
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case 0xFF26: // NR52 (ctrl)
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case 0xFF26: // NR52 (ctrl)
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// NOTE: Make sure to do the power off first since it will call the write_reg function again
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if ((value & 0x80) == 0) { power_off(); }
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AUD_CTRL_power = (value & 0x80) > 0;
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if (!AUD_CTRL_power) { power_off(); }
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break;
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// wave ram table
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@ -831,30 +831,24 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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public void power_off()
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{
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for (int i = 0; i < 21; i++)
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for (int i = 0; i < 0x16; i++)
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{
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Audio_Regs[i] = 0;
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WriteReg(0xFF10 + i, 0);
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}
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// reset derived values
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sync_channels();
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// duty and length are reset
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SQ1_duty_cntr = 0;
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SQ2_duty_cntr = 0;
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// reset state variables
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SQ1_enable = SQ1_swp_enable = false;
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SQ2_enable = false;
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WAVE_enable = false;
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NOISE_enable = false;
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SQ1_enable = SQ1_swp_enable = SQ2_enable = WAVE_enable = NOISE_enable = false;
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SQ1_len_en = false;
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SQ2_len_en = false;
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WAVE_len_en = false;
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NOISE_len_en = false;
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SQ1_len_en = SQ2_len_en = WAVE_len_en = NOISE_len_en = false;
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sequencer_len = 0;
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sequencer_vol = 0;
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sequencer_swp = 0;
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master_audio_clock = 0;
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}
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public void Reset()
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@ -877,43 +871,78 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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{
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ser.Sync("Audio_Regs", ref Audio_Regs, false);
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ser.Sync("Wave_Ram", ref Wave_RAM, false);
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// save state variables
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ser.Sync("WAVE_can_get", ref WAVE_can_get);
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ser.Sync("SQ1_vol_done", ref SQ1_vol_done);
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ser.Sync("SQ2_vol_done", ref SQ2_vol_done);
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ser.Sync("NOISE_vol_done", ref NOISE_vol_done);
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ser.Sync("SQ1_calc_done", ref SQ1_calc_done);
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ser.Sync("SQ1_swp_enable", ref SQ1_swp_enable);
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ser.Sync("SQ1_length_counter", ref SQ1_len_cntr);
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ser.Sync("SQ2_length_counter", ref SQ2_len_cntr);
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ser.Sync("WAVE_length_counter", ref WAVE_len_cntr);
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ser.Sync("NOISE_length_counter", ref NOISE_len_cntr);
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ser.Sync("SQ1_enable", ref SQ1_enable);
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ser.Sync("SQ2_enable", ref SQ2_enable);
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ser.Sync("WAVE_enable", ref WAVE_enable);
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ser.Sync("NOISE_enable", ref NOISE_enable);
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ser.Sync("SQ1_vol_state", ref SQ1_vol_state);
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ser.Sync("SQ2_vol_state", ref SQ2_vol_state);
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ser.Sync("NOISE_vol_state", ref NOISE_vol_state);
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ser.Sync("SQ1_duty_cntr", ref SQ1_duty_cntr);
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ser.Sync("SQ2_duty_cntr", ref SQ2_duty_cntr);
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ser.Sync("WAVE_wave_cntr", ref WAVE_wave_cntr);
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ser.Sync("SQ1_frq_shadow", ref SQ1_frq_shadow);
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ser.Sync("SQ1_intl_cntr", ref SQ1_intl_cntr);
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ser.Sync("SQ2_intl_cntr", ref SQ2_intl_cntr);
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ser.Sync("WAVE_intl_cntr", ref WAVE_intl_cntr);
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ser.Sync("NOISE_intl_cntr", ref NOISE_intl_cntr);
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ser.Sync("SQ1_vol_per", ref SQ1_vol_per);
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ser.Sync("SQ2_vol_per", ref SQ2_vol_per);
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ser.Sync("NOISE_vol_per", ref NOISE_vol_per);
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ser.Sync("SQ1_intl_swp_cnt", ref SQ1_intl_swp_cnt);
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ser.Sync("NOISE_LFSR", ref NOISE_LFSR);
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ser.Sync("SQ1_len_cntr", ref SQ1_len_cntr);
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ser.Sync("SQ2_len_cntr", ref SQ2_len_cntr);
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ser.Sync("WAVE_len_cntr", ref WAVE_len_cntr);
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ser.Sync("NOISE_len_cntr", ref NOISE_len_cntr);
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ser.Sync("SQ1_negate", ref SQ1_negate);
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ser.Sync("SQ1_trigger", ref SQ1_trigger);
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ser.Sync("SQ1_len_en", ref SQ1_len_en);
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ser.Sync("SQ1_env_add", ref SQ1_env_add);
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ser.Sync("SQ1_shift", ref SQ1_shift);
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ser.Sync("SQ1_duty", ref SQ1_duty);
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ser.Sync("SQ1_st_vol", ref SQ1_st_vol);
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ser.Sync("SQ1_per", ref SQ1_per);
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ser.Sync("SQ1_swp_prd", ref SQ1_swp_prd);
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ser.Sync("SQ1_frq", ref SQ1_frq);
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ser.Sync("SQ1_length", ref SQ1_length);
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ser.Sync("SQ2_vol_done", ref SQ2_vol_done);
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ser.Sync("SQ2_length_counter", ref SQ2_len_cntr);
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ser.Sync("SQ2_enable", ref SQ2_enable);
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ser.Sync("SQ2_vol_state", ref SQ2_vol_state);
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ser.Sync("SQ2_duty_cntr", ref SQ2_duty_cntr);
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ser.Sync("SQ2_intl_cntr", ref SQ2_intl_cntr);
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ser.Sync("SQ2_vol_per", ref SQ2_vol_per);
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ser.Sync("SQ2_len_cntr", ref SQ2_len_cntr);
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ser.Sync("SQ2_trigger", ref SQ2_trigger);
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ser.Sync("SQ2_len_en", ref SQ2_len_en);
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ser.Sync("SQ2_env_add", ref SQ2_env_add);
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ser.Sync("SQ2_duty", ref SQ2_duty);
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ser.Sync("SQ2_st_vol", ref SQ2_st_vol);
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ser.Sync("SQ2_per", ref SQ2_per);
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ser.Sync("SQ2_frq", ref SQ2_frq);
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ser.Sync("SQ2_length", ref SQ2_length);
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ser.Sync("WAVE_can_get", ref WAVE_can_get);
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ser.Sync("WAVE_length_counter", ref WAVE_len_cntr);
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ser.Sync("WAVE_enable", ref WAVE_enable);
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ser.Sync("WAVE_wave_cntr", ref WAVE_wave_cntr);
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ser.Sync("WAVE_intl_cntr", ref WAVE_intl_cntr);
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ser.Sync("WAVE_len_cntr", ref WAVE_len_cntr);
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ser.Sync("WAVE_DAC_pow", ref WAVE_DAC_pow);
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ser.Sync("WAVE_trigger", ref WAVE_trigger);
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ser.Sync("WAVE_len_en", ref WAVE_len_en);
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ser.Sync("WAVE_vol_code", ref WAVE_vol_code);
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ser.Sync("WAVE_frq", ref WAVE_frq);
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ser.Sync("WAVE_length", ref WAVE_length);
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ser.Sync("NOISE_vol_done", ref NOISE_vol_done);
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ser.Sync("NOISE_length_counter", ref NOISE_len_cntr);
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ser.Sync("NOISE_enable", ref NOISE_enable);
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ser.Sync("NOISE_vol_state", ref NOISE_vol_state);
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ser.Sync("NOISE_intl_cntr", ref NOISE_intl_cntr);
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ser.Sync("NOISE_vol_per", ref NOISE_vol_per);
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ser.Sync("NOISE_LFSR", ref NOISE_LFSR);
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ser.Sync("NOISE_len_cntr", ref NOISE_len_cntr);
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ser.Sync("NOISE_wdth_md", ref NOISE_wdth_md);
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ser.Sync("NOISE_trigger", ref NOISE_trigger);
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ser.Sync("NOISE_len_en", ref NOISE_len_en);
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ser.Sync("NOISE_env_add", ref NOISE_env_add);
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ser.Sync("NOISE_clk_shft", ref NOISE_clk_shft);
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ser.Sync("NOISE_div_code", ref NOISE_div_code);
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ser.Sync("NOISE_st_vol", ref NOISE_st_vol);
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ser.Sync("NOISE_per", ref NOISE_per);
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ser.Sync("NOISE_length", ref NOISE_length);
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ser.Sync("sequencer_len", ref sequencer_len);
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ser.Sync("sequencer_vol", ref sequencer_vol);
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@ -921,93 +950,6 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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ser.Sync("sequencer_tick", ref sequencer_tick);
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ser.Sync("master_audio_clock", ref master_audio_clock);
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// get derived state
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if (ser.IsReader)
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{
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sync_channels();
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}
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}
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public void sync_channels()
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{
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SQ1_swp_prd = (byte)((Audio_Regs[NR10] & 0x70) >> 4);
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SQ1_negate = (Audio_Regs[NR10] & 8) > 0;
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SQ1_shift = (byte)(Audio_Regs[NR10] & 7);
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SQ1_duty = (byte)((Audio_Regs[NR11] & 0xC0) >> 6);
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SQ1_length = (ushort)(64 - Audio_Regs[NR11] & 0x3F);
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SQ1_st_vol = (byte)((Audio_Regs[NR12] & 0xF0) >> 4);
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SQ1_env_add = (Audio_Regs[NR12] & 8) > 0;
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SQ1_per = (byte)(Audio_Regs[NR12] & 7);
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SQ1_frq &= 0x700;
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SQ1_frq |= Audio_Regs[NR13];
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SQ1_trigger = (Audio_Regs[NR14] & 0x80) > 0;
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SQ1_len_en = (Audio_Regs[NR14] & 0x40) > 0;
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SQ1_frq &= 0xFF;
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SQ1_frq |= (ushort)((Audio_Regs[NR14] & 7) << 8);
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SQ2_duty = (byte)((Audio_Regs[NR21] & 0xC0) >> 6);
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SQ2_length = (ushort)(64 - Audio_Regs[NR21] & 0x3F);
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SQ2_st_vol = (byte)((Audio_Regs[NR22] & 0xF0) >> 4);
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SQ2_env_add = (Audio_Regs[NR22] & 8) > 0;
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SQ2_per = (byte)(Audio_Regs[NR22] & 7);
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SQ2_frq &= 0x700;
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SQ2_frq |= Audio_Regs[NR23];
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SQ2_trigger = (Audio_Regs[NR24] & 0x80) > 0;
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SQ2_len_en = (Audio_Regs[NR24] & 0x40) > 0;
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SQ2_frq &= 0xFF;
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SQ2_frq |= (ushort)((Audio_Regs[NR24] & 7) << 8);
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WAVE_DAC_pow = (Audio_Regs[NR30] & 0x80) > 0;
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WAVE_length = (ushort)(256 - Audio_Regs[NR31]);
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WAVE_vol_code = (byte)((Audio_Regs[NR32] & 0x60) >> 5);
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WAVE_frq &= 0x700;
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WAVE_frq |= Audio_Regs[NR33];
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WAVE_trigger = (Audio_Regs[NR34] & 0x80) > 0;
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WAVE_len_en = (Audio_Regs[NR34] & 0x40) > 0;
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WAVE_frq &= 0xFF;
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WAVE_frq |= (ushort)((Audio_Regs[NR34] & 7) << 8);
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NOISE_length = (ushort)(64 - Audio_Regs[NR41] & 0x3F);
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NOISE_st_vol = (byte)((Audio_Regs[NR42] & 0xF0) >> 4);
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NOISE_env_add = (Audio_Regs[NR42] & 8) > 0;
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NOISE_per = (byte)(Audio_Regs[NR42] & 7);
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NOISE_clk_shft = (byte)((Audio_Regs[NR43] & 0xF0) >> 4);
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NOISE_wdth_md = (Audio_Regs[NR43] & 8) > 0;
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NOISE_div_code = (byte)(Audio_Regs[NR43] & 7);
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WAVE_trigger = (Audio_Regs[NR44] & 0x80) > 0;
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WAVE_len_en = (Audio_Regs[NR44] & 0x40) > 0;
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AUD_CTRL_vin_L_en = (Audio_Regs[NR50] & 0x80) > 0;
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AUD_CTRL_vol_L = (byte)((Audio_Regs[NR50] & 0x70) >> 4);
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AUD_CTRL_vin_R_en = (Audio_Regs[NR50] & 8) > 0;
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AUD_CTRL_vol_R = (byte)(Audio_Regs[NR50] & 7);
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AUD_CTRL_noise_L_en = (Audio_Regs[NR51] & 0x80) > 0;
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AUD_CTRL_wave_L_en = (Audio_Regs[NR51] & 0x40) > 0;
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AUD_CTRL_sq2_L_en = (Audio_Regs[NR51] & 0x20) > 0;
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AUD_CTRL_sq1_L_en = (Audio_Regs[NR51] & 0x10) > 0;
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AUD_CTRL_noise_R_en = (Audio_Regs[NR51] & 8) > 0;
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AUD_CTRL_wave_R_en = (Audio_Regs[NR51] & 4) > 0;
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AUD_CTRL_sq2_R_en = (Audio_Regs[NR51] & 2) > 0;
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AUD_CTRL_sq1_R_en = (Audio_Regs[NR51] & 1) > 0;
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AUD_CTRL_power = (Audio_Regs[NR51] & 0x80) > 0;
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}
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public byte Read_NR52()
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@ -57,7 +57,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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private static readonly string[] BaseDefinition =
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{
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"Up", "Down", "Left", "Right", "Start", "Select", "B", "A", "Power"
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"Right", "Left", "Up", "Down", "A", "B", "Select", "Start", "Power"
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};
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public void SyncState(Serializer ser)
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@ -54,19 +54,6 @@ namespace BizHawk.Emulation.Cores.Nintendo.Gameboy
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Console.WriteLine(game.System);
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byte[] BiosRom;
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if (game.System == "GB")
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{
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BiosRom = comm.CoreFileProvider.GetFirmware("GB", "World", false);
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}
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else
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{
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BiosRom = comm.CoreFileProvider.GetFirmware("GBC", "World", false);
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}
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int bios_length = BiosRom == null ? 0 : BiosRom.Length;
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try
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{
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_syncSettings = (GambatteSyncSettings)syncSettings ?? new GambatteSyncSettings();
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@ -82,16 +69,8 @@ namespace BizHawk.Emulation.Cores.Nintendo.Gameboy
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{
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case GambatteSyncSettings.ConsoleModeType.GB:
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flags |= LibGambatte.LoadFlags.FORCE_DMG;
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// we need to change the BIOS to GB bios
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if (game.System == "GBC")
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{
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BiosRom = comm.CoreFileProvider.GetFirmware("GB", "World", false);
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bios_length = BiosRom.Length;
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}
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break;
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case GambatteSyncSettings.ConsoleModeType.GBC:
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BiosRom = comm.CoreFileProvider.GetFirmware("GBC", "World", false);
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bios_length = BiosRom.Length;
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break;
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default:
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if (game.System == "GB")
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@ -99,9 +78,6 @@ namespace BizHawk.Emulation.Cores.Nintendo.Gameboy
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break;
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}
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// to disable BIOS loading into gambatte, just set bios_length to 0
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bios_length = 0;
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if (_syncSettings.GBACGB)
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{
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flags |= LibGambatte.LoadFlags.GBA_CGB;
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@ -112,7 +88,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.Gameboy
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flags |= LibGambatte.LoadFlags.MULTICART_COMPAT;
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}
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if (LibGambatte.gambatte_load(GambatteState, file, (uint)file.Length, BiosRom, (uint)bios_length, GetCurrentTime(), flags) != 0)
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if (LibGambatte.gambatte_load(GambatteState, file, (uint)file.Length, GetCurrentTime(), flags) != 0)
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{
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throw new InvalidOperationException("gambatte_load() returned non-zero (is this not a gb or gbc rom?)");
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}
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@ -57,7 +57,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.Gameboy
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/// <param name="flags">ORed combination of LoadFlags.</param>
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/// <returns>0 on success, negative value on failure.</returns>
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[DllImport("libgambatte.dll", CallingConvention = CallingConvention.Cdecl)]
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public static extern int gambatte_load(IntPtr core, byte[] romdata, uint length, byte[] biosdata, uint bioslength, long now, LoadFlags flags);
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public static extern int gambatte_load(IntPtr core, byte[] romdata, uint length, long now, LoadFlags flags);
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/// <summary>
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/// Emulates until at least 'samples' stereo sound samples are produced in the supplied buffer,
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@ -60,8 +60,7 @@ public:
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* @param flags ORed combination of LoadFlags.
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* @return 0 on success, negative value on failure.
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*/
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bool use_bios;
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int load(const char *romfiledata, unsigned romfilelength, const char *biosfiledata, unsigned biosfilelength, std::uint32_t now, unsigned flags = 0);
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int load(const char *romfiledata, unsigned romfilelength, std::uint32_t now, unsigned flags = 0);
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/** Emulates until at least 'samples' stereo sound samples are produced in the supplied buffer,
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* or until a video frame has been drawn.
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@ -1,6 +1,8 @@
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Microsoft Visual Studio Solution File, Format Version 11.00
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# Visual Studio 2010
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Microsoft Visual Studio Solution File, Format Version 12.00
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# Visual Studio 14
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VisualStudioVersion = 14.0.25420.1
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MinimumVisualStudioVersion = 10.0.40219.1
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Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "libgambatte", "libgambatte.vcxproj", "{5D630682-7BDA-474D-B387-0EB420DDC199}"
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EndProject
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Global
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||||
|
|
@ -11,10 +13,10 @@ Global
|
|||
Release|x64 = Release|x64
|
||||
EndGlobalSection
|
||||
GlobalSection(ProjectConfigurationPlatforms) = postSolution
|
||||
{5D630682-7BDA-474D-B387-0EB420DDC199}.Debug|Win32.ActiveCfg = Debug|Win32
|
||||
{5D630682-7BDA-474D-B387-0EB420DDC199}.Debug|Win32.Build.0 = Debug|Win32
|
||||
{5D630682-7BDA-474D-B387-0EB420DDC199}.Debug|x64.ActiveCfg = Debug|x64
|
||||
{5D630682-7BDA-474D-B387-0EB420DDC199}.Debug|x64.Build.0 = Debug|x64
|
||||
{5D630682-7BDA-474D-B387-0EB420DDC199}.Debug|Win32.ActiveCfg = Release|x64
|
||||
{5D630682-7BDA-474D-B387-0EB420DDC199}.Debug|Win32.Build.0 = Release|x64
|
||||
{5D630682-7BDA-474D-B387-0EB420DDC199}.Debug|x64.ActiveCfg = Release|x64
|
||||
{5D630682-7BDA-474D-B387-0EB420DDC199}.Debug|x64.Build.0 = Release|x64
|
||||
{5D630682-7BDA-474D-B387-0EB420DDC199}.Release|Win32.ActiveCfg = Release|Win32
|
||||
{5D630682-7BDA-474D-B387-0EB420DDC199}.Release|Win32.Build.0 = Release|Win32
|
||||
{5D630682-7BDA-474D-B387-0EB420DDC199}.Release|x64.ActiveCfg = Release|x64
|
||||
|
|
|
|||
|
|
@ -29,9 +29,9 @@ GBEXPORT void gambatte_destroy(GB *g)
|
|||
delete g;
|
||||
}
|
||||
|
||||
GBEXPORT int gambatte_load(GB *g, const char *romfiledata, unsigned romfilelength, const char *biosfiledata, unsigned biosfilelength, long long now, unsigned flags)
|
||||
GBEXPORT int gambatte_load(GB *g, const char *romfiledata, unsigned romfilelength, long long now, unsigned flags)
|
||||
{
|
||||
int ret = g->load(romfiledata, romfilelength, biosfiledata, biosfilelength, now, flags);
|
||||
int ret = g->load(romfiledata, romfilelength, now, flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -99,13 +99,9 @@ public:
|
|||
void setLinkCallback(void (*callback)()) {
|
||||
memory.setLinkCallback(callback);
|
||||
}
|
||||
|
||||
void reset_bios(int setting) {
|
||||
memory.bios_reset(setting);
|
||||
}
|
||||
|
||||
int load(const char *romfiledata, unsigned romfilelength, const char *biosfiledata, unsigned biosfilelength, bool forceDmg, bool multicartCompat) {
|
||||
return memory.loadROM(romfiledata, romfilelength, biosfiledata, biosfilelength, forceDmg, multicartCompat);
|
||||
int load(const char *romfiledata, unsigned romfilelength, bool forceDmg, bool multicartCompat) {
|
||||
return memory.loadROM(romfiledata, romfilelength, forceDmg, multicartCompat);
|
||||
}
|
||||
|
||||
bool loaded() const { return memory.loaded(); }
|
||||
|
|
|
|||
|
|
@ -94,12 +94,8 @@ void GB::reset(const std::uint32_t now) {
|
|||
|
||||
SaveState state;
|
||||
p_->cpu.setStatePtrs(state);
|
||||
if (use_bios)
|
||||
{
|
||||
p_->cpu.reset_bios(0);
|
||||
}
|
||||
|
||||
setInitState(state, p_->cpu.isCgb(), p_->gbaCgbMode, now, use_bios);
|
||||
setInitState(state, p_->cpu.isCgb(), p_->gbaCgbMode, now);
|
||||
p_->cpu.loadState(state);
|
||||
if (length > 0)
|
||||
{
|
||||
|
|
@ -145,17 +141,16 @@ void GB::setLinkCallback(void(*callback)()) {
|
|||
p_->cpu.setLinkCallback(callback);
|
||||
}
|
||||
|
||||
int GB::load(const char *romfiledata, unsigned romfilelength, const char *biosfiledata, unsigned biosfilelength, const std::uint32_t now, const unsigned flags) {
|
||||
int GB::load(const char *romfiledata, unsigned romfilelength, const std::uint32_t now, const unsigned flags) {
|
||||
//if (p_->cpu.loaded())
|
||||
// p_->cpu.saveSavedata();
|
||||
|
||||
const int failed = p_->cpu.load(romfiledata, romfilelength, biosfiledata, biosfilelength, flags & FORCE_DMG, flags & MULTICART_COMPAT);
|
||||
use_bios = biosfilelength > 0 ? true : false;
|
||||
|
||||
const int failed = p_->cpu.load(romfiledata, romfilelength, flags & FORCE_DMG, flags & MULTICART_COMPAT);
|
||||
|
||||
if (!failed) {
|
||||
SaveState state;
|
||||
p_->cpu.setStatePtrs(state);
|
||||
setInitState(state, p_->cpu.isCgb(), p_->gbaCgbMode = flags & GBA_CGB, now, use_bios);
|
||||
setInitState(state, p_->cpu.isCgb(), p_->gbaCgbMode = flags & GBA_CGB, now);
|
||||
p_->cpu.loadState(state);
|
||||
//p_->cpu.loadSavedata();
|
||||
}
|
||||
|
|
@ -238,7 +233,6 @@ SYNCFUNC(GB)
|
|||
SSS(p_->cpu);
|
||||
NSS(p_->gbaCgbMode);
|
||||
NSS(p_->vbuff);
|
||||
NSS(use_bios);
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1146,7 +1146,7 @@ static void setInitialDmgIoamhram(unsigned char *const ioamhram) {
|
|||
|
||||
} // anon namespace
|
||||
|
||||
void gambatte::setInitState(SaveState &state, const bool cgb, const bool gbaCgbMode, const std::uint32_t now, bool boot_bios) {
|
||||
void gambatte::setInitState(SaveState &state, const bool cgb, const bool gbaCgbMode, const std::uint32_t now) {
|
||||
static const unsigned char cgbObjpDump[0x40] = {
|
||||
0x00, 0x00, 0xF2, 0xAB,
|
||||
0x61, 0xC2, 0xD9, 0xBA,
|
||||
|
|
@ -1166,317 +1166,158 @@ void gambatte::setInitState(SaveState &state, const bool cgb, const bool gbaCgbM
|
|||
0x83, 0x40, 0x0B, 0x77
|
||||
};
|
||||
|
||||
if (boot_bios)
|
||||
{
|
||||
state.cpu.PC = 0x00;
|
||||
state.cpu.SP = 0xFFFE;
|
||||
state.cpu.A = 0;
|
||||
state.cpu.B = 0;
|
||||
state.cpu.C = 0x0;
|
||||
state.cpu.D = 0x0;
|
||||
state.cpu.E = 0x0;
|
||||
state.cpu.F = 0x0;
|
||||
state.cpu.H = 0x0;
|
||||
state.cpu.L = 0x0;
|
||||
state.cpu.skip = false;
|
||||
state.cpu.cycleCounter = 0;
|
||||
state.mem.ioamhram.ptr[0x140] = 0x00;
|
||||
state.mem.ioamhram.ptr[0x104] = 0x00;
|
||||
state.mem.using_bios = true;
|
||||
|
||||
std::memset(state.mem.sram.ptr, 0xFF, state.mem.sram.getSz());
|
||||
|
||||
if (cgb) {
|
||||
setInitialCgbWram(state.mem.wram.ptr);
|
||||
}
|
||||
else {
|
||||
setInitialDmgWram(state.mem.wram.ptr);
|
||||
}
|
||||
|
||||
if (cgb) {
|
||||
setInitialCgbIoamhram(state.mem.ioamhram.ptr);
|
||||
}
|
||||
else {
|
||||
setInitialDmgIoamhram(state.mem.ioamhram.ptr);
|
||||
}
|
||||
|
||||
state.mem.ioamhram.ptr[0x144] = 0x00;
|
||||
|
||||
state.mem.divLastUpdate = 0;
|
||||
state.mem.timaLastUpdate = 0;
|
||||
state.mem.tmatime = DISABLED_TIME;
|
||||
state.mem.nextSerialtime = DISABLED_TIME;
|
||||
state.mem.lastOamDmaUpdate = DISABLED_TIME;
|
||||
state.mem.unhaltTime = DISABLED_TIME;
|
||||
state.mem.minIntTime = 0;
|
||||
state.mem.rombank = 1;
|
||||
state.mem.dmaSource = 0;
|
||||
state.mem.dmaDestination = 0;
|
||||
state.mem.rambank = 0;
|
||||
state.mem.oamDmaPos = 0x0;
|
||||
state.mem.IME = false;
|
||||
state.mem.halted = false;
|
||||
state.mem.enableRam = false;
|
||||
state.mem.rambankMode = false;
|
||||
state.mem.hdmaTransfer = false;
|
||||
|
||||
|
||||
for (unsigned i = 0x00; i < 0x40; i += 0x02) {
|
||||
state.ppu.bgpData.ptr[i] = 0xFF;
|
||||
state.ppu.bgpData.ptr[i + 1] = 0x7F;
|
||||
}
|
||||
|
||||
std::memcpy(state.ppu.objpData.ptr, cgbObjpDump, sizeof(cgbObjpDump));
|
||||
|
||||
if (!cgb) {
|
||||
state.ppu.bgpData.ptr[0] = state.mem.ioamhram.get()[0x147];
|
||||
state.ppu.objpData.ptr[0] = state.mem.ioamhram.get()[0x148];
|
||||
state.ppu.objpData.ptr[1] = state.mem.ioamhram.get()[0x149];
|
||||
}
|
||||
|
||||
for (unsigned pos = 0; pos < 80; ++pos)
|
||||
state.ppu.oamReaderBuf.ptr[pos] = state.mem.ioamhram.ptr[(pos * 2 & ~3) | (pos & 1)];
|
||||
|
||||
std::fill_n(state.ppu.oamReaderSzbuf.ptr, 40, false);
|
||||
std::memset(state.ppu.spAttribList, 0, sizeof(state.ppu.spAttribList));
|
||||
std::memset(state.ppu.spByte0List, 0, sizeof(state.ppu.spByte0List));
|
||||
std::memset(state.ppu.spByte1List, 0, sizeof(state.ppu.spByte1List));
|
||||
state.ppu.videoCycles = cgb ? 144 * 456ul + 164 : 153 * 456ul + 396;
|
||||
state.ppu.enableDisplayM0Time = 0;
|
||||
state.ppu.winYPos = 0;
|
||||
state.ppu.xpos = 0;
|
||||
state.ppu.endx = 0;
|
||||
state.ppu.reg0 = 0;
|
||||
state.ppu.reg1 = 0;
|
||||
state.ppu.tileword = 0;
|
||||
state.ppu.ntileword = 0;
|
||||
state.ppu.attrib = 0;
|
||||
state.ppu.nattrib = 0;
|
||||
state.ppu.state = 0;
|
||||
state.ppu.nextSprite = 0;
|
||||
state.ppu.currentSprite = 0;
|
||||
state.ppu.lyc = 0;
|
||||
state.ppu.m0lyc = 0;
|
||||
state.ppu.weMaster = false;
|
||||
state.ppu.winDrawState = 0;
|
||||
state.ppu.wscx = 0;
|
||||
state.ppu.lastM0Time = 0;
|
||||
state.ppu.nextM0Irq = 0;
|
||||
state.ppu.oldWy = 0;
|
||||
state.ppu.pendingLcdstatIrq = false;
|
||||
|
||||
state.spu.cycleCounter = 0;
|
||||
|
||||
state.spu.ch1.sweep.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch1.sweep.shadow = 0;
|
||||
state.spu.ch1.sweep.nr0 = 0;
|
||||
state.spu.ch1.sweep.negging = false;
|
||||
state.spu.ch1.duty.nextPosUpdate = 0;
|
||||
state.spu.ch1.duty.nr3 = 0;
|
||||
state.spu.ch1.duty.pos = 0;
|
||||
state.spu.ch1.env.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch1.env.volume = 0;
|
||||
state.spu.ch1.lcounter.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch1.lcounter.lengthCounter = 0x0;
|
||||
state.spu.ch1.nr4 = 0;
|
||||
state.spu.ch1.master = false;
|
||||
|
||||
state.spu.ch2.duty.nextPosUpdate = 0;
|
||||
state.spu.ch2.duty.nr3 = 0;
|
||||
state.spu.ch2.duty.pos = 0;
|
||||
state.spu.ch2.env.counter = 0;
|
||||
state.spu.ch2.env.volume = 0;
|
||||
state.spu.ch2.lcounter.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch2.lcounter.lengthCounter = 0x0;
|
||||
state.spu.ch2.nr4 = 0;
|
||||
state.spu.ch2.master = false;
|
||||
|
||||
for (unsigned i = 0; i < 0x10; ++i)
|
||||
state.spu.ch3.waveRam.ptr[i] = 0;
|
||||
|
||||
state.spu.ch3.lcounter.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch3.lcounter.lengthCounter = 0x0;
|
||||
state.spu.ch3.waveCounter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch3.lastReadTime = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch3.nr3 = 0;
|
||||
state.spu.ch3.nr4 = 0;
|
||||
state.spu.ch3.wavePos = 0;
|
||||
state.spu.ch3.sampleBuf = 0;
|
||||
state.spu.ch3.master = false;
|
||||
|
||||
state.spu.ch4.lfsr.counter = 0;
|
||||
state.spu.ch4.lfsr.reg = 0;
|
||||
state.spu.ch4.env.counter = 0;
|
||||
state.spu.ch4.env.volume = 0;
|
||||
state.spu.ch4.lcounter.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch4.lcounter.lengthCounter = 0x0;
|
||||
state.spu.ch4.nr4 = 0;
|
||||
state.spu.ch4.master = false;
|
||||
|
||||
state.rtc.baseTime = now;
|
||||
state.rtc.haltTime = state.rtc.baseTime;
|
||||
state.rtc.dataDh = 0;
|
||||
state.rtc.dataDl = 0;
|
||||
state.rtc.dataH = 0;
|
||||
state.rtc.dataM = 0;
|
||||
state.rtc.dataS = 0;
|
||||
state.rtc.lastLatchData = false;
|
||||
}
|
||||
else
|
||||
{
|
||||
state.cpu.PC = 0x100;
|
||||
state.cpu.SP = 0xFFFE;
|
||||
state.cpu.A = cgb * 0x10 | 0x01;
|
||||
state.cpu.B = cgb & gbaCgbMode;
|
||||
state.cpu.C = 0x13;
|
||||
state.cpu.D = 0x00;
|
||||
state.cpu.E = 0xD8;
|
||||
state.cpu.F = 0xB0;
|
||||
state.cpu.H = 0x01;
|
||||
state.cpu.L = 0x4D;
|
||||
state.cpu.skip = false;
|
||||
setInitialVram(state.mem.vram.ptr, cgb);
|
||||
state.cpu.cycleCounter = cgb ? 0x102A0 : 0x102A0 + 0x8D2C;
|
||||
state.cpu.PC = 0x100;
|
||||
state.cpu.SP = 0xFFFE;
|
||||
state.cpu.A = cgb * 0x10 | 0x01;
|
||||
state.cpu.B = cgb & gbaCgbMode;
|
||||
state.cpu.C = 0x13;
|
||||
state.cpu.D = 0x00;
|
||||
state.cpu.E = 0xD8;
|
||||
state.cpu.F = 0xB0;
|
||||
state.cpu.H = 0x01;
|
||||
state.cpu.L = 0x4D;
|
||||
state.cpu.skip = false;
|
||||
setInitialVram(state.mem.vram.ptr, cgb);
|
||||
state.cpu.cycleCounter = cgb ? 0x102A0 : 0x102A0 + 0x8D2C;
|
||||
|
||||
|
||||
std::memset(state.mem.sram.ptr, 0xFF, state.mem.sram.getSz());
|
||||
std::memset(state.mem.sram.ptr, 0xFF, state.mem.sram.getSz());
|
||||
|
||||
if (cgb) {
|
||||
setInitialCgbWram(state.mem.wram.ptr);
|
||||
}
|
||||
else {
|
||||
setInitialDmgWram(state.mem.wram.ptr);
|
||||
}
|
||||
|
||||
if (cgb) {
|
||||
setInitialCgbIoamhram(state.mem.ioamhram.ptr);
|
||||
}
|
||||
else {
|
||||
setInitialDmgIoamhram(state.mem.ioamhram.ptr);
|
||||
}
|
||||
|
||||
state.mem.ioamhram.ptr[0x140] = 0x91;
|
||||
state.mem.ioamhram.ptr[0x104] = 0x1C;
|
||||
state.mem.ioamhram.ptr[0x144] = 0x00;
|
||||
|
||||
state.mem.divLastUpdate = 0;
|
||||
state.mem.timaLastUpdate = 0;
|
||||
state.mem.tmatime = DISABLED_TIME;
|
||||
state.mem.nextSerialtime = DISABLED_TIME;
|
||||
state.mem.lastOamDmaUpdate = DISABLED_TIME;
|
||||
state.mem.unhaltTime = DISABLED_TIME;
|
||||
state.mem.minIntTime = 0;
|
||||
state.mem.rombank = 1;
|
||||
state.mem.dmaSource = 0;
|
||||
state.mem.dmaDestination = 0;
|
||||
state.mem.rambank = 0;
|
||||
state.mem.oamDmaPos = 0xFE;
|
||||
state.mem.IME = false;
|
||||
state.mem.halted = false;
|
||||
state.mem.enableRam = false;
|
||||
state.mem.rambankMode = false;
|
||||
state.mem.hdmaTransfer = false;
|
||||
|
||||
|
||||
for (unsigned i = 0x00; i < 0x40; i += 0x02) {
|
||||
state.ppu.bgpData.ptr[i] = 0xFF;
|
||||
state.ppu.bgpData.ptr[i + 1] = 0x7F;
|
||||
}
|
||||
|
||||
std::memcpy(state.ppu.objpData.ptr, cgbObjpDump, sizeof(cgbObjpDump));
|
||||
|
||||
if (!cgb) {
|
||||
state.ppu.bgpData.ptr[0] = state.mem.ioamhram.get()[0x147];
|
||||
state.ppu.objpData.ptr[0] = state.mem.ioamhram.get()[0x148];
|
||||
state.ppu.objpData.ptr[1] = state.mem.ioamhram.get()[0x149];
|
||||
}
|
||||
|
||||
for (unsigned pos = 0; pos < 80; ++pos)
|
||||
state.ppu.oamReaderBuf.ptr[pos] = state.mem.ioamhram.ptr[(pos * 2 & ~3) | (pos & 1)];
|
||||
|
||||
std::fill_n(state.ppu.oamReaderSzbuf.ptr, 40, false);
|
||||
std::memset(state.ppu.spAttribList, 0, sizeof(state.ppu.spAttribList));
|
||||
std::memset(state.ppu.spByte0List, 0, sizeof(state.ppu.spByte0List));
|
||||
std::memset(state.ppu.spByte1List, 0, sizeof(state.ppu.spByte1List));
|
||||
state.ppu.videoCycles = cgb ? 144 * 456ul + 164 : 153 * 456ul + 396;
|
||||
state.ppu.enableDisplayM0Time = state.cpu.cycleCounter;
|
||||
state.ppu.winYPos = 0xFF;
|
||||
state.ppu.xpos = 0;
|
||||
state.ppu.endx = 0;
|
||||
state.ppu.reg0 = 0;
|
||||
state.ppu.reg1 = 0;
|
||||
state.ppu.tileword = 0;
|
||||
state.ppu.ntileword = 0;
|
||||
state.ppu.attrib = 0;
|
||||
state.ppu.nattrib = 0;
|
||||
state.ppu.state = 0;
|
||||
state.ppu.nextSprite = 0;
|
||||
state.ppu.currentSprite = 0;
|
||||
state.ppu.lyc = state.mem.ioamhram.get()[0x145];
|
||||
state.ppu.m0lyc = state.mem.ioamhram.get()[0x145];
|
||||
state.ppu.weMaster = false;
|
||||
state.ppu.winDrawState = 0;
|
||||
state.ppu.wscx = 0;
|
||||
state.ppu.lastM0Time = 1234;
|
||||
state.ppu.nextM0Irq = 0;
|
||||
state.ppu.oldWy = state.mem.ioamhram.get()[0x14A];
|
||||
state.ppu.pendingLcdstatIrq = false;
|
||||
|
||||
state.spu.cycleCounter = 0x1000 | (state.cpu.cycleCounter >> 1 & 0xFFF); // spu.cycleCounter >> 12 & 7 represents the frame sequencer position.
|
||||
|
||||
state.spu.ch1.sweep.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch1.sweep.shadow = 0;
|
||||
state.spu.ch1.sweep.nr0 = 0;
|
||||
state.spu.ch1.sweep.negging = false;
|
||||
state.spu.ch1.duty.nextPosUpdate = (state.spu.cycleCounter & ~1) + 2048 * 2;
|
||||
state.spu.ch1.duty.nr3 = 0;
|
||||
state.spu.ch1.duty.pos = 0;
|
||||
state.spu.ch1.env.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch1.env.volume = 0;
|
||||
state.spu.ch1.lcounter.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch1.lcounter.lengthCounter = 0x40;
|
||||
state.spu.ch1.nr4 = 0;
|
||||
state.spu.ch1.master = true;
|
||||
|
||||
state.spu.ch2.duty.nextPosUpdate = (state.spu.cycleCounter & ~1) + 2048 * 2;
|
||||
state.spu.ch2.duty.nr3 = 0;
|
||||
state.spu.ch2.duty.pos = 0;
|
||||
state.spu.ch2.env.counter = state.spu.cycleCounter - ((state.spu.cycleCounter - 0x1000) & 0x7FFF) + 8ul * 0x8000;
|
||||
state.spu.ch2.env.volume = 0;
|
||||
state.spu.ch2.lcounter.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch2.lcounter.lengthCounter = 0x40;
|
||||
state.spu.ch2.nr4 = 0;
|
||||
state.spu.ch2.master = false;
|
||||
|
||||
for (unsigned i = 0; i < 0x10; ++i)
|
||||
state.spu.ch3.waveRam.ptr[i] = state.mem.ioamhram.get()[0x130 + i];
|
||||
|
||||
state.spu.ch3.lcounter.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch3.lcounter.lengthCounter = 0x100;
|
||||
state.spu.ch3.waveCounter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch3.lastReadTime = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch3.nr3 = 0;
|
||||
state.spu.ch3.nr4 = 0;
|
||||
state.spu.ch3.wavePos = 0;
|
||||
state.spu.ch3.sampleBuf = 0;
|
||||
state.spu.ch3.master = false;
|
||||
|
||||
state.spu.ch4.lfsr.counter = state.spu.cycleCounter + 4;
|
||||
state.spu.ch4.lfsr.reg = 0xFF;
|
||||
state.spu.ch4.env.counter = state.spu.cycleCounter - ((state.spu.cycleCounter - 0x1000) & 0x7FFF) + 8ul * 0x8000;
|
||||
state.spu.ch4.env.volume = 0;
|
||||
state.spu.ch4.lcounter.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch4.lcounter.lengthCounter = 0x40;
|
||||
state.spu.ch4.nr4 = 0;
|
||||
state.spu.ch4.master = false;
|
||||
|
||||
state.rtc.baseTime = now;
|
||||
state.rtc.haltTime = state.rtc.baseTime;
|
||||
state.rtc.dataDh = 0;
|
||||
state.rtc.dataDl = 0;
|
||||
state.rtc.dataH = 0;
|
||||
state.rtc.dataM = 0;
|
||||
state.rtc.dataS = 0;
|
||||
state.rtc.lastLatchData = false;
|
||||
if (cgb) {
|
||||
setInitialCgbWram(state.mem.wram.ptr);
|
||||
}
|
||||
else {
|
||||
setInitialDmgWram(state.mem.wram.ptr);
|
||||
}
|
||||
|
||||
if (cgb) {
|
||||
setInitialCgbIoamhram(state.mem.ioamhram.ptr);
|
||||
}
|
||||
else {
|
||||
setInitialDmgIoamhram(state.mem.ioamhram.ptr);
|
||||
}
|
||||
|
||||
state.mem.ioamhram.ptr[0x140] = 0x91;
|
||||
state.mem.ioamhram.ptr[0x104] = 0x1C;
|
||||
state.mem.ioamhram.ptr[0x144] = 0x00;
|
||||
|
||||
state.mem.divLastUpdate = 0;
|
||||
state.mem.timaLastUpdate = 0;
|
||||
state.mem.tmatime = DISABLED_TIME;
|
||||
state.mem.nextSerialtime = DISABLED_TIME;
|
||||
state.mem.lastOamDmaUpdate = DISABLED_TIME;
|
||||
state.mem.unhaltTime = DISABLED_TIME;
|
||||
state.mem.minIntTime = 0;
|
||||
state.mem.rombank = 1;
|
||||
state.mem.dmaSource = 0;
|
||||
state.mem.dmaDestination = 0;
|
||||
state.mem.rambank = 0;
|
||||
state.mem.oamDmaPos = 0xFE;
|
||||
state.mem.IME = false;
|
||||
state.mem.halted = false;
|
||||
state.mem.enableRam = false;
|
||||
state.mem.rambankMode = false;
|
||||
state.mem.hdmaTransfer = false;
|
||||
|
||||
|
||||
for (unsigned i = 0x00; i < 0x40; i += 0x02) {
|
||||
state.ppu.bgpData.ptr[i] = 0xFF;
|
||||
state.ppu.bgpData.ptr[i + 1] = 0x7F;
|
||||
}
|
||||
|
||||
std::memcpy(state.ppu.objpData.ptr, cgbObjpDump, sizeof(cgbObjpDump));
|
||||
|
||||
if (!cgb) {
|
||||
state.ppu.bgpData.ptr[0] = state.mem.ioamhram.get()[0x147];
|
||||
state.ppu.objpData.ptr[0] = state.mem.ioamhram.get()[0x148];
|
||||
state.ppu.objpData.ptr[1] = state.mem.ioamhram.get()[0x149];
|
||||
}
|
||||
|
||||
for (unsigned pos = 0; pos < 80; ++pos)
|
||||
state.ppu.oamReaderBuf.ptr[pos] = state.mem.ioamhram.ptr[(pos * 2 & ~3) | (pos & 1)];
|
||||
|
||||
std::fill_n(state.ppu.oamReaderSzbuf.ptr, 40, false);
|
||||
std::memset(state.ppu.spAttribList, 0, sizeof(state.ppu.spAttribList));
|
||||
std::memset(state.ppu.spByte0List, 0, sizeof(state.ppu.spByte0List));
|
||||
std::memset(state.ppu.spByte1List, 0, sizeof(state.ppu.spByte1List));
|
||||
state.ppu.videoCycles = cgb ? 144 * 456ul + 164 : 153 * 456ul + 396;
|
||||
state.ppu.enableDisplayM0Time = state.cpu.cycleCounter;
|
||||
state.ppu.winYPos = 0xFF;
|
||||
state.ppu.xpos = 0;
|
||||
state.ppu.endx = 0;
|
||||
state.ppu.reg0 = 0;
|
||||
state.ppu.reg1 = 0;
|
||||
state.ppu.tileword = 0;
|
||||
state.ppu.ntileword = 0;
|
||||
state.ppu.attrib = 0;
|
||||
state.ppu.nattrib = 0;
|
||||
state.ppu.state = 0;
|
||||
state.ppu.nextSprite = 0;
|
||||
state.ppu.currentSprite = 0;
|
||||
state.ppu.lyc = state.mem.ioamhram.get()[0x145];
|
||||
state.ppu.m0lyc = state.mem.ioamhram.get()[0x145];
|
||||
state.ppu.weMaster = false;
|
||||
state.ppu.winDrawState = 0;
|
||||
state.ppu.wscx = 0;
|
||||
state.ppu.lastM0Time = 1234;
|
||||
state.ppu.nextM0Irq = 0;
|
||||
state.ppu.oldWy = state.mem.ioamhram.get()[0x14A];
|
||||
state.ppu.pendingLcdstatIrq = false;
|
||||
|
||||
state.spu.cycleCounter = 0x1000 | (state.cpu.cycleCounter >> 1 & 0xFFF); // spu.cycleCounter >> 12 & 7 represents the frame sequencer position.
|
||||
|
||||
state.spu.ch1.sweep.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch1.sweep.shadow = 0;
|
||||
state.spu.ch1.sweep.nr0 = 0;
|
||||
state.spu.ch1.sweep.negging = false;
|
||||
state.spu.ch1.duty.nextPosUpdate = (state.spu.cycleCounter & ~1) + 2048 * 2;
|
||||
state.spu.ch1.duty.nr3 = 0;
|
||||
state.spu.ch1.duty.pos = 0;
|
||||
state.spu.ch1.env.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch1.env.volume = 0;
|
||||
state.spu.ch1.lcounter.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch1.lcounter.lengthCounter = 0x40;
|
||||
state.spu.ch1.nr4 = 0;
|
||||
state.spu.ch1.master = true;
|
||||
|
||||
state.spu.ch2.duty.nextPosUpdate = (state.spu.cycleCounter & ~1) + 2048 * 2;
|
||||
state.spu.ch2.duty.nr3 = 0;
|
||||
state.spu.ch2.duty.pos = 0;
|
||||
state.spu.ch2.env.counter = state.spu.cycleCounter - ((state.spu.cycleCounter - 0x1000) & 0x7FFF) + 8ul * 0x8000;
|
||||
state.spu.ch2.env.volume = 0;
|
||||
state.spu.ch2.lcounter.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch2.lcounter.lengthCounter = 0x40;
|
||||
state.spu.ch2.nr4 = 0;
|
||||
state.spu.ch2.master = false;
|
||||
|
||||
for (unsigned i = 0; i < 0x10; ++i)
|
||||
state.spu.ch3.waveRam.ptr[i] = state.mem.ioamhram.get()[0x130 + i];
|
||||
|
||||
state.spu.ch3.lcounter.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch3.lcounter.lengthCounter = 0x100;
|
||||
state.spu.ch3.waveCounter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch3.lastReadTime = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch3.nr3 = 0;
|
||||
state.spu.ch3.nr4 = 0;
|
||||
state.spu.ch3.wavePos = 0;
|
||||
state.spu.ch3.sampleBuf = 0;
|
||||
state.spu.ch3.master = false;
|
||||
|
||||
state.spu.ch4.lfsr.counter = state.spu.cycleCounter + 4;
|
||||
state.spu.ch4.lfsr.reg = 0xFF;
|
||||
state.spu.ch4.env.counter = state.spu.cycleCounter - ((state.spu.cycleCounter - 0x1000) & 0x7FFF) + 8ul * 0x8000;
|
||||
state.spu.ch4.env.volume = 0;
|
||||
state.spu.ch4.lcounter.counter = SoundUnit::COUNTER_DISABLED;
|
||||
state.spu.ch4.lcounter.lengthCounter = 0x40;
|
||||
state.spu.ch4.nr4 = 0;
|
||||
state.spu.ch4.master = false;
|
||||
|
||||
state.rtc.baseTime = now;
|
||||
state.rtc.haltTime = state.rtc.baseTime;
|
||||
state.rtc.dataDh = 0;
|
||||
state.rtc.dataDl = 0;
|
||||
state.rtc.dataH = 0;
|
||||
state.rtc.dataM = 0;
|
||||
state.rtc.dataS = 0;
|
||||
state.rtc.lastLatchData = false;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@
|
|||
#include <cstdint>
|
||||
|
||||
namespace gambatte {
|
||||
void setInitState(struct SaveState &state, bool cgb, bool gbaCgbMode, std::uint32_t now, bool boot_bios);
|
||||
void setInitState(struct SaveState &state, bool cgb, bool gbaCgbMode, std::uint32_t now);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -525,21 +525,7 @@ static unsigned pow2ceil(unsigned n) {
|
|||
return n;
|
||||
}
|
||||
|
||||
void Cartridge::bios_remap(int setting) {
|
||||
// disable the BIOS if writing 1 or 0x22 (GBC)
|
||||
if (setting == 1 || setting == 0x11) {
|
||||
std::memcpy(memptrs.romdata(), memptrs.notbiosdata_, loc_bios_length);
|
||||
using_bios = false;
|
||||
}
|
||||
|
||||
// we'll also use it to reset to BIOS on reset
|
||||
if (setting == 0) {
|
||||
std::memcpy(memptrs.romdata(), memptrs.biosdata_, loc_bios_length);
|
||||
using_bios = true;
|
||||
}
|
||||
}
|
||||
|
||||
int Cartridge::loadROM(const char *romfiledata, unsigned romfilelength, const char *biosfiledata, unsigned biosfilelength, const bool forceDmg, const bool multicartCompat) {
|
||||
int Cartridge::loadROM(const char *romfiledata, unsigned romfilelength, const bool forceDmg, const bool multicartCompat) {
|
||||
//const std::auto_ptr<File> rom(newFileInstance(romfile));
|
||||
|
||||
//if (rom->fail())
|
||||
|
|
@ -642,9 +628,6 @@ int Cartridge::loadROM(const char *romfiledata, unsigned romfilelength, const ch
|
|||
|
||||
mbc.reset();
|
||||
|
||||
use_bios = biosfilelength > 0 ? true : false;
|
||||
loc_bios_length = biosfilelength;
|
||||
|
||||
memptrs.reset(rombanks, rambanks, cgb ? 8 : 2);
|
||||
rtc.set(false, 0);
|
||||
|
||||
|
|
@ -655,26 +638,6 @@ int Cartridge::loadROM(const char *romfiledata, unsigned romfilelength, const ch
|
|||
std::memset(memptrs.romdata() + (filesize / 0x4000) * 0x4000ul, 0xFF, (rombanks - filesize / 0x4000) * 0x4000ul);
|
||||
enforce8bit(memptrs.romdata(), rombanks * 0x4000ul);
|
||||
|
||||
//we want to copy in the bios data only if it exists
|
||||
if (use_bios) {
|
||||
using_bios = true;
|
||||
memptrs.use_bios = true;
|
||||
|
||||
memptrs.biosdata_ = new unsigned char[biosfilelength];
|
||||
memptrs.notbiosdata_ = new unsigned char[biosfilelength];
|
||||
|
||||
std::memcpy(memptrs.biosdata_, biosfiledata, biosfilelength);
|
||||
std::memcpy(memptrs.notbiosdata_, romfiledata, biosfilelength);
|
||||
|
||||
//if using GBC, the header is not overwritten by the BIOS
|
||||
if (biosfilelength > 256) {
|
||||
std::memcpy(memptrs.biosdata_ + 256, memptrs.notbiosdata_ + 256, 256);
|
||||
}
|
||||
|
||||
|
||||
std::memcpy(memptrs.romdata(), memptrs.biosdata_, biosfilelength);
|
||||
}
|
||||
|
||||
//if (rom->fail())
|
||||
// return -1;
|
||||
|
||||
|
|
@ -785,14 +748,6 @@ SYNCFUNC(Cartridge)
|
|||
SSS(memptrs);
|
||||
SSS(rtc);
|
||||
TSS(mbc);
|
||||
NSS(using_bios);
|
||||
|
||||
if (using_bios) {
|
||||
bios_remap(0);
|
||||
}
|
||||
else {
|
||||
bios_remap(1);
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -67,10 +67,6 @@ public:
|
|||
void setStatePtrs(SaveState &);
|
||||
void loadState(const SaveState &);
|
||||
|
||||
bool use_bios;
|
||||
bool using_bios;
|
||||
unsigned loc_bios_length;
|
||||
|
||||
bool loaded() const { return mbc.get(); }
|
||||
|
||||
const unsigned char * rmem(unsigned area) const { return memptrs.rmem(area); }
|
||||
|
|
@ -101,15 +97,13 @@ public:
|
|||
|
||||
bool getMemoryArea(int which, unsigned char **data, int *length) const;
|
||||
|
||||
int loadROM(const char *romfiledata, unsigned romfilelength, const char *biosfiledata, unsigned biosfilelength, bool forceDmg, bool multicartCompat);
|
||||
int loadROM(const char *romfiledata, unsigned romfilelength, bool forceDmg, bool multicartCompat);
|
||||
const char * romTitle() const { return reinterpret_cast<const char *>(memptrs.romdata() + 0x134); }
|
||||
|
||||
void setRTCCallback(std::uint32_t (*callback)()) {
|
||||
rtc.setRTCCallback(callback);
|
||||
}
|
||||
|
||||
void bios_remap(int setting);
|
||||
|
||||
template<bool isReader>void SyncState(NewState *ns);
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -31,11 +31,6 @@ MemPtrs::MemPtrs()
|
|||
|
||||
MemPtrs::~MemPtrs() {
|
||||
delete []memchunk_;
|
||||
if (use_bios)
|
||||
{
|
||||
delete[]biosdata_;
|
||||
delete[]notbiosdata_;
|
||||
}
|
||||
}
|
||||
|
||||
void MemPtrs::reset(const unsigned rombanks, const unsigned rambanks, const unsigned wrambanks) {
|
||||
|
|
@ -226,10 +221,6 @@ SYNCFUNC(MemPtrs)
|
|||
MSS(rambankdata_);
|
||||
MSS(wramdataend_);
|
||||
NSS(oamDmaSrc_);
|
||||
|
||||
NSS(biosdata_);
|
||||
NSS(notbiosdata_);
|
||||
NSS(use_bios);
|
||||
}
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -51,10 +51,6 @@ class MemPtrs {
|
|||
unsigned char * rdisabledRamw() const { return wramdataend_ ; }
|
||||
unsigned char * wdisabledRam() const { return wramdataend_ + 0x2000; }
|
||||
public:
|
||||
unsigned char *biosdata_;
|
||||
unsigned char *notbiosdata_;
|
||||
bool use_bios;
|
||||
|
||||
enum RamFlag { READ_EN = 1, WRITE_EN = 2, RTC_EN = 4 };
|
||||
|
||||
MemPtrs();
|
||||
|
|
|
|||
|
|
@ -875,7 +875,6 @@ void Memory::nontrivial_ff_write(const unsigned P, unsigned data, const unsigned
|
|||
case 0x50:
|
||||
// this is the register that turns off the bootrom
|
||||
// it can only ever be written to once (with 1) once boot rom finishes
|
||||
cart.bios_remap(data);
|
||||
return;
|
||||
case 0x51:
|
||||
dmaSource = data << 8 | (dmaSource & 0xFF);
|
||||
|
|
@ -1016,8 +1015,8 @@ void Memory::nontrivial_write(const unsigned P, const unsigned data, const unsig
|
|||
ioamhram[P - 0xFE00] = data;
|
||||
}
|
||||
|
||||
int Memory::loadROM(const char *romfiledata, unsigned romfilelength, const char *biosfiledata, unsigned biosfilelength, const bool forceDmg, const bool multicartCompat) {
|
||||
if (const int fail = cart.loadROM(romfiledata, romfilelength, biosfiledata, biosfilelength, forceDmg, multicartCompat))
|
||||
int Memory::loadROM(const char *romfiledata, unsigned romfilelength, const bool forceDmg, const bool multicartCompat) {
|
||||
if (const int fail = cart.loadROM(romfiledata, romfilelength, forceDmg, multicartCompat))
|
||||
return fail;
|
||||
|
||||
sound.init(cart.isCgb());
|
||||
|
|
|
|||
|
|
@ -88,10 +88,6 @@ public:
|
|||
bool loaded() const { return cart.loaded(); }
|
||||
const char * romTitle() const { return cart.romTitle(); }
|
||||
|
||||
void bios_reset(int setting) {
|
||||
nontrivial_ff_write(0x50, setting, 0);
|
||||
}
|
||||
|
||||
int debugGetLY() const { return display.debugGetLY(); }
|
||||
|
||||
void setStatePtrs(SaveState &state);
|
||||
|
|
@ -249,7 +245,7 @@ public:
|
|||
unsigned long event(unsigned long cycleCounter);
|
||||
unsigned long resetCounters(unsigned long cycleCounter);
|
||||
|
||||
int loadROM(const char *romfiledata, unsigned romfilelength, const char *biosfiledata, unsigned biosfilelength, bool forceDmg, bool multicartCompat);
|
||||
int loadROM(const char *romfiledata, unsigned romfilelength, bool forceDmg, bool multicartCompat);
|
||||
|
||||
void setInputGetter(unsigned (*getInput)()) {
|
||||
this->getInput = getInput;
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@ struct SaveState {
|
|||
void set(T *ptr, const unsigned long sz) { this->ptr = ptr; this->sz = sz; }
|
||||
|
||||
friend class SaverList;
|
||||
friend void setInitState(SaveState &, bool, bool, std::uint32_t, bool);
|
||||
friend void setInitState(SaveState &, bool, bool, std::uint32_t);
|
||||
};
|
||||
|
||||
struct CPU {
|
||||
|
|
@ -78,7 +78,6 @@ struct SaveState {
|
|||
bool enableRam;
|
||||
bool rambankMode;
|
||||
bool hdmaTransfer;
|
||||
bool using_bios;
|
||||
} mem;
|
||||
|
||||
struct PPU {
|
||||
|
|
|
|||
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