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z80: reset cleanup

This commit is contained in:
alyosha-tas 2018-06-14 08:02:06 -04:00
parent 660fb500ae
commit 3e495e3a28
3 changed files with 12 additions and 17 deletions
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8
BizHawk.Emulation.Cores/CPUs/Z80A/ReadMe.txt
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@ -1,7 +1,5 @@
TODO:
Mode 0
Check T-cycle level memory access timing
Check R register
new tests for WZ Registers
Memory refresh - IR is pushed onto the address bus at instruction start, does anything need this?
Mode 0 (nothing to test with)
IRQ BUS timings (nothing to test with)
BusAQ (nothing to test with)

6
BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs
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@ -127,12 +127,6 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
Regs[i] = 0;
}
// These registers are set as part of the reset process
Regs[A] = 0xFF;
Regs[F] = 0xFF;
Regs[SPl] = 0xFF;
Regs[SPh] = 0xFF;
// the IRQ1 vector is 0x38
Regs[IRQ_V] = 0x38;
// The NMI vector is constant 0x66

15
BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs
View File

@ -97,13 +97,16 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
ResetInterrupts();
TotalExecutedCycles = 0;
cur_instr = new ushort[]
{ IDLE,
WAIT,
OP_F,
OP };
{IDLE,
DEC16, F, A,
DEC16, SPl, SPh,
IDLE,
WAIT,
OP_F,
OP };
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
MEMRQ = new ushort[] { PCh, 0, 0, 0 };
BUSRQ = new ushort[] { 0, 0, 0, PCh, 0, 0, 0 };
MEMRQ = new ushort[] { 0, 0, 0, PCh, 0, 0, 0 };
instr_pntr = 0; bus_pntr = 0; mem_pntr = 0;
NO_prefix = true;
}