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BizHawk/BizHawk.Emulation.Cores/CPUs/MOS 6502X/6502XXX/UopTable.cpp

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Add unmanaged version of 6502X core. The core it self is nearly exactly a copy+paste job from the C# one; most things map over exactly. A strange and abusive p/invoke setup is required to realize a performance gain; see code for details. Seems to be worth a bit more than 20% overall speed for me. Core is savestate compatible with managed 6502X. slight modifications to existing API has been made to support the new cpu. also included is a test module that runs both cores together, savestating every cycle to check for sameness. Core should fit in Atari, although that hasn't been done yet. For the moment, tracelog and disassemble are broken, but they'll be back soon.
2012-10-30 23:01:54 +00:00
// AUTOGENERATED
#include "UopEnum.h"
const Uop Microcode[264][8] = {
{Uop_Fetch2, Uop_PushPCH, Uop_PushPCL, Uop_PushP_BRK, Uop_FetchPCLVector, Uop_FetchPCHVector, Uop_End_SuppressInterrupt},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_READ_ORA, Uop_End},
{Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_RMW, Uop_IdxInd_Stage7_RMW_SLO, Uop_IdxInd_Stage8_RMW, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_NOP, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_ORA, Uop_End},
{Uop_Fetch2, Uop_ZP_RMW_Stage3, Uop_ZP_RMW_ASL, Uop_ZP_RMW_Stage5, Uop_End},
{Uop_Fetch2, Uop_ZP_RMW_Stage3, Uop_ZP_RMW_SLO, Uop_ZP_RMW_Stage5, Uop_End},
{Uop_FetchDummy, Uop_PushP, Uop_End},
{Uop_Imm_ORA, Uop_End},
{Uop_Imp_ASL_A, Uop_End},
{Uop_Imm_ANC, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_NOP, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_ORA, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_RMW_Stage4, Uop_Abs_RMW_Stage5_ASL, Uop_Abs_RMW_Stage6, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_RMW_Stage4, Uop_Abs_RMW_Stage5_SLO, Uop_Abs_RMW_Stage6, Uop_End},
{Uop_RelBranch_Stage2_BPL, Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_READ_Stage5, Uop_IndIdx_READ_Stage6_ORA, Uop_End},
{Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_RMW_Stage5, Uop_IndIdx_RMW_Stage6, Uop_IndIdx_RMW_Stage7_SLO, Uop_IndIdx_RMW_Stage8, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_NOP, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_ORA, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZpIdx_RMW_Stage4, Uop_ZP_RMW_ASL, Uop_ZpIdx_RMW_Stage6, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZpIdx_RMW_Stage4, Uop_ZP_RMW_SLO, Uop_ZpIdx_RMW_Stage6, Uop_End},
{Uop_Imp_CLC, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_ORA, Uop_End},
{Uop_FetchDummy, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_SLO, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_NOP, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_ORA, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_ASL, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_SLO, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_NOP, Uop_PushPCH, Uop_PushPCL, Uop_JSR, Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_READ_AND, Uop_End},
{Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_RMW, Uop_IdxInd_Stage7_RMW_RLA, Uop_IdxInd_Stage8_RMW, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_BIT, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_AND, Uop_End},
{Uop_Fetch2, Uop_ZP_RMW_Stage3, Uop_ZP_RMW_ROL, Uop_ZP_RMW_Stage5, Uop_End},
{Uop_Fetch2, Uop_ZP_RMW_Stage3, Uop_ZP_RMW_RLA, Uop_ZP_RMW_Stage5, Uop_End},
{Uop_FetchDummy, Uop_IncS, Uop_PullP_NoInc, Uop_End_ISpecial},
{Uop_Imm_AND, Uop_End},
{Uop_Imp_ROL_A, Uop_End},
{Uop_Imm_ANC, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_BIT, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_AND, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_RMW_Stage4, Uop_Abs_RMW_Stage5_ROL, Uop_Abs_RMW_Stage6, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_RMW_Stage4, Uop_Abs_RMW_Stage5_RLA, Uop_Abs_RMW_Stage6, Uop_End},
{Uop_RelBranch_Stage2_BMI, Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_READ_Stage5, Uop_IndIdx_READ_Stage6_AND, Uop_End},
{Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_RMW_Stage5, Uop_IndIdx_RMW_Stage6, Uop_IndIdx_RMW_Stage7_RLA, Uop_IndIdx_RMW_Stage8, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_NOP, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_AND, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZpIdx_RMW_Stage4, Uop_ZP_RMW_ROL, Uop_ZpIdx_RMW_Stage6, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZpIdx_RMW_Stage4, Uop_ZP_RMW_RLA, Uop_ZpIdx_RMW_Stage6, Uop_End},
{Uop_Imp_SEC, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_AND, Uop_End},
{Uop_FetchDummy, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_RLA, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_NOP, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_AND, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_ROL, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_RLA, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_FetchDummy, Uop_IncS, Uop_PullP, Uop_PullPCL, Uop_PullPCH_NoInc, Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_READ_EOR, Uop_End},
{Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_RMW, Uop_IdxInd_Stage7_RMW_SRE, Uop_IdxInd_Stage8_RMW, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_NOP, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_EOR, Uop_End},
{Uop_Fetch2, Uop_ZP_RMW_Stage3, Uop_ZP_RMW_LSR, Uop_ZP_RMW_Stage5, Uop_End},
{Uop_Fetch2, Uop_ZP_RMW_Stage3, Uop_ZP_RMW_SRE, Uop_ZP_RMW_Stage5, Uop_End},
{Uop_FetchDummy, Uop_PushA, Uop_End},
{Uop_Imm_EOR, Uop_End},
{Uop_Imp_LSR_A, Uop_End},
{Uop_Imm_ASR, Uop_End},
{Uop_Fetch2, Uop_JMP_abs, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_EOR, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_RMW_Stage4, Uop_Abs_RMW_Stage5_LSR, Uop_Abs_RMW_Stage6, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_RMW_Stage4, Uop_Abs_RMW_Stage5_SRE, Uop_Abs_RMW_Stage6, Uop_End},
{Uop_RelBranch_Stage2_BVC, Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_READ_Stage5, Uop_IndIdx_READ_Stage6_EOR, Uop_End},
{Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_RMW_Stage5, Uop_IndIdx_RMW_Stage6, Uop_IndIdx_RMW_Stage7_SRE, Uop_IndIdx_RMW_Stage8, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_NOP, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_EOR, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZpIdx_RMW_Stage4, Uop_ZP_RMW_LSR, Uop_ZpIdx_RMW_Stage6, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZpIdx_RMW_Stage4, Uop_ZP_RMW_SRE, Uop_ZpIdx_RMW_Stage6, Uop_End},
{Uop_Imp_CLI, Uop_End_ISpecial},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_EOR, Uop_End},
{Uop_FetchDummy, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_SRE, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_NOP, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_EOR, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_LSR, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_SRE, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_FetchDummy, Uop_IncS, Uop_PullPCL, Uop_PullPCH_NoInc, Uop_IncPC, Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_READ_ADC, Uop_End},
{Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_RMW, Uop_IdxInd_Stage7_RMW_RRA, Uop_IdxInd_Stage8_RMW, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_NOP, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_ADC, Uop_End},
{Uop_Fetch2, Uop_ZP_RMW_Stage3, Uop_ZP_RMW_ROR, Uop_ZP_RMW_Stage5, Uop_End},
{Uop_Fetch2, Uop_ZP_RMW_Stage3, Uop_ZP_RMW_RRA, Uop_ZP_RMW_Stage5, Uop_End},
{Uop_FetchDummy, Uop_IncS, Uop_PullA_NoInc, Uop_End},
{Uop_Imm_ADC, Uop_End},
{Uop_Imp_ROR_A, Uop_End},
{Uop_Imm_ARR, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_AbsInd_JMP_Stage4, Uop_AbsInd_JMP_Stage5, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_ADC, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_RMW_Stage4, Uop_Abs_RMW_Stage5_ROR, Uop_Abs_RMW_Stage6, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_RMW_Stage4, Uop_Abs_RMW_Stage5_RRA, Uop_Abs_RMW_Stage6, Uop_End},
{Uop_RelBranch_Stage2_BVS, Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_READ_Stage5, Uop_IndIdx_READ_Stage6_ADC, Uop_End},
{Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_RMW_Stage5, Uop_IndIdx_RMW_Stage6, Uop_IndIdx_RMW_Stage7_RRA, Uop_IndIdx_RMW_Stage8, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_NOP, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_ADC, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZpIdx_RMW_Stage4, Uop_ZP_RMW_ROR, Uop_ZpIdx_RMW_Stage6, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZpIdx_RMW_Stage4, Uop_ZP_RMW_RRA, Uop_ZpIdx_RMW_Stage6, Uop_End},
{Uop_Imp_SEI, Uop_End_ISpecial},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_ADC, Uop_End},
{Uop_FetchDummy, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_RRA, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_NOP, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_ADC, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_ROR, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_RRA, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Imm_Unsupported, Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_WRITE_STA, Uop_End},
{Uop_Imm_Unsupported, Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_WRITE_SAX, Uop_End},
{Uop_Fetch2, Uop_ZP_WRITE_STY, Uop_End},
{Uop_Fetch2, Uop_ZP_WRITE_STA, Uop_End},
{Uop_Fetch2, Uop_ZP_WRITE_STX, Uop_End},
{Uop_Fetch2, Uop_ZP_WRITE_SAX, Uop_End},
{Uop_Imp_DEY, Uop_End},
{Uop_Imm_Unsupported, Uop_End},
{Uop_Imp_TXA, Uop_End},
{Uop_Imm_Unsupported, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_WRITE_STY, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_WRITE_STA, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_WRITE_STX, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_WRITE_SAX, Uop_End},
{Uop_RelBranch_Stage2_BCC, Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_WRITE_Stage5, Uop_IndIdx_WRITE_Stage6_STA, Uop_End},
{Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_WRITE_Stage5, Uop_IndIdx_WRITE_Stage6_SHA, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_WRITE_STY, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_WRITE_STA, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_Y, Uop_ZP_WRITE_STX, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_Y, Uop_ZP_WRITE_SAX, Uop_End},
{Uop_Imp_TYA, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_Stage4, Uop_AbsIdx_WRITE_Stage5_STA, Uop_End},
{Uop_Imp_TXS, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_WRITE_Stage5_ERROR, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_WRITE_Stage5_SHY, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_WRITE_Stage5_STA, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_Stage4, Uop_AbsIdx_WRITE_Stage5_SHX, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_Stage4, Uop_AbsIdx_WRITE_Stage5_SHY, Uop_End},
{Uop_Imm_LDY, Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_READ_LDA, Uop_End},
{Uop_Imm_LDX, Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_READ_LAX, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_LDY, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_LDA, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_LDX, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_LAX, Uop_End},
{Uop_Imp_TAY, Uop_End},
{Uop_Imm_LDA, Uop_End},
{Uop_Imp_TAX, Uop_End},
{Uop_Imm_LXA, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_LDY, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_LDA, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_LDX, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_LAX, Uop_End},
{Uop_RelBranch_Stage2_BCS, Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_READ_Stage5, Uop_IndIdx_READ_Stage6_LDA, Uop_End},
{Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_READ_Stage5, Uop_IndIdx_READ_Stage6_LAX, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_LDY, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_LDA, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_Y, Uop_ZP_READ_LDX, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_Y, Uop_ZP_READ_LAX, Uop_End},
{Uop_Imp_CLV, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_LDA, Uop_End},
{Uop_Imp_TSX, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_ERROR, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_LDY, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_LDA, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_LDX, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_LAX, Uop_End},
{Uop_Imm_CPY, Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_READ_CMP, Uop_End},
{Uop_Imm_Unsupported, Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_RMW, Uop_IdxInd_Stage7_RMW_DCP, Uop_IdxInd_Stage8_RMW, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_CPY, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_CMP, Uop_End},
{Uop_Fetch2, Uop_ZP_RMW_Stage3, Uop_ZP_RMW_DEC, Uop_ZP_RMW_Stage5, Uop_End},
{Uop_Fetch2, Uop_ZP_RMW_Stage3, Uop_ZP_RMW_DCP, Uop_ZP_RMW_Stage5, Uop_End},
{Uop_Imp_INY, Uop_End},
{Uop_Imm_CMP, Uop_End},
{Uop_Imp_DEX, Uop_End},
{Uop_Imm_AXS, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_CPY, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_CMP, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_RMW_Stage4, Uop_Abs_RMW_Stage5_DEC, Uop_Abs_RMW_Stage6, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_RMW_Stage4, Uop_Abs_RMW_Stage5_DCP, Uop_Abs_RMW_Stage6, Uop_End},
{Uop_RelBranch_Stage2_BNE, Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_READ_Stage5, Uop_IndIdx_READ_Stage6_CMP, Uop_End},
{Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_RMW_Stage5, Uop_IndIdx_RMW_Stage6, Uop_IndIdx_RMW_Stage7_DCP, Uop_IndIdx_RMW_Stage8, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_NOP, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_CMP, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZpIdx_RMW_Stage4, Uop_ZP_RMW_DEC, Uop_ZpIdx_RMW_Stage6, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZpIdx_RMW_Stage4, Uop_ZP_RMW_DCP, Uop_ZpIdx_RMW_Stage6, Uop_End},
{Uop_Imp_CLD, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_CMP, Uop_End},
{Uop_FetchDummy, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_DCP, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_NOP, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_CMP, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_DEC, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_DCP, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Imm_CPX, Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_READ_SBC, Uop_End},
{Uop_Imm_Unsupported, Uop_End},
{Uop_Fetch2, Uop_IdxInd_Stage3, Uop_IdxInd_Stage4, Uop_IdxInd_Stage5, Uop_IdxInd_Stage6_RMW, Uop_IdxInd_Stage7_RMW_ISC, Uop_IdxInd_Stage8_RMW, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_CPX, Uop_End},
{Uop_Fetch2, Uop_ZP_READ_SBC, Uop_End},
{Uop_Fetch2, Uop_ZP_RMW_Stage3, Uop_ZP_RMW_INC, Uop_ZP_RMW_Stage5, Uop_End},
{Uop_Fetch2, Uop_ZP_RMW_Stage3, Uop_ZP_RMW_ISC, Uop_ZP_RMW_Stage5, Uop_End},
{Uop_Imp_INX, Uop_End},
{Uop_Imm_SBC, Uop_End},
{Uop_FetchDummy, Uop_End},
{Uop_Imm_SBC, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_CPX, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_READ_SBC, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_RMW_Stage4, Uop_Abs_RMW_Stage5_INC, Uop_Abs_RMW_Stage6, Uop_End},
{Uop_Fetch2, Uop_Fetch3, Uop_Abs_RMW_Stage4, Uop_Abs_RMW_Stage5_ISC, Uop_Abs_RMW_Stage6, Uop_End},
{Uop_RelBranch_Stage2_BEQ, Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_READ_Stage5, Uop_IndIdx_READ_Stage6_SBC, Uop_End},
{Uop_End},
{Uop_Fetch2, Uop_IndIdx_Stage3, Uop_IndIdx_Stage4, Uop_IndIdx_RMW_Stage5, Uop_IndIdx_RMW_Stage6, Uop_IndIdx_RMW_Stage7_ISC, Uop_IndIdx_RMW_Stage8, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_NOP, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZP_READ_SBC, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZpIdx_RMW_Stage4, Uop_ZP_RMW_INC, Uop_ZpIdx_RMW_Stage6, Uop_End},
{Uop_Fetch2, Uop_ZpIdx_Stage3_X, Uop_ZpIdx_RMW_Stage4, Uop_ZP_RMW_ISC, Uop_ZpIdx_RMW_Stage6, Uop_End},
{Uop_Imp_SED, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_SBC, Uop_End},
{Uop_FetchDummy, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_Y, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_ISC, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_NOP, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_READ_Stage4, Uop_AbsIdx_READ_Stage5_SBC, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_INC, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch2, Uop_AbsIdx_Stage3_X, Uop_AbsIdx_Stage4, Uop_AbsIdx_RMW_Stage5, Uop_AbsIdx_RMW_Stage6_ISC, Uop_AbsIdx_RMW_Stage7, Uop_End},
{Uop_Fetch1},
{Uop_RelBranch_Stage3, Uop_End_BranchSpecial},
{Uop_RelBranch_Stage4, Uop_End},
{Uop_End_SuppressInterrupt},
{Uop_FetchDummy, Uop_FetchDummy, Uop_PushPCH, Uop_PushPCL, Uop_PushP_NMI, Uop_FetchPCLVector, Uop_FetchPCHVector, Uop_End_SuppressInterrupt},
{Uop_FetchDummy, Uop_FetchDummy, Uop_PushPCH, Uop_PushPCL, Uop_PushP_IRQ, Uop_FetchPCLVector, Uop_FetchPCHVector, Uop_End_SuppressInterrupt},
{Uop_FetchDummy, Uop_FetchDummy, Uop_PushDummy, Uop_PushDummy, Uop_PushP_Reset, Uop_FetchPCLVector, Uop_FetchPCHVector, Uop_End_SuppressInterrupt},
{Uop_Fetch1_Real},
};