forked from ShuriZma/suyu
Shader Disassembly: Cleanup code and improve output alignment
This commit is contained in:
parent
f5a49df679
commit
9431ee330a
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@ -65,6 +65,19 @@ QVariant GraphicsVertexShaderModel::headerData(int section, Qt::Orientation orie
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return QVariant();
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return QVariant();
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}
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}
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// e.g. "-c92[a0.x].xyzw"
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static void print_input(std::ostringstream& output, const SourceRegister& input,
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bool negate, const std::string& swizzle_mask, bool align = true,
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const std::string& address_register_name = std::string()) {
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if (align)
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output << std::setw(4) << std::right;
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output << ((negate ? "-" : "") + input.GetName());
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if (!address_register_name.empty())
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output << '[' << address_register_name << ']';
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output << '.' << swizzle_mask;
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};
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QVariant GraphicsVertexShaderModel::data(const QModelIndex& index, int role) const {
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QVariant GraphicsVertexShaderModel::data(const QModelIndex& index, int role) const {
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switch (role) {
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switch (role) {
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case Qt::DisplayRole:
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case Qt::DisplayRole:
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@ -81,43 +94,34 @@ QVariant GraphicsVertexShaderModel::data(const QModelIndex& index, int role) con
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case 2:
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case 2:
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{
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{
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std::stringstream output;
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std::ostringstream output;
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output.flags(std::ios::hex);
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output.flags(std::ios::hex | std::ios::uppercase);
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// To make the code aligning columns of assembly easier to keep track of, this function
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// keeps track of the start of the start of the previous column, allowing alignment
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// based on desired field widths.
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int current_column = 0;
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auto AlignToColumn = [&](int col_width) {
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// Prints spaces to the output to pad previous column to size and advances the
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// column marker.
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current_column += col_width;
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int to_add = std::max(1, current_column - (int)output.tellp());
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for (int i = 0; i < to_add; ++i) {
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output << ' ';
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}
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};
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Instruction instr = par->info.code[index.row()];
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Instruction instr = par->info.code[index.row()];
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const SwizzlePattern& swizzle = par->info.swizzle_info[instr.common.operand_desc_id].pattern;
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const SwizzlePattern& swizzle = par->info.swizzle_info[instr.common.operand_desc_id].pattern;
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// longest known instruction name: "setemit "
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// longest known instruction name: "setemit "
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output << std::setw(8) << std::left << instr.opcode.Value().GetInfo().name;
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int kOpcodeColumnWidth = 8;
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// "rXX.xyzw "
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int kOutputColumnWidth = 10;
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// "-rXX.xyzw ", no attempt is made to align indexed inputs
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int kInputOperandColumnWidth = 11;
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// e.g. "-c92.xyzw"
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output << instr.opcode.Value().GetInfo().name;
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static auto print_input = [](std::stringstream& output, const SourceRegister& input,
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bool negate, const std::string& swizzle_mask) {
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output << std::setw(4) << std::right << (negate ? "-" : "") + input.GetName();
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output << "." << swizzle_mask;
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};
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// e.g. "-c92[a0.x].xyzw"
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static auto print_input_indexed = [](std::stringstream& output, const SourceRegister& input,
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bool negate, const std::string& swizzle_mask,
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const std::string& address_register_name) {
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std::string relative_address;
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if (!address_register_name.empty())
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relative_address = "[" + address_register_name + "]";
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output << std::setw(10) << std::right << (negate ? "-" : "") + input.GetName() + relative_address;
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output << "." << swizzle_mask;
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};
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// Use print_input or print_input_indexed depending on whether relative addressing is used or not.
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static auto print_input_indexed_compact = [](std::stringstream& output, const SourceRegister& input,
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bool negate, const std::string& swizzle_mask,
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const std::string& address_register_name) {
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if (address_register_name.empty())
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print_input(output, input, negate, swizzle_mask);
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else
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print_input_indexed(output, input, negate, swizzle_mask, address_register_name);
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};
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switch (instr.opcode.Value().GetInfo().type) {
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switch (instr.opcode.Value().GetInfo().type) {
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case OpCode::Type::Trivial:
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case OpCode::Type::Trivial:
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@ -130,53 +134,54 @@ QVariant GraphicsVertexShaderModel::data(const QModelIndex& index, int role) con
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switch (instr.opcode.Value().EffectiveOpCode()) {
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switch (instr.opcode.Value().EffectiveOpCode()) {
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case OpCode::Id::CMP:
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case OpCode::Id::CMP:
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{
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{
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AlignToColumn(kOpcodeColumnWidth);
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// NOTE: CMP always writes both cc components, so we do not consider the dest mask here.
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// NOTE: CMP always writes both cc components, so we do not consider the dest mask here.
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output << std::setw(4) << std::right << "cc.";
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output << " cc.xy";
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output << "xy ";
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AlignToColumn(kOutputColumnWidth);
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SourceRegister src1 = instr.common.GetSrc1(false);
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SourceRegister src1 = instr.common.GetSrc1(false);
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SourceRegister src2 = instr.common.GetSrc2(false);
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SourceRegister src2 = instr.common.GetSrc2(false);
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print_input_indexed_compact(output, src1, swizzle.negate_src1, swizzle.SelectorToString(false).substr(0,1), instr.common.AddressRegisterName());
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output << ' ';
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output << " " << instr.common.compare_op.ToString(instr.common.compare_op.x) << " ";
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print_input(output, src1, swizzle.negate_src1, swizzle.SelectorToString(false).substr(0,1), false, instr.common.AddressRegisterName());
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print_input(output, src2, swizzle.negate_src2, swizzle.SelectorToString(true).substr(0,1));
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output << ' ' << instr.common.compare_op.ToString(instr.common.compare_op.x) << ' ';
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print_input(output, src2, swizzle.negate_src2, swizzle.SelectorToString(true).substr(0,1), false);
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output << ", ";
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output << ", ";
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print_input_indexed_compact(output, src1, swizzle.negate_src1, swizzle.SelectorToString(false).substr(1,1), instr.common.AddressRegisterName());
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print_input(output, src1, swizzle.negate_src1, swizzle.SelectorToString(false).substr(1,1), false, instr.common.AddressRegisterName());
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output << " " << instr.common.compare_op.ToString(instr.common.compare_op.y) << " ";
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output << ' ' << instr.common.compare_op.ToString(instr.common.compare_op.y) << ' ';
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print_input(output, src2, swizzle.negate_src2, swizzle.SelectorToString(true).substr(1,1));
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print_input(output, src2, swizzle.negate_src2, swizzle.SelectorToString(true).substr(1,1), false);
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break;
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break;
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}
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}
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default:
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default:
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{
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{
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AlignToColumn(kOpcodeColumnWidth);
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bool src_is_inverted = 0 != (instr.opcode.Value().GetInfo().subtype & OpCode::Info::SrcInversed);
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bool src_is_inverted = 0 != (instr.opcode.Value().GetInfo().subtype & OpCode::Info::SrcInversed);
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if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::Dest) {
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if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::Dest) {
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// e.g. "r12.xy__"
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// e.g. "r12.xy__"
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output << std::setw(4) << std::right << instr.common.dest.Value().GetName() + ".";
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output << std::setw(3) << std::right << instr.common.dest.Value().GetName() << '.' << swizzle.DestMaskToString();
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output << swizzle.DestMaskToString();
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} else if (instr.opcode.Value().GetInfo().subtype == OpCode::Info::MOVA) {
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} else if (instr.opcode.Value().GetInfo().subtype == OpCode::Info::MOVA) {
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output << std::setw(4) << std::right << "a0.";
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output << " a0." << swizzle.DestMaskToString();
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output << swizzle.DestMaskToString();
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} else {
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output << " ";
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}
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}
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output << " ";
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AlignToColumn(kOutputColumnWidth);
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if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::Src1) {
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if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::Src1) {
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SourceRegister src1 = instr.common.GetSrc1(src_is_inverted);
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SourceRegister src1 = instr.common.GetSrc1(src_is_inverted);
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print_input_indexed(output, src1, swizzle.negate_src1, swizzle.SelectorToString(false), instr.common.AddressRegisterName());
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print_input(output, src1, swizzle.negate_src1, swizzle.SelectorToString(false), true, instr.common.AddressRegisterName());
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} else {
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AlignToColumn(kInputOperandColumnWidth);
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output << " ";
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}
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}
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// TODO: In some cases, the Address Register is used as an index for SRC2 instead of SRC1
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// TODO: In some cases, the Address Register is used as an index for SRC2 instead of SRC1
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if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::Src2) {
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if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::Src2) {
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SourceRegister src2 = instr.common.GetSrc2(src_is_inverted);
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SourceRegister src2 = instr.common.GetSrc2(src_is_inverted);
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print_input(output, src2, swizzle.negate_src2, swizzle.SelectorToString(true));
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print_input(output, src2, swizzle.negate_src2, swizzle.SelectorToString(true));
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AlignToColumn(kInputOperandColumnWidth);
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}
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}
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break;
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break;
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}
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}
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@ -187,45 +192,53 @@ QVariant GraphicsVertexShaderModel::data(const QModelIndex& index, int role) con
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case OpCode::Type::Conditional:
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case OpCode::Type::Conditional:
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{
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{
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output << ' ';
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switch (instr.opcode.Value().EffectiveOpCode()) {
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switch (instr.opcode.Value().EffectiveOpCode()) {
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case OpCode::Id::LOOP:
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case OpCode::Id::LOOP:
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output << "(unknown instruction format)";
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output << "(unknown instruction format)";
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break;
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break;
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default:
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default:
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output << "if ";
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if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::HasCondition) {
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if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::HasCondition) {
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const char* ops[] = {
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output << '(';
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" || ", " && ", "", ""
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};
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if (instr.flow_control.op != instr.flow_control.JustY)
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output << ((!instr.flow_control.refx) ? "!" : " ") << "cc.x";
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output << ops[instr.flow_control.op];
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if (instr.flow_control.op != instr.flow_control.JustY) {
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if (instr.flow_control.refx) output << '!';
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output << "cc.x";
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}
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if (instr.flow_control.op != instr.flow_control.JustX)
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if (instr.flow_control.op == instr.flow_control.Or) {
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output << ((!instr.flow_control.refy) ? "!" : " ") << "cc.y";
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output << " || ";
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} else if (instr.flow_control.op == instr.flow_control.And) {
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output << " && ";
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}
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output << " ";
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if (instr.flow_control.op != instr.flow_control.JustX) {
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if (instr.flow_control.refy) output << '!';
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output << "cc.y";
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}
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output << ") ";
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} else if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::HasUniformIndex) {
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} else if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::HasUniformIndex) {
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output << "b" << instr.flow_control.bool_uniform_id << " ";
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output << 'b' << instr.flow_control.bool_uniform_id << ' ';
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}
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}
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u32 target_addr = instr.flow_control.dest_offset;
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u32 target_addr = instr.flow_control.dest_offset;
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u32 target_addr_else = instr.flow_control.dest_offset;
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u32 target_addr_else = instr.flow_control.dest_offset;
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if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::HasAlternative) {
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if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::HasAlternative) {
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output << "else jump to 0x" << std::setw(4) << std::right << std::setfill('0') << 4 * instr.flow_control.dest_offset << " ";
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output << "else jump to 0x" << std::setw(4) << std::right << std::setfill('0') << (4 * instr.flow_control.dest_offset);
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} else if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::HasExplicitDest) {
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} else if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::HasExplicitDest) {
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output << "jump to 0x" << std::setw(4) << std::right << std::setfill('0') << 4 * instr.flow_control.dest_offset << " ";
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output << "jump to 0x" << std::setw(4) << std::right << std::setfill('0') << (4 * instr.flow_control.dest_offset);
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} else {
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} else {
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// TODO: Handle other cases
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// TODO: Handle other cases
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output << "(unknown destination)";
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}
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}
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if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::HasFinishPoint) {
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if (instr.opcode.Value().GetInfo().subtype & OpCode::Info::HasFinishPoint) {
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output << "(return on " << std::setw(4) << std::right << std::setfill('0')
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output << " (return on " << std::setw(4) << std::right << std::setfill('0')
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<< 4 * instr.flow_control.dest_offset + 4 * instr.flow_control.num_instructions << ")";
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<< (4 * instr.flow_control.dest_offset + 4 * instr.flow_control.num_instructions) << ')';
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}
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}
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break;
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break;
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@ -234,7 +247,7 @@ QVariant GraphicsVertexShaderModel::data(const QModelIndex& index, int role) con
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}
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}
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default:
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default:
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output << "(unknown instruction format)";
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output << " (unknown instruction format)";
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break;
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break;
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}
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}
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