forked from ShuriZma/suyu
Merge pull request #608 from Subv/depth
GPU: Implemented the depth buffer and depth test + culling
This commit is contained in:
commit
92c7135065
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@ -280,6 +280,34 @@ public:
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UnsignedInt = 0x2,
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};
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enum class ComparisonOp : u32 {
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Never = 0x200,
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Less = 0x201,
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Equal = 0x202,
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LessEqual = 0x203,
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Greater = 0x204,
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NotEqual = 0x205,
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GreaterEqual = 0x206,
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Always = 0x207,
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};
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struct Cull {
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enum class FrontFace : u32 {
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ClockWise = 0x0900,
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CounterClockWise = 0x0901,
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};
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enum class CullFace : u32 {
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Front = 0x0404,
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Back = 0x0405,
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FrontAndBack = 0x0408,
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};
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u32 enabled;
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FrontFace front_face;
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CullFace cull_face;
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};
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struct Blend {
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enum class Equation : u32 {
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Add = 1,
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@ -413,7 +441,7 @@ public:
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struct {
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u32 address_high;
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u32 address_low;
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u32 format;
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Tegra::DepthFormat format;
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u32 block_dimensions;
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u32 layer_stride;
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@ -435,11 +463,21 @@ public:
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};
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} rt_control;
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INSERT_PADDING_WORDS(0x31);
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INSERT_PADDING_WORDS(0x2B);
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u32 depth_test_enable;
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INSERT_PADDING_WORDS(0x5);
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u32 independent_blend_enable;
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INSERT_PADDING_WORDS(0x15);
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u32 depth_write_enabled;
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INSERT_PADDING_WORDS(0x8);
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ComparisonOp depth_test_func;
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INSERT_PADDING_WORDS(0xB);
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struct {
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u32 separate_alpha;
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@ -540,7 +578,13 @@ public:
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}
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} index_array;
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INSERT_PADDING_WORDS(0xC7);
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INSERT_PADDING_WORDS(0x7);
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INSERT_PADDING_WORDS(0x46);
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Cull cull;
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INSERT_PADDING_WORDS(0x77);
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struct {
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u32 query_address_high;
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@ -747,7 +791,10 @@ ASSERT_REG_POSITION(vertex_buffer, 0x35D);
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ASSERT_REG_POSITION(zeta, 0x3F8);
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ASSERT_REG_POSITION(vertex_attrib_format[0], 0x458);
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ASSERT_REG_POSITION(rt_control, 0x487);
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ASSERT_REG_POSITION(depth_test_enable, 0x4B3);
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ASSERT_REG_POSITION(independent_blend_enable, 0x4B9);
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ASSERT_REG_POSITION(depth_write_enabled, 0x4BA);
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ASSERT_REG_POSITION(depth_test_func, 0x4C3);
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ASSERT_REG_POSITION(blend, 0x4CF);
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ASSERT_REG_POSITION(vb_element_base, 0x50D);
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ASSERT_REG_POSITION(tsc, 0x557);
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@ -755,6 +802,7 @@ ASSERT_REG_POSITION(tic, 0x55D);
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ASSERT_REG_POSITION(code_address, 0x582);
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ASSERT_REG_POSITION(draw, 0x585);
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ASSERT_REG_POSITION(index_array, 0x5F2);
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ASSERT_REG_POSITION(cull, 0x646);
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ASSERT_REG_POSITION(query, 0x6C0);
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ASSERT_REG_POSITION(vertex_array[0], 0x700);
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ASSERT_REG_POSITION(independent_blend, 0x780);
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@ -24,6 +24,15 @@ enum class RenderTargetFormat : u32 {
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R11G11B10_FLOAT = 0xE0,
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};
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enum class DepthFormat : u32 {
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Z32_FLOAT = 0xA,
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Z16_UNORM = 0x13,
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S8_Z24_UNORM = 0x14,
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Z24_X8_UNORM = 0x15,
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Z24_S8_UNORM = 0x16,
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Z24_C8_UNORM = 0x18,
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};
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/// Returns the number of bytes per pixel of each rendertarget format.
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u32 RenderTargetBytesPerPixel(RenderTargetFormat format);
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@ -304,10 +304,15 @@ void RasterizerOpenGL::DrawArrays() {
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MICROPROFILE_SCOPE(OpenGL_Drawing);
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const auto& regs = Core::System().GetInstance().GPU().Maxwell3D().regs;
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// TODO(bunnei): Implement these
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// Sync the depth test state before configuring the framebuffer surfaces.
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SyncDepthTestState();
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// TODO(bunnei): Implement this
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const bool has_stencil = false;
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const bool using_color_fb = true;
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const bool using_depth_fb = false;
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const bool using_depth_fb = regs.zeta.Address() != 0;
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const MathUtil::Rectangle<s32> viewport_rect{regs.viewport_transform[0].GetRect()};
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const bool write_color_fb =
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@ -338,11 +343,9 @@ void RasterizerOpenGL::DrawArrays() {
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// Bind the framebuffer surfaces
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BindFramebufferSurfaces(color_surface, depth_surface, has_stencil);
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// Sync the viewport
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SyncViewport(surfaces_rect);
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// Sync the blend state registers
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SyncBlendState();
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SyncCullMode();
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// TODO(bunnei): Sync framebuffer_scale uniform here
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// TODO(bunnei): Sync scissorbox uniform(s) here
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@ -712,7 +715,11 @@ void RasterizerOpenGL::SyncClipCoef() {
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}
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void RasterizerOpenGL::SyncCullMode() {
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UNREACHABLE();
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const auto& regs = Core::System().GetInstance().GPU().Maxwell3D().regs;
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state.cull.enabled = regs.cull.enabled != 0;
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state.cull.front_face = MaxwellToGL::FrontFace(regs.cull.front_face);
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state.cull.mode = MaxwellToGL::CullFace(regs.cull.cull_face);
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}
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void RasterizerOpenGL::SyncDepthScale() {
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@ -723,6 +730,14 @@ void RasterizerOpenGL::SyncDepthOffset() {
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UNREACHABLE();
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}
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void RasterizerOpenGL::SyncDepthTestState() {
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const auto& regs = Core::System().GetInstance().GPU().Maxwell3D().regs;
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state.depth.test_enabled = regs.depth_test_enable != 0;
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state.depth.write_mask = regs.depth_write_enabled ? GL_TRUE : GL_FALSE;
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state.depth.test_func = MaxwellToGL::ComparisonOp(regs.depth_test_func);
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}
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void RasterizerOpenGL::SyncBlendState() {
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const auto& regs = Core::System().GetInstance().GPU().Maxwell3D().regs;
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@ -126,6 +126,9 @@ private:
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/// Syncs the depth offset to match the guest state
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void SyncDepthOffset();
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/// Syncs the depth test state to match the guest state
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void SyncDepthTestState();
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/// Syncs the blend state to match the guest state
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void SyncBlendState();
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@ -84,22 +84,18 @@ static constexpr std::array<FormatTuple, SurfaceParams::MaxPixelFormat> tex_form
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true}, // DXT45
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{GL_COMPRESSED_RED_RGTC1, GL_RED, GL_UNSIGNED_INT_8_8_8_8, ComponentType::UNorm, true}, // DXN1
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{GL_RGBA8, GL_RGBA, GL_UNSIGNED_BYTE, ComponentType::UNorm, false}, // ASTC_2D_4X4
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// DepthStencil formats
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{GL_DEPTH24_STENCIL8, GL_DEPTH_STENCIL, GL_UNSIGNED_INT_24_8, ComponentType::UNorm,
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false}, // Z24S8
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}};
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static const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType component_type) {
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const SurfaceType type = SurfaceParams::GetFormatType(pixel_format);
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if (type == SurfaceType::ColorTexture) {
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ASSERT(static_cast<size_t>(pixel_format) < tex_format_tuples.size());
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auto& format = tex_format_tuples[static_cast<unsigned int>(pixel_format)];
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ASSERT(component_type == format.component_type);
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return format;
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} else if (type == SurfaceType::Depth || type == SurfaceType::DepthStencil) {
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// TODO(Subv): Implement depth formats
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ASSERT_MSG(false, "Unimplemented");
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}
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ASSERT(static_cast<size_t>(pixel_format) < tex_format_tuples.size());
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auto& format = tex_format_tuples[static_cast<unsigned int>(pixel_format)];
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ASSERT(component_type == format.component_type);
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UNREACHABLE();
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return {};
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return format;
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}
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VAddr SurfaceParams::GetCpuAddr() const {
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@ -149,11 +145,17 @@ void MortonCopy(u32 stride, u32 block_height, u32 height, u8* gl_buffer, Tegra::
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const auto& gpu = Core::System::GetInstance().GPU();
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if (morton_to_gl) {
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auto data = Tegra::Texture::UnswizzleTexture(
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*gpu.memory_manager->GpuToCpuAddress(addr),
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SurfaceParams::TextureFormatFromPixelFormat(format), stride, height, block_height);
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std::memcpy(gl_buffer, data.data(), data.size());
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if (SurfaceParams::GetFormatType(format) == SurfaceType::ColorTexture) {
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auto data = Tegra::Texture::UnswizzleTexture(
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*gpu.memory_manager->GpuToCpuAddress(addr),
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SurfaceParams::TextureFormatFromPixelFormat(format), stride, height, block_height);
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std::memcpy(gl_buffer, data.data(), data.size());
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} else {
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auto data = Tegra::Texture::UnswizzleDepthTexture(
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*gpu.memory_manager->GpuToCpuAddress(addr),
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SurfaceParams::DepthFormatFromPixelFormat(format), stride, height, block_height);
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std::memcpy(gl_buffer, data.data(), data.size());
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}
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} else {
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// TODO(bunnei): Assumes the default rendering GOB size of 16 (128 lines). We should
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// check the configuration for this and perform more generic un/swizzle
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@ -174,7 +176,7 @@ static constexpr std::array<void (*)(u32, u32, u32, u8*, Tegra::GPUVAddr),
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MortonCopy<true, PixelFormat::R11FG11FB10F>, MortonCopy<true, PixelFormat::RGBA32UI>,
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MortonCopy<true, PixelFormat::DXT1>, MortonCopy<true, PixelFormat::DXT23>,
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MortonCopy<true, PixelFormat::DXT45>, MortonCopy<true, PixelFormat::DXN1>,
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MortonCopy<true, PixelFormat::ASTC_2D_4X4>,
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MortonCopy<true, PixelFormat::ASTC_2D_4X4>, MortonCopy<true, PixelFormat::Z24S8>,
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};
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static constexpr std::array<void (*)(u32, u32, u32, u8*, Tegra::GPUVAddr),
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@ -194,6 +196,7 @@ static constexpr std::array<void (*)(u32, u32, u32, u8*, Tegra::GPUVAddr),
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nullptr,
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nullptr,
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MortonCopy<false, PixelFormat::ABGR8>,
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MortonCopy<false, PixelFormat::Z24S8>,
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};
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// Allocate an uninitialized texture of appropriate size and format for the surface
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@ -397,9 +400,15 @@ SurfaceSurfaceRect_Tuple RasterizerCacheOpenGL::GetFramebufferSurfaces(
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// get color and depth surfaces
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const SurfaceParams color_params{SurfaceParams::CreateForFramebuffer(regs.rt[0])};
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const SurfaceParams depth_params{color_params};
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SurfaceParams depth_params{color_params};
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ASSERT_MSG(!using_depth_fb, "depth buffer is unimplemented");
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if (using_depth_fb) {
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depth_params.addr = regs.zeta.Address();
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depth_params.pixel_format = SurfaceParams::PixelFormatFromDepthFormat(regs.zeta.format);
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depth_params.component_type = SurfaceParams::ComponentTypeFromDepthFormat(regs.zeta.format);
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depth_params.type = SurfaceParams::GetFormatType(depth_params.pixel_format);
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depth_params.size_in_bytes = depth_params.SizeInBytes();
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}
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MathUtil::Rectangle<u32> color_rect{};
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Surface color_surface;
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|
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@ -37,7 +37,14 @@ struct SurfaceParams {
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DXN1 = 11, // This is also known as BC4
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ASTC_2D_4X4 = 12,
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Max,
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MaxColorFormat,
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// DepthStencil formats
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Z24S8 = 13,
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MaxDepthStencilFormat,
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Max = MaxDepthStencilFormat,
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Invalid = 255,
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};
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@ -84,6 +91,7 @@ struct SurfaceParams {
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4, // DXT45
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4, // DXN1
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4, // ASTC_2D_4X4
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1, // Z24S8
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}};
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ASSERT(static_cast<size_t>(format) < compression_factor_table.size());
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|
@ -108,6 +116,7 @@ struct SurfaceParams {
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128, // DXT45
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64, // DXN1
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32, // ASTC_2D_4X4
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32, // Z24S8
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}};
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ASSERT(static_cast<size_t>(format) < bpp_table.size());
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|
@ -117,6 +126,16 @@ struct SurfaceParams {
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return GetFormatBpp(pixel_format);
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}
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static PixelFormat PixelFormatFromDepthFormat(Tegra::DepthFormat format) {
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switch (format) {
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case Tegra::DepthFormat::Z24_S8_UNORM:
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return PixelFormat::Z24S8;
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default:
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NGLOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format));
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UNREACHABLE();
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}
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}
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static PixelFormat PixelFormatFromRenderTargetFormat(Tegra::RenderTargetFormat format) {
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switch (format) {
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case Tegra::RenderTargetFormat::RGBA8_UNORM:
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|
@ -205,6 +224,15 @@ struct SurfaceParams {
|
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}
|
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}
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static Tegra::DepthFormat DepthFormatFromPixelFormat(PixelFormat format) {
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switch (format) {
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case PixelFormat::Z24S8:
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return Tegra::DepthFormat::Z24_S8_UNORM;
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default:
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UNREACHABLE();
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}
|
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}
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|
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static ComponentType ComponentTypeFromTexture(Tegra::Texture::ComponentType type) {
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// TODO(Subv): Implement more component types
|
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switch (type) {
|
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|
@ -244,11 +272,26 @@ struct SurfaceParams {
|
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}
|
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}
|
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|
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static ComponentType ComponentTypeFromDepthFormat(Tegra::DepthFormat format) {
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switch (format) {
|
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case Tegra::DepthFormat::Z24_S8_UNORM:
|
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return ComponentType::UNorm;
|
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default:
|
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NGLOG_CRITICAL(HW_GPU, "Unimplemented format={}", static_cast<u32>(format));
|
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UNREACHABLE();
|
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}
|
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}
|
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|
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static SurfaceType GetFormatType(PixelFormat pixel_format) {
|
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if (static_cast<size_t>(pixel_format) < MaxPixelFormat) {
|
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if (static_cast<size_t>(pixel_format) < static_cast<size_t>(PixelFormat::MaxColorFormat)) {
|
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return SurfaceType::ColorTexture;
|
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}
|
||||
|
||||
if (static_cast<size_t>(pixel_format) <
|
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static_cast<size_t>(PixelFormat::MaxDepthStencilFormat)) {
|
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return SurfaceType::DepthStencil;
|
||||
}
|
||||
|
||||
// TODO(Subv): Implement the other formats
|
||||
ASSERT(false);
|
||||
|
||||
|
|
|
@ -201,4 +201,54 @@ inline GLenum SwizzleSource(Tegra::Texture::SwizzleSource source) {
|
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return {};
|
||||
}
|
||||
|
||||
inline GLenum ComparisonOp(Maxwell::ComparisonOp comparison) {
|
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switch (comparison) {
|
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case Maxwell::ComparisonOp::Never:
|
||||
return GL_NEVER;
|
||||
case Maxwell::ComparisonOp::Less:
|
||||
return GL_LESS;
|
||||
case Maxwell::ComparisonOp::Equal:
|
||||
return GL_EQUAL;
|
||||
case Maxwell::ComparisonOp::LessEqual:
|
||||
return GL_LEQUAL;
|
||||
case Maxwell::ComparisonOp::Greater:
|
||||
return GL_GREATER;
|
||||
case Maxwell::ComparisonOp::NotEqual:
|
||||
return GL_NOTEQUAL;
|
||||
case Maxwell::ComparisonOp::GreaterEqual:
|
||||
return GL_GEQUAL;
|
||||
case Maxwell::ComparisonOp::Always:
|
||||
return GL_ALWAYS;
|
||||
}
|
||||
NGLOG_CRITICAL(Render_OpenGL, "Unimplemented comparison op={}", static_cast<u32>(comparison));
|
||||
UNREACHABLE();
|
||||
return {};
|
||||
}
|
||||
|
||||
inline GLenum FrontFace(Maxwell::Cull::FrontFace front_face) {
|
||||
switch (front_face) {
|
||||
case Maxwell::Cull::FrontFace::ClockWise:
|
||||
return GL_CW;
|
||||
case Maxwell::Cull::FrontFace::CounterClockWise:
|
||||
return GL_CCW;
|
||||
}
|
||||
NGLOG_CRITICAL(Render_OpenGL, "Unimplemented front face cull={}", static_cast<u32>(front_face));
|
||||
UNREACHABLE();
|
||||
return {};
|
||||
}
|
||||
|
||||
inline GLenum CullFace(Maxwell::Cull::CullFace cull_face) {
|
||||
switch (cull_face) {
|
||||
case Maxwell::Cull::CullFace::Front:
|
||||
return GL_FRONT;
|
||||
case Maxwell::Cull::CullFace::Back:
|
||||
return GL_BACK;
|
||||
case Maxwell::Cull::CullFace::FrontAndBack:
|
||||
return GL_FRONT_AND_BACK;
|
||||
}
|
||||
NGLOG_CRITICAL(Render_OpenGL, "Unimplemented cull face={}", static_cast<u32>(cull_face));
|
||||
UNREACHABLE();
|
||||
return {};
|
||||
}
|
||||
|
||||
} // namespace MaxwellToGL
|
||||
|
|
|
@ -5,6 +5,7 @@
|
|||
#include <cstring>
|
||||
#include "common/assert.h"
|
||||
#include "core/memory.h"
|
||||
#include "video_core/gpu.h"
|
||||
#include "video_core/textures/decoders.h"
|
||||
#include "video_core/textures/texture.h"
|
||||
|
||||
|
@ -73,6 +74,16 @@ u32 BytesPerPixel(TextureFormat format) {
|
|||
}
|
||||
}
|
||||
|
||||
static u32 DepthBytesPerPixel(DepthFormat format) {
|
||||
switch (format) {
|
||||
case DepthFormat::Z24_S8_UNORM:
|
||||
return 4;
|
||||
default:
|
||||
UNIMPLEMENTED_MSG("Format not implemented");
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
std::vector<u8> UnswizzleTexture(VAddr address, TextureFormat format, u32 width, u32 height,
|
||||
u32 block_height) {
|
||||
u8* data = Memory::GetPointer(address);
|
||||
|
@ -110,6 +121,26 @@ std::vector<u8> UnswizzleTexture(VAddr address, TextureFormat format, u32 width,
|
|||
return unswizzled_data;
|
||||
}
|
||||
|
||||
std::vector<u8> UnswizzleDepthTexture(VAddr address, DepthFormat format, u32 width, u32 height,
|
||||
u32 block_height) {
|
||||
u8* data = Memory::GetPointer(address);
|
||||
u32 bytes_per_pixel = DepthBytesPerPixel(format);
|
||||
|
||||
std::vector<u8> unswizzled_data(width * height * bytes_per_pixel);
|
||||
|
||||
switch (format) {
|
||||
case DepthFormat::Z24_S8_UNORM:
|
||||
CopySwizzledData(width, height, bytes_per_pixel, bytes_per_pixel, data,
|
||||
unswizzled_data.data(), true, block_height);
|
||||
break;
|
||||
default:
|
||||
UNIMPLEMENTED_MSG("Format not implemented");
|
||||
break;
|
||||
}
|
||||
|
||||
return unswizzled_data;
|
||||
}
|
||||
|
||||
std::vector<u8> DecodeTexture(const std::vector<u8>& texture_data, TextureFormat format, u32 width,
|
||||
u32 height) {
|
||||
std::vector<u8> rgba_data;
|
||||
|
|
|
@ -17,6 +17,12 @@ namespace Texture {
|
|||
std::vector<u8> UnswizzleTexture(VAddr address, TextureFormat format, u32 width, u32 height,
|
||||
u32 block_height = TICEntry::DefaultBlockHeight);
|
||||
|
||||
/**
|
||||
* Unswizzles a swizzled depth texture without changing its format.
|
||||
*/
|
||||
std::vector<u8> UnswizzleDepthTexture(VAddr address, DepthFormat format, u32 width, u32 height,
|
||||
u32 block_height = TICEntry::DefaultBlockHeight);
|
||||
|
||||
/// Copies texture data from a buffer and performs swizzling/unswizzling as necessary.
|
||||
void CopySwizzledData(u32 width, u32 height, u32 bytes_per_pixel, u32 out_bytes_per_pixel,
|
||||
u8* swizzled_data, u8* unswizzled_data, bool unswizzle, u32 block_height);
|
||||
|
|
Loading…
Reference in New Issue