forked from ShuriZma/suyu
shader_decode: Implement F2I
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parent
8abe5ba2c8
commit
3052eae25e
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@ -73,6 +73,43 @@ u32 ShaderIR::DecodeConversion(BasicBlock& bb, u32 pc) {
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SetRegister(bb, instr.gpr0, value);
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break;
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}
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case OpCode::Id::F2I_R:
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case OpCode::Id::F2I_C: {
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UNIMPLEMENTED_IF(instr.conversion.src_size != Register::Size::Word);
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UNIMPLEMENTED_IF_MSG(instr.generates_cc,
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"Condition codes generation in F2I is not implemented");
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Node value = [&]() {
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if (instr.is_b_gpr) {
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return GetRegister(instr.gpr20);
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} else {
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return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
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}
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}();
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value = GetOperandAbsNegFloat(value, instr.conversion.abs_a, instr.conversion.negate_a);
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value = [&]() {
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switch (instr.conversion.f2i.rounding) {
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case Tegra::Shader::F2iRoundingOp::None:
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return value;
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case Tegra::Shader::F2iRoundingOp::Floor:
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return Operation(OperationCode::FFloor, PRECISE, value);
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case Tegra::Shader::F2iRoundingOp::Ceil:
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return Operation(OperationCode::FCeil, PRECISE, value);
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case Tegra::Shader::F2iRoundingOp::Trunc:
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return Operation(OperationCode::FTrunc, PRECISE, value);
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default:
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UNIMPLEMENTED_MSG("Unimplemented F2I rounding mode {}",
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static_cast<u32>(instr.conversion.f2i.rounding.Value()));
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}
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}();
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const bool is_signed = instr.conversion.is_output_signed;
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value = SignedOperation(OperationCode::ICastFloat, is_signed, PRECISE, value);
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value = ConvertIntegerSize(value, instr.conversion.dest_size, is_signed);
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SetRegister(bb, instr.gpr0, value);
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break;
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled conversion instruction: {}", opcode->get().GetName());
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}
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