forked from ShuriZma/suyu
SMMU: Add Android compatibility
This commit is contained in:
parent
0adc09e0af
commit
303cd31162
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@ -217,9 +217,6 @@ DeviceMemoryManager<Traits>::DeviceMemoryManager(const DeviceMemory& device_memo
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cpu_backing_address(device_as_size >> Memory::YUZU_PAGEBITS) {
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cpu_backing_address(device_as_size >> Memory::YUZU_PAGEBITS) {
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impl = std::make_unique<DeviceMemoryManagerAllocator<Traits>>();
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impl = std::make_unique<DeviceMemoryManagerAllocator<Traits>>();
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cached_pages = std::make_unique<CachedPages>();
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cached_pages = std::make_unique<CachedPages>();
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for (size_t i = 0; i < 1ULL << (33 - 12); i++) {
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compressed_device_addr[i] = 0;
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}
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}
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}
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template <typename Traits>
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template <typename Traits>
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@ -517,7 +514,7 @@ void DeviceMemoryManager<Traits>::UpdatePagesCachedCount(DAddr addr, size_t size
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u64 cache_begin = 0;
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u64 cache_begin = 0;
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u64 uncache_bytes = 0;
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u64 uncache_bytes = 0;
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u64 cache_bytes = 0;
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u64 cache_bytes = 0;
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const auto* MarkRegionCaching = &DeviceMemoryManager<Traits>::DeviceMethods::MarkRegionCaching;
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const auto MarkRegionCaching = &DeviceMemoryManager<Traits>::DeviceMethods::MarkRegionCaching;
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std::atomic_thread_fence(std::memory_order_acquire);
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std::atomic_thread_fence(std::memory_order_acquire);
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const size_t page_end = Common::DivCeil(addr + size, Memory::YUZU_PAGESIZE);
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const size_t page_end = Common::DivCeil(addr + size, Memory::YUZU_PAGESIZE);
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@ -8,6 +8,7 @@
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "common/logging/log.h"
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#include "core/core.h"
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#include "core/core.h"
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#include "core/hle/kernel/k_process.h"
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#include "core/hle/service/nvdrv/core/container.h"
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#include "core/hle/service/nvdrv/core/container.h"
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#include "core/hle/service/nvdrv/core/nvmap.h"
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#include "core/hle/service/nvdrv/core/nvmap.h"
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#include "core/hle/service/nvdrv/core/syncpoint_manager.h"
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#include "core/hle/service/nvdrv/core/syncpoint_manager.h"
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@ -135,7 +136,8 @@ NvResult nvhost_nvdec_common::GetWaitbase(IoctlGetWaitbase& params) {
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return NvResult::Success;
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return NvResult::Success;
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}
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}
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NvResult nvhost_nvdec_common::MapBuffer(IoctlMapBuffer& params, std::span<MapBufferEntry> entries, DeviceFD fd) {
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NvResult nvhost_nvdec_common::MapBuffer(IoctlMapBuffer& params, std::span<MapBufferEntry> entries,
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DeviceFD fd) {
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const size_t num_entries = std::min(params.num_entries, static_cast<u32>(entries.size()));
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const size_t num_entries = std::min(params.num_entries, static_cast<u32>(entries.size()));
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for (size_t i = 0; i < num_entries; i++) {
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for (size_t i = 0; i < num_entries; i++) {
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DAddr pin_address = nvmap.PinHandle(entries[i].map_handle, sessions[fd], true);
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DAddr pin_address = nvmap.PinHandle(entries[i].map_handle, sessions[fd], true);
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@ -44,8 +44,7 @@ bool AddressSpaceContains(const Common::PageTable& table, const Common::ProcessA
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// from outside classes. This also allows modification to the internals of the memory
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// from outside classes. This also allows modification to the internals of the memory
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// subsystem without needing to rebuild all files that make use of the memory interface.
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// subsystem without needing to rebuild all files that make use of the memory interface.
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struct Memory::Impl {
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struct Memory::Impl {
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explicit Impl(Core::System& system_)
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explicit Impl(Core::System& system_) : system{system_} {}
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: system{system_} {}
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void SetCurrentPageTable(Kernel::KProcess& process) {
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void SetCurrentPageTable(Kernel::KProcess& process) {
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current_page_table = &process.GetPageTable().GetImpl();
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current_page_table = &process.GetPageTable().GetImpl();
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@ -640,18 +639,6 @@ struct Memory::Impl {
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LOG_DEBUG(HW_Memory, "Mapping {:016X} onto {:016X}-{:016X}", GetInteger(target),
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LOG_DEBUG(HW_Memory, "Mapping {:016X} onto {:016X}-{:016X}", GetInteger(target),
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base * YUZU_PAGESIZE, (base + size) * YUZU_PAGESIZE);
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base * YUZU_PAGESIZE, (base + size) * YUZU_PAGESIZE);
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// During boot, current_page_table might not be set yet, in which case we need not flush
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/*if (system.IsPoweredOn()) {
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auto& gpu = system.GPU();
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for (u64 i = 0; i < size; i++) {
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const auto page = base + i;
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if (page_table.pointers[page].Type() == Common::PageType::RasterizerCachedMemory) {
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gpu.FlushAndInvalidateRegion(page << YUZU_PAGEBITS, YUZU_PAGESIZE);
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}
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}
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}*/
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const auto end = base + size;
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const auto end = base + size;
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ASSERT_MSG(end <= page_table.pointers.size(), "out of range mapping at {:016X}",
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ASSERT_MSG(end <= page_table.pointers.size(), "out of range mapping at {:016X}",
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base + page_table.pointers.size());
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base + page_table.pointers.size());
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@ -823,8 +810,7 @@ struct Memory::Impl {
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}
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}
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const size_t core = system.GetCurrentHostThreadID();
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const size_t core = system.GetCurrentHostThreadID();
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auto& current_area = rasterizer_read_areas[core];
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auto& current_area = rasterizer_read_areas[core];
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gpu_device_memory->ApplyOpOnPointer(
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gpu_device_memory->ApplyOpOnPointer(p, scratch_buffers[core], [&](DAddr address) {
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p, scratch_buffers[core], [&](DAddr address) {
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const DAddr end_address = address + size;
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const DAddr end_address = address + size;
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if (current_area.start_address <= address && end_address <= current_area.end_address)
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if (current_area.start_address <= address && end_address <= current_area.end_address)
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[[likely]] {
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[[likely]] {
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@ -852,8 +838,7 @@ struct Memory::Impl {
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sys_core_guard.unlock();
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sys_core_guard.unlock();
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}
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}
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});
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});
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gpu_device_memory->ApplyOpOnPointer(
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gpu_device_memory->ApplyOpOnPointer(p, scratch_buffers[core], [&](DAddr address) {
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p, scratch_buffers[core], [&](DAddr address) {
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auto& current_area = rasterizer_write_areas[core];
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auto& current_area = rasterizer_write_areas[core];
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PAddr subaddress = address >> YUZU_PAGEBITS;
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PAddr subaddress = address >> YUZU_PAGEBITS;
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bool do_collection = current_area.last_address == subaddress;
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bool do_collection = current_area.last_address == subaddress;
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@ -872,12 +857,25 @@ struct Memory::Impl {
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PAddr last_address;
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PAddr last_address;
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};
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};
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void InvalidateRegion(Common::ProcessAddress dest_addr, size_t size) {
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void InvalidateGPUMemory(u8* p, size_t size) {
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system.GPU().InvalidateRegion(GetInteger(dest_addr), size);
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constexpr size_t sys_core = Core::Hardware::NUM_CPU_CORES - 1;
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const size_t core = std::min(system.GetCurrentHostThreadID(),
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sys_core); // any other calls threads go to syscore.
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if (!gpu_device_memory) [[unlikely]] {
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gpu_device_memory = &system.Host1x().MemoryManager();
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}
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}
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// Guard on sys_core;
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void FlushRegion(Common::ProcessAddress dest_addr, size_t size) {
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if (core == sys_core) [[unlikely]] {
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system.GPU().FlushRegion(GetInteger(dest_addr), size);
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sys_core_guard.lock();
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}
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SCOPE_EXIT({
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if (core == sys_core) [[unlikely]] {
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sys_core_guard.unlock();
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}
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});
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auto& gpu = system.GPU();
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gpu_device_memory->ApplyOpOnPointer(
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p, scratch_buffers[core], [&](DAddr address) { gpu.InvalidateRegion(address, size); });
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}
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}
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Core::System& system;
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Core::System& system;
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@ -1081,14 +1079,6 @@ void Memory::MarkRegionDebug(Common::ProcessAddress vaddr, u64 size, bool debug)
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impl->MarkRegionDebug(GetInteger(vaddr), size, debug);
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impl->MarkRegionDebug(GetInteger(vaddr), size, debug);
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}
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}
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void Memory::InvalidateRegion(Common::ProcessAddress dest_addr, size_t size) {
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impl->InvalidateRegion(dest_addr, size);
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}
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void Memory::FlushRegion(Common::ProcessAddress dest_addr, size_t size) {
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impl->FlushRegion(dest_addr, size);
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}
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bool Memory::InvalidateNCE(Common::ProcessAddress vaddr, size_t size) {
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bool Memory::InvalidateNCE(Common::ProcessAddress vaddr, size_t size) {
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[[maybe_unused]] bool mapped = true;
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[[maybe_unused]] bool mapped = true;
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[[maybe_unused]] bool rasterizer = false;
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[[maybe_unused]] bool rasterizer = false;
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@ -1100,10 +1090,10 @@ bool Memory::InvalidateNCE(Common::ProcessAddress vaddr, size_t size) {
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GetInteger(vaddr));
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GetInteger(vaddr));
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mapped = false;
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mapped = false;
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},
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},
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[&] {
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[&] { rasterizer = true; });
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impl->system.GPU().InvalidateRegion(GetInteger(vaddr), size);
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if (rasterizer) {
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rasterizer = true;
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impl->InvalidateGPUMemory(ptr, size);
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});
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}
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#ifdef __linux__
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#ifdef __linux__
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if (!rasterizer && mapped) {
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if (!rasterizer && mapped) {
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@ -486,10 +486,10 @@ public:
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void MarkRegionDebug(Common::ProcessAddress vaddr, u64 size, bool debug);
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void MarkRegionDebug(Common::ProcessAddress vaddr, u64 size, bool debug);
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void SetGPUDirtyManagers(std::span<Core::GPUDirtyMemoryManager> managers);
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void SetGPUDirtyManagers(std::span<Core::GPUDirtyMemoryManager> managers);
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void InvalidateRegion(Common::ProcessAddress dest_addr, size_t size);
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bool InvalidateNCE(Common::ProcessAddress vaddr, size_t size);
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bool InvalidateNCE(Common::ProcessAddress vaddr, size_t size);
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bool InvalidateSeparateHeap(void* fault_address);
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bool InvalidateSeparateHeap(void* fault_address);
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void FlushRegion(Common::ProcessAddress dest_addr, size_t size);
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private:
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private:
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Core::System& system;
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Core::System& system;
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@ -17,7 +17,7 @@ struct MaxwellDeviceTraits {
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static constexpr bool supports_pinning = false;
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static constexpr bool supports_pinning = false;
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static constexpr size_t device_virtual_bits = 34;
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static constexpr size_t device_virtual_bits = 34;
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using DeviceInterface = typename VideoCore::RasterizerInterface;
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using DeviceInterface = typename VideoCore::RasterizerInterface;
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using DeviceMethods = typename MaxwellDeviceMethods;
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using DeviceMethods = MaxwellDeviceMethods;
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};
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};
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using MaxwellDeviceMemoryManager = Core::DeviceMemoryManager<MaxwellDeviceTraits>;
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using MaxwellDeviceMemoryManager = Core::DeviceMemoryManager<MaxwellDeviceTraits>;
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@ -13,6 +13,8 @@ Host1x::Host1x(Core::System& system_)
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memory_manager(system.DeviceMemory()), gmmu_manager{system, memory_manager, 32, 12},
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memory_manager(system.DeviceMemory()), gmmu_manager{system, memory_manager, 32, 12},
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allocator{std::make_unique<Common::FlatAllocator<u32, 0, 32>>(1 << 12)} {}
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allocator{std::make_unique<Common::FlatAllocator<u32, 0, 32>>(1 << 12)} {}
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Host1x::~Host1x() = default;
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} // namespace Host1x
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} // namespace Host1x
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} // namespace Tegra
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} // namespace Tegra
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@ -21,6 +21,7 @@ namespace Host1x {
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class Host1x {
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class Host1x {
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public:
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public:
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explicit Host1x(Core::System& system);
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explicit Host1x(Core::System& system);
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~Host1x();
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SyncpointManager& GetSyncpointManager() {
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SyncpointManager& GetSyncpointManager() {
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return syncpoint_manager;
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return syncpoint_manager;
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@ -68,7 +68,7 @@ public:
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if (!address) {
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if (!address) {
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return {};
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return {};
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}
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}
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return memory.GetPointer(*address);
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return memory.GetPointer<T>(*address);
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}
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}
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template <typename T>
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template <typename T>
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@ -256,8 +256,8 @@ void QueryCacheBase<Traits>::CounterReport(GPUVAddr addr, QueryType counter_type
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return std::make_pair<u64, u32>(cur_addr >> Core::Memory::YUZU_PAGEBITS,
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return std::make_pair<u64, u32>(cur_addr >> Core::Memory::YUZU_PAGEBITS,
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static_cast<u32>(cur_addr & Core::Memory::YUZU_PAGEMASK));
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static_cast<u32>(cur_addr & Core::Memory::YUZU_PAGEMASK));
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};
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};
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u8* pointer = impl->device_memory.GetPointer<u8>(cpu_addr);
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u8* pointer = impl->device_memory.template GetPointer<u8>(cpu_addr);
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u8* pointer_timestamp = impl->device_memory.GetPointer<u8>(cpu_addr + 8);
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u8* pointer_timestamp = impl->device_memory.template GetPointer<u8>(cpu_addr + 8);
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bool is_synced = !Settings::IsGPULevelHigh() && is_fence;
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bool is_synced = !Settings::IsGPULevelHigh() && is_fence;
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std::function<void()> operation([this, is_synced, streamer, query_base = query, query_location,
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std::function<void()> operation([this, is_synced, streamer, query_base = query, query_location,
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pointer, pointer_timestamp] {
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pointer, pointer_timestamp] {
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@ -561,7 +561,7 @@ bool QueryCacheBase<Traits>::SemiFlushQueryDirty(QueryCacheBase<Traits>::QueryLo
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}
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}
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if (True(query_base->flags & QueryFlagBits::IsFinalValueSynced) &&
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if (True(query_base->flags & QueryFlagBits::IsFinalValueSynced) &&
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False(query_base->flags & QueryFlagBits::IsGuestSynced)) {
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False(query_base->flags & QueryFlagBits::IsGuestSynced)) {
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auto* ptr = impl->device_memory.GetPointer<u8>(query_base->guest_address);
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auto* ptr = impl->device_memory.template GetPointer<u8>(query_base->guest_address);
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if (True(query_base->flags & QueryFlagBits::HasTimestamp)) {
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if (True(query_base->flags & QueryFlagBits::HasTimestamp)) {
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std::memcpy(ptr, &query_base->value, sizeof(query_base->value));
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std::memcpy(ptr, &query_base->value, sizeof(query_base->value));
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return false;
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return false;
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