forked from ShuriZma/suyu
arm_interface: Add missing fpsr/tpidr members to the ThreadContext struct
Internally within the kernel, it also includes a member variable for the floating-point status register, and TPIDR, so we should do the same here to match it. While we're at it, also fix up the size of the struct and add a static assertion to ensure it always stays the correct size.
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@ -22,10 +22,16 @@ public:
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std::array<u64, 31> cpu_registers;
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u64 sp;
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u64 pc;
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u64 pstate;
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u32 pstate;
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std::array<u8, 4> padding;
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std::array<u128, 32> vector_registers;
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u64 fpcr;
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u32 fpcr;
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u32 fpsr;
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u64 tpidr;
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};
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// Internally within the kernel, it expects the AArch64 version of the
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// thread context to be 800 bytes in size.
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static_assert(sizeof(ThreadContext) == 0x320);
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/// Runs the CPU until an event happens
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virtual void Run() = 0;
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@ -247,15 +247,19 @@ void ARM_Dynarmic::SaveContext(ThreadContext& ctx) {
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ctx.pstate = jit->GetPstate();
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ctx.vector_registers = jit->GetVectors();
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ctx.fpcr = jit->GetFpcr();
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ctx.fpsr = jit->GetFpsr();
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ctx.tpidr = cb->tpidr_el0;
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}
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void ARM_Dynarmic::LoadContext(const ThreadContext& ctx) {
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jit->SetRegisters(ctx.cpu_registers);
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jit->SetSP(ctx.sp);
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jit->SetPC(ctx.pc);
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jit->SetPstate(static_cast<u32>(ctx.pstate));
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jit->SetPstate(ctx.pstate);
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jit->SetVectors(ctx.vector_registers);
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jit->SetFpcr(static_cast<u32>(ctx.fpcr));
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jit->SetFpcr(ctx.fpcr);
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jit->SetFpsr(ctx.fpsr);
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SetTPIDR_EL0(ctx.tpidr);
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}
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void ARM_Dynarmic::PrepareReschedule() {
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@ -250,7 +250,7 @@ static void RegWrite(std::size_t id, u64 val, Kernel::Thread* thread = nullptr)
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} else if (id == PC_REGISTER) {
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thread->context.pc = val;
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} else if (id == PSTATE_REGISTER) {
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thread->context.pstate = val;
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thread->context.pstate = static_cast<u32>(val);
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} else if (id > PSTATE_REGISTER && id < FPCR_REGISTER) {
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thread->context.vector_registers[id - (PSTATE_REGISTER + 1)][0] = val;
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}
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