forked from ShuriZma/suyu
GPU: Add proper framebuffer register handling.
This commit is contained in:
parent
bbc6f314eb
commit
0b4055c152
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@ -84,6 +84,10 @@ const u8* GetFramebufferPointer(const u32 address) {
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template <typename T>
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template <typename T>
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inline void Read(T &var, const u32 addr) {
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inline void Read(T &var, const u32 addr) {
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switch (addr) {
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switch (addr) {
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case Registers::FramebufferTopSize:
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var = g_regs.top_framebuffer.size;
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break;
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case Registers::FramebufferTopLeft1:
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case Registers::FramebufferTopLeft1:
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var = g_regs.framebuffer_top_left_1;
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var = g_regs.framebuffer_top_left_1;
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break;
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break;
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@ -92,6 +96,18 @@ inline void Read(T &var, const u32 addr) {
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var = g_regs.framebuffer_top_left_2;
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var = g_regs.framebuffer_top_left_2;
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break;
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break;
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case Registers::FramebufferTopFormat:
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var = g_regs.top_framebuffer.format;
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break;
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case Registers::FramebufferTopSwapBuffers:
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var = g_regs.top_framebuffer.active_fb;
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break;
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case Registers::FramebufferTopStride:
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var = g_regs.top_framebuffer.stride;
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break;
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case Registers::FramebufferTopRight1:
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case Registers::FramebufferTopRight1:
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var = g_regs.framebuffer_top_right_1;
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var = g_regs.framebuffer_top_right_1;
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break;
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break;
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@ -100,6 +116,10 @@ inline void Read(T &var, const u32 addr) {
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var = g_regs.framebuffer_top_right_2;
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var = g_regs.framebuffer_top_right_2;
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break;
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break;
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case Registers::FramebufferSubSize:
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var = g_regs.sub_framebuffer.size;
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break;
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case Registers::FramebufferSubLeft1:
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case Registers::FramebufferSubLeft1:
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var = g_regs.framebuffer_sub_left_1;
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var = g_regs.framebuffer_sub_left_1;
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break;
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break;
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@ -108,6 +128,26 @@ inline void Read(T &var, const u32 addr) {
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var = g_regs.framebuffer_sub_right_1;
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var = g_regs.framebuffer_sub_right_1;
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break;
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break;
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case Registers::FramebufferSubFormat:
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var = g_regs.sub_framebuffer.format;
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break;
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case Registers::FramebufferSubSwapBuffers:
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var = g_regs.sub_framebuffer.active_fb;
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break;
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case Registers::FramebufferSubStride:
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var = g_regs.sub_framebuffer.stride;
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break;
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case Registers::FramebufferSubLeft2:
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var = g_regs.framebuffer_sub_left_2;
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break;
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case Registers::FramebufferSubRight2:
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var = g_regs.framebuffer_sub_right_2;
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break;
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case Registers::DisplayInputBufferAddr:
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case Registers::DisplayInputBufferAddr:
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var = g_regs.display_transfer.input_address;
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var = g_regs.display_transfer.input_address;
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break;
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break;
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@ -154,6 +194,17 @@ inline void Read(T &var, const u32 addr) {
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template <typename T>
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template <typename T>
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inline void Write(u32 addr, const T data) {
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inline void Write(u32 addr, const T data) {
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switch (static_cast<Registers::Id>(addr)) {
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switch (static_cast<Registers::Id>(addr)) {
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// TODO: Framebuffer registers!!
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case Registers::FramebufferTopSwapBuffers:
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g_regs.top_framebuffer.active_fb = data;
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// TODO: Not sure if this should only be done upon a change!
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break;
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case Registers::FramebufferSubSwapBuffers:
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g_regs.sub_framebuffer.active_fb = data;
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// TODO: Not sure if this should only be done upon a change!
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break;
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case Registers::DisplayInputBufferAddr:
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case Registers::DisplayInputBufferAddr:
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g_regs.display_transfer.input_address = data;
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g_regs.display_transfer.input_address = data;
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break;
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break;
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@ -195,7 +246,7 @@ inline void Write(u32 addr, const T data) {
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g_regs.display_transfer.output_height * g_regs.display_transfer.output_width * 4,
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g_regs.display_transfer.output_height * g_regs.display_transfer.output_width * 4,
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g_regs.display_transfer.GetPhysicalInputAddress(), (int)g_regs.display_transfer.input_width, (int)g_regs.display_transfer.input_height,
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g_regs.display_transfer.GetPhysicalInputAddress(), (int)g_regs.display_transfer.input_width, (int)g_regs.display_transfer.input_height,
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g_regs.display_transfer.GetPhysicalOutputAddress(), (int)g_regs.display_transfer.output_width, (int)g_regs.display_transfer.output_height,
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g_regs.display_transfer.GetPhysicalOutputAddress(), (int)g_regs.display_transfer.output_width, (int)g_regs.display_transfer.output_height,
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(int)g_regs.display_transfer.output_format);
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(int)g_regs.display_transfer.output_format.Value());
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}
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}
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break;
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break;
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@ -14,14 +14,23 @@ static const u32 kFrameTicks = kFrameCycles / 3; ///< Approximate number of i
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struct Registers {
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struct Registers {
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enum Id : u32 {
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enum Id : u32 {
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FramebufferTopLeft1 = 0x1EF00468, // Main LCD, first framebuffer for 3D left
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FramebufferTopSize = 0x1EF0045C,
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FramebufferTopLeft2 = 0x1EF0046C, // Main LCD, second framebuffer for 3D left
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FramebufferTopLeft1 = 0x1EF00468, // Main LCD, first framebuffer for 3D left
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FramebufferTopRight1 = 0x1EF00494, // Main LCD, first framebuffer for 3D right
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FramebufferTopLeft2 = 0x1EF0046C, // Main LCD, second framebuffer for 3D left
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FramebufferTopRight2 = 0x1EF00498, // Main LCD, second framebuffer for 3D right
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FramebufferTopFormat = 0x1EF00470,
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FramebufferSubLeft1 = 0x1EF00568, // Sub LCD, first framebuffer
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FramebufferTopSwapBuffers = 0x1EF00478,
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FramebufferSubLeft2 = 0x1EF0056C, // Sub LCD, second framebuffer
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FramebufferTopStride = 0x1EF00490, // framebuffer row stride?
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FramebufferSubRight1 = 0x1EF00594, // Sub LCD, unused first framebuffer
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FramebufferTopRight1 = 0x1EF00494, // Main LCD, first framebuffer for 3D right
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FramebufferSubRight2 = 0x1EF00598, // Sub LCD, unused second framebuffer
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FramebufferTopRight2 = 0x1EF00498, // Main LCD, second framebuffer for 3D right
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FramebufferSubSize = 0x1EF0055C,
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FramebufferSubLeft1 = 0x1EF00568, // Sub LCD, first framebuffer
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FramebufferSubLeft2 = 0x1EF0056C, // Sub LCD, second framebuffer
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FramebufferSubFormat = 0x1EF00570,
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FramebufferSubSwapBuffers = 0x1EF00578,
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FramebufferSubStride = 0x1EF00590, // framebuffer row stride?
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FramebufferSubRight1 = 0x1EF00594, // Sub LCD, unused first framebuffer
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FramebufferSubRight2 = 0x1EF00598, // Sub LCD, unused second framebuffer
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DisplayInputBufferAddr = 0x1EF00C00,
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DisplayInputBufferAddr = 0x1EF00C00,
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DisplayOutputBufferAddr = 0x1EF00C04,
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DisplayOutputBufferAddr = 0x1EF00C04,
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@ -36,6 +45,15 @@ struct Registers {
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ProcessCommandList = 0x1EF018F0,
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ProcessCommandList = 0x1EF018F0,
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};
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};
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enum class FramebufferFormat : u32 {
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RGBA8 = 0,
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RGB8 = 1,
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RGB565 = 2,
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RGB5A1 = 3,
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RGBA4 = 4,
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};
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// TODO: Move these into the framebuffer struct
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u32 framebuffer_top_left_1;
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u32 framebuffer_top_left_1;
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u32 framebuffer_top_left_2;
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u32 framebuffer_top_left_2;
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u32 framebuffer_top_right_1;
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u32 framebuffer_top_right_1;
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@ -45,6 +63,31 @@ struct Registers {
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u32 framebuffer_sub_right_1;
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u32 framebuffer_sub_right_1;
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u32 framebuffer_sub_right_2;
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u32 framebuffer_sub_right_2;
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struct FrameBufferConfig {
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union {
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u32 size;
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BitField< 0, 16, u32> width;
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BitField<16, 16, u32> height;
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};
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union {
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u32 format;
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BitField< 0, 3, FramebufferFormat> color_format;
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};
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union {
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u32 active_fb;
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BitField<0, 1, u32> second_fb_active;
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};
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u32 stride;
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};
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FrameBufferConfig top_framebuffer;
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FrameBufferConfig sub_framebuffer;
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struct {
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struct {
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u32 input_address;
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u32 input_address;
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u32 output_address;
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u32 output_address;
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@ -75,8 +118,8 @@ struct Registers {
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u32 flags;
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u32 flags;
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BitField< 0, 1, u32> flip_data;
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BitField< 0, 1, u32> flip_data;
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BitField< 8, 3, u32> input_format;
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BitField< 8, 3, FramebufferFormat> input_format;
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BitField<12, 3, u32> output_format;
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BitField<12, 3, FramebufferFormat> output_format;
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BitField<16, 1, u32> output_tiled;
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BitField<16, 1, u32> output_tiled;
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};
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};
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