forked from ShuriZma/suyu
shader: Use TryInstRecursive on XMAD multiply folding
Simplify a bit the logic.
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@ -116,33 +116,31 @@ bool FoldXmadMultiply(IR::Block& block, IR::Inst& inst) {
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*
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*
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* This optimization has been proven safe by LLVM and MSVC.
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* This optimization has been proven safe by LLVM and MSVC.
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*/
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*/
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const IR::Value lhs_arg{inst.Arg(0)};
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IR::Inst* const lhs_shl{inst.Arg(0).TryInstRecursive()};
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const IR::Value rhs_arg{inst.Arg(1)};
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IR::Inst* const rhs_mul{inst.Arg(1).TryInstRecursive()};
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if (lhs_arg.IsImmediate() || rhs_arg.IsImmediate()) {
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if (!lhs_shl || !rhs_mul) {
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return false;
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return false;
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}
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}
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IR::Inst* const lhs_shl{lhs_arg.InstRecursive()};
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if (lhs_shl->GetOpcode() != IR::Opcode::ShiftLeftLogical32 ||
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if (lhs_shl->GetOpcode() != IR::Opcode::ShiftLeftLogical32 ||
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lhs_shl->Arg(1) != IR::Value{16U}) {
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lhs_shl->Arg(1) != IR::Value{16U}) {
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return false;
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return false;
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}
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}
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if (lhs_shl->Arg(0).IsImmediate()) {
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IR::Inst* const lhs_mul{lhs_shl->Arg(0).TryInstRecursive()};
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if (!lhs_mul) {
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return false;
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return false;
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}
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}
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IR::Inst* const lhs_mul{lhs_shl->Arg(0).InstRecursive()};
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IR::Inst* const rhs_mul{rhs_arg.InstRecursive()};
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if (lhs_mul->GetOpcode() != IR::Opcode::IMul32 || rhs_mul->GetOpcode() != IR::Opcode::IMul32) {
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if (lhs_mul->GetOpcode() != IR::Opcode::IMul32 || rhs_mul->GetOpcode() != IR::Opcode::IMul32) {
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return false;
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return false;
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}
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}
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if (lhs_mul->Arg(1).Resolve() != rhs_mul->Arg(1).Resolve()) {
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return false;
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}
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const IR::U32 factor_b{lhs_mul->Arg(1)};
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const IR::U32 factor_b{lhs_mul->Arg(1)};
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if (lhs_mul->Arg(0).IsImmediate() || rhs_mul->Arg(0).IsImmediate()) {
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if (factor_b.Resolve() != rhs_mul->Arg(1).Resolve()) {
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return false;
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}
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IR::Inst* const lhs_bfe{lhs_mul->Arg(0).TryInstRecursive()};
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IR::Inst* const rhs_bfe{rhs_mul->Arg(0).TryInstRecursive()};
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if (!lhs_bfe || !rhs_bfe) {
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return false;
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return false;
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}
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}
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IR::Inst* const lhs_bfe{lhs_mul->Arg(0).InstRecursive()};
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IR::Inst* const rhs_bfe{rhs_mul->Arg(0).InstRecursive()};
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if (lhs_bfe->GetOpcode() != IR::Opcode::BitFieldUExtract) {
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if (lhs_bfe->GetOpcode() != IR::Opcode::BitFieldUExtract) {
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return false;
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return false;
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}
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}
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@ -155,10 +153,10 @@ bool FoldXmadMultiply(IR::Block& block, IR::Inst& inst) {
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if (rhs_bfe->Arg(1) != IR::Value{0U} || rhs_bfe->Arg(2) != IR::Value{16U}) {
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if (rhs_bfe->Arg(1) != IR::Value{0U} || rhs_bfe->Arg(2) != IR::Value{16U}) {
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return false;
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return false;
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}
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}
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if (lhs_bfe->Arg(0).Resolve() != rhs_bfe->Arg(0).Resolve()) {
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const IR::U32 factor_a{lhs_bfe->Arg(0)};
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if (factor_a.Resolve() != rhs_bfe->Arg(0).Resolve()) {
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return false;
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return false;
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}
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}
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const IR::U32 factor_a{lhs_bfe->Arg(0)};
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IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
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IR::IREmitter ir{block, IR::Block::InstructionList::s_iterator_to(inst)};
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inst.ReplaceUsesWith(ir.IMul(factor_a, factor_b));
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inst.ReplaceUsesWith(ir.IMul(factor_a, factor_b));
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return true;
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return true;
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