forked from ShuriZma/suyu
pica: shader_dirty if texture2 coord changed
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0f664ef89d
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039b293092
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@ -93,7 +93,7 @@ ASSERT_REG_POSITION(rasterizer.viewport_corner, 0x68);
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ASSERT_REG_POSITION(rasterizer.depthmap_enable, 0x6D);
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ASSERT_REG_POSITION(rasterizer.depthmap_enable, 0x6D);
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ASSERT_REG_POSITION(texturing, 0x80);
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ASSERT_REG_POSITION(texturing, 0x80);
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ASSERT_REG_POSITION(texturing.texture0_enable, 0x80);
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ASSERT_REG_POSITION(texturing.main_config, 0x80);
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ASSERT_REG_POSITION(texturing.texture0, 0x81);
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ASSERT_REG_POSITION(texturing.texture0, 0x81);
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ASSERT_REG_POSITION(texturing.texture0_format, 0x8e);
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ASSERT_REG_POSITION(texturing.texture0_format, 0x8e);
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ASSERT_REG_POSITION(texturing.fragment_lighting_enable, 0x8f);
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ASSERT_REG_POSITION(texturing.fragment_lighting_enable, 0x8f);
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@ -126,7 +126,7 @@ struct TexturingRegs {
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BitField<10, 1, u32> texture3_enable; // TODO: unimplemented
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BitField<10, 1, u32> texture3_enable; // TODO: unimplemented
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BitField<13, 1, u32> texture2_use_coord1;
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BitField<13, 1, u32> texture2_use_coord1;
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BitField<16, 1, u32> clear_texture_cache; // TODO: unimplemented
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BitField<16, 1, u32> clear_texture_cache; // TODO: unimplemented
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};
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} main_config;
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TextureConfig texture0;
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TextureConfig texture0;
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INSERT_PADDING_WORDS(0x8);
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INSERT_PADDING_WORDS(0x8);
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BitField<0, 4, TextureFormat> texture0_format;
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BitField<0, 4, TextureFormat> texture0_format;
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@ -146,9 +146,9 @@ struct TexturingRegs {
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};
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};
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const std::array<FullTextureConfig, 3> GetTextures() const {
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const std::array<FullTextureConfig, 3> GetTextures() const {
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return {{
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return {{
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{texture0_enable.ToBool(), texture0, texture0_format},
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{main_config.texture0_enable.ToBool(), texture0, texture0_format},
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{texture1_enable.ToBool(), texture1, texture1_format},
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{main_config.texture1_enable.ToBool(), texture1, texture1_format},
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{texture2_enable.ToBool(), texture2, texture2_format},
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{main_config.texture2_enable.ToBool(), texture2, texture2_format},
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}};
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}};
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}
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}
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@ -402,6 +402,10 @@ void RasterizerOpenGL::NotifyPicaRegisterChanged(u32 id) {
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SyncLogicOp();
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SyncLogicOp();
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break;
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break;
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case PICA_REG_INDEX(texturing.main_config):
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shader_dirty = true;
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break;
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// Texture 0 type
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// Texture 0 type
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case PICA_REG_INDEX(texturing.texture0.type):
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case PICA_REG_INDEX(texturing.texture0.type):
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shader_dirty = true;
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shader_dirty = true;
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@ -40,7 +40,7 @@ PicaShaderConfig PicaShaderConfig::BuildFromRegs(const Pica::Regs& regs) {
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state.texture0_type = regs.texturing.texture0.type;
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state.texture0_type = regs.texturing.texture0.type;
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state.texture2_use_coord1 = regs.texturing.texture2_use_coord1 != 0;
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state.texture2_use_coord1 = regs.texturing.main_config.texture2_use_coord1 != 0;
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// Copy relevant tev stages fields.
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// Copy relevant tev stages fields.
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// We don't sync const_color here because of the high variance, it is a
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// We don't sync const_color here because of the high variance, it is a
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@ -276,7 +276,8 @@ static void ProcessTriangleInternal(const Vertex& v0, const Vertex& v1, const Ve
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DEBUG_ASSERT(0 != texture.config.address);
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DEBUG_ASSERT(0 != texture.config.address);
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int coordinate_i = (i == 2 && regs.texturing.texture2_use_coord1) ? 1 : i;
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int coordinate_i =
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(i == 2 && regs.texturing.main_config.texture2_use_coord1) ? 1 : i;
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float24 u = uv[coordinate_i].u();
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float24 u = uv[coordinate_i].u();
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float24 v = uv[coordinate_i].v();
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float24 v = uv[coordinate_i].v();
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