hipnosuer
/
Zuma
forked from ShuriZma/suyu
1
0
Fork 0
Code Pull Requests Activity
Zuma/src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp

511 lines
17 KiB
C++
Raw Normal View History

spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
// Copyright 2021 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
shader: Add denorm flush support
2021-02-20 06:30:13 +00:00
#include "shader_recompiler/frontend/ir/microinstruction.h"
#include "shader_recompiler/frontend/ir/modifiers.h"
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
#include "shader_recompiler/frontend/ir/program.h"
#include "shader_recompiler/shader_info.h"
namespace Shader::Optimization {
namespace {
shader: Add denorm flush support
2021-02-20 06:30:13 +00:00
void AddConstantBufferDescriptor(Info& info, u32 index, u32 count) {
if (count != 1) {
throw NotImplementedException("Constant buffer descriptor indexing");
}
if ((info.constant_buffer_mask & (1U << index)) != 0) {
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
return;
}
shader: Add denorm flush support
2021-02-20 06:30:13 +00:00
info.constant_buffer_mask |= 1U << index;
shader: Add partial rasterizer integration
2021-03-19 22:28:31 +00:00
auto& cbufs{info.constant_buffer_descriptors};
cbufs.insert(std::ranges::lower_bound(cbufs, index, {}, &ConstantBufferDescriptor::index),
ConstantBufferDescriptor{
.index{index},
.count{1},
});
}
void GetAttribute(Info& info, IR::Attribute attribute) {
if (IR::IsGeneric(attribute)) {
shader: Better interpolation and disabled attributes support
2021-03-27 07:59:58 +00:00
info.input_generics.at(IR::GenericAttributeIndex(attribute)).used = true;
shader: Add partial rasterizer integration
2021-03-19 22:28:31 +00:00
return;
}
switch (attribute) {
case IR::Attribute::PositionX:
case IR::Attribute::PositionY:
case IR::Attribute::PositionZ:
case IR::Attribute::PositionW:
info.loads_position = true;
break;
spirv: Implement VertexId and InstanceId, refactor code
2021-03-20 22:11:56 +00:00
case IR::Attribute::InstanceId:
info.loads_instance_id = true;
break;
case IR::Attribute::VertexId:
info.loads_vertex_id = true;
break;
shader: Implement front face
2021-03-27 05:55:37 +00:00
case IR::Attribute::FrontFace:
info.loads_front_face = true;
break;
shader: Add PointCoord attribute
2021-03-29 18:05:38 +00:00
case IR::Attribute::PointSpriteS:
case IR::Attribute::PointSpriteT:
info.loads_point_coord = true;
break;
shader: Add partial rasterizer integration
2021-03-19 22:28:31 +00:00
default:
throw NotImplementedException("Get attribute {}", attribute);
}
}
void SetAttribute(Info& info, IR::Attribute attribute) {
if (IR::IsGeneric(attribute)) {
info.stores_generics.at(IR::GenericAttributeIndex(attribute)) = true;
return;
}
switch (attribute) {
shader: Add PointSize attribute
2021-03-26 22:52:06 +00:00
case IR::Attribute::PointSize:
info.stores_point_size = true;
break;
shader: Add partial rasterizer integration
2021-03-19 22:28:31 +00:00
case IR::Attribute::PositionX:
case IR::Attribute::PositionY:
case IR::Attribute::PositionZ:
case IR::Attribute::PositionW:
info.stores_position = true;
break;
shader: Implement ClipDistance
2021-03-30 19:52:06 +00:00
case IR::Attribute::ClipDistance0:
case IR::Attribute::ClipDistance1:
case IR::Attribute::ClipDistance2:
case IR::Attribute::ClipDistance3:
case IR::Attribute::ClipDistance4:
case IR::Attribute::ClipDistance5:
case IR::Attribute::ClipDistance6:
case IR::Attribute::ClipDistance7:
info.stores_clip_distance = true;
break;
shader: Implement ViewportIndex
2021-04-01 06:34:45 +00:00
case IR::Attribute::ViewportIndex:
info.stores_viewport_index = true;
break;
shader: Add partial rasterizer integration
2021-03-19 22:28:31 +00:00
default:
throw NotImplementedException("Set attribute {}", attribute);
}
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
}
shader: Add denorm flush support
2021-02-20 06:30:13 +00:00
void VisitUsages(Info& info, IR::Inst& inst) {
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
switch (inst.Opcode()) {
spirv: Add lower fp16 to fp32 pass
2021-02-19 21:10:18 +00:00
case IR::Opcode::CompositeConstructF16x2:
case IR::Opcode::CompositeConstructF16x3:
case IR::Opcode::CompositeConstructF16x4:
case IR::Opcode::CompositeExtractF16x2:
case IR::Opcode::CompositeExtractF16x3:
case IR::Opcode::CompositeExtractF16x4:
shader: Add support for fp16 comparisons and misc fixes
2021-03-21 03:42:56 +00:00
case IR::Opcode::CompositeInsertF16x2:
case IR::Opcode::CompositeInsertF16x3:
case IR::Opcode::CompositeInsertF16x4:
shader: Partial implementation of LDC
2021-03-09 20:14:57 +00:00
case IR::Opcode::SelectF16:
spirv: Add lower fp16 to fp32 pass
2021-02-19 21:10:18 +00:00
case IR::Opcode::BitCastU16F16:
case IR::Opcode::BitCastF16U16:
case IR::Opcode::PackFloat2x16:
case IR::Opcode::UnpackFloat2x16:
case IR::Opcode::ConvertS16F16:
case IR::Opcode::ConvertS32F16:
case IR::Opcode::ConvertS64F16:
case IR::Opcode::ConvertU16F16:
case IR::Opcode::ConvertU32F16:
case IR::Opcode::ConvertU64F16:
shader: Implement I2F
2021-03-20 08:04:12 +00:00
case IR::Opcode::ConvertF16S8:
case IR::Opcode::ConvertF16S16:
case IR::Opcode::ConvertF16S32:
case IR::Opcode::ConvertF16S64:
case IR::Opcode::ConvertF16U8:
case IR::Opcode::ConvertF16U16:
case IR::Opcode::ConvertF16U32:
case IR::Opcode::ConvertF16U64:
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
case IR::Opcode::FPAbs16:
case IR::Opcode::FPAdd16:
case IR::Opcode::FPCeil16:
case IR::Opcode::FPFloor16:
case IR::Opcode::FPFma16:
case IR::Opcode::FPMul16:
case IR::Opcode::FPNeg16:
case IR::Opcode::FPRoundEven16:
case IR::Opcode::FPSaturate16:
shader: Fix F2I
2021-03-23 23:02:30 +00:00
case IR::Opcode::FPClamp16:
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
case IR::Opcode::FPTrunc16:
shader: Add support for fp16 comparisons and misc fixes
2021-03-21 03:42:56 +00:00
case IR::Opcode::FPOrdEqual16:
case IR::Opcode::FPUnordEqual16:
case IR::Opcode::FPOrdNotEqual16:
case IR::Opcode::FPUnordNotEqual16:
case IR::Opcode::FPOrdLessThan16:
case IR::Opcode::FPUnordLessThan16:
case IR::Opcode::FPOrdGreaterThan16:
case IR::Opcode::FPUnordGreaterThan16:
case IR::Opcode::FPOrdLessThanEqual16:
case IR::Opcode::FPUnordLessThanEqual16:
case IR::Opcode::FPOrdGreaterThanEqual16:
case IR::Opcode::FPUnordGreaterThanEqual16:
case IR::Opcode::FPIsNan16:
spirv: Add lower fp16 to fp32 pass
2021-02-19 21:10:18 +00:00
info.uses_fp16 = true;
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
break;
shader: Add missing fp64 usage flags
2021-03-21 20:27:44 +00:00
case IR::Opcode::CompositeConstructF64x2:
case IR::Opcode::CompositeConstructF64x3:
case IR::Opcode::CompositeConstructF64x4:
case IR::Opcode::CompositeExtractF64x2:
case IR::Opcode::CompositeExtractF64x3:
case IR::Opcode::CompositeExtractF64x4:
case IR::Opcode::CompositeInsertF64x2:
case IR::Opcode::CompositeInsertF64x3:
case IR::Opcode::CompositeInsertF64x4:
shader: Implement DMNMX, DSET, DSETP
2021-03-21 23:28:37 +00:00
case IR::Opcode::SelectF64:
shader: Add missing fp64 usage flags
2021-03-21 20:27:44 +00:00
case IR::Opcode::BitCastU64F64:
case IR::Opcode::BitCastF64U64:
case IR::Opcode::PackDouble2x32:
case IR::Opcode::UnpackDouble2x32:
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
case IR::Opcode::FPAbs64:
case IR::Opcode::FPAdd64:
case IR::Opcode::FPCeil64:
case IR::Opcode::FPFloor64:
case IR::Opcode::FPFma64:
case IR::Opcode::FPMax64:
case IR::Opcode::FPMin64:
case IR::Opcode::FPMul64:
case IR::Opcode::FPNeg64:
case IR::Opcode::FPRecip64:
case IR::Opcode::FPRecipSqrt64:
case IR::Opcode::FPRoundEven64:
case IR::Opcode::FPSaturate64:
shader: Fix F2I
2021-03-23 23:02:30 +00:00
case IR::Opcode::FPClamp64:
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
case IR::Opcode::FPTrunc64:
shader: Add missing fp64 usage flags
2021-03-21 20:27:44 +00:00
case IR::Opcode::FPOrdEqual64:
case IR::Opcode::FPUnordEqual64:
case IR::Opcode::FPOrdNotEqual64:
case IR::Opcode::FPUnordNotEqual64:
case IR::Opcode::FPOrdLessThan64:
case IR::Opcode::FPUnordLessThan64:
case IR::Opcode::FPOrdGreaterThan64:
case IR::Opcode::FPUnordGreaterThan64:
case IR::Opcode::FPOrdLessThanEqual64:
case IR::Opcode::FPUnordLessThanEqual64:
case IR::Opcode::FPOrdGreaterThanEqual64:
case IR::Opcode::FPUnordGreaterThanEqual64:
case IR::Opcode::FPIsNan64:
case IR::Opcode::ConvertS16F64:
case IR::Opcode::ConvertS32F64:
case IR::Opcode::ConvertS64F64:
case IR::Opcode::ConvertU16F64:
case IR::Opcode::ConvertU32F64:
case IR::Opcode::ConvertU64F64:
case IR::Opcode::ConvertF32F64:
case IR::Opcode::ConvertF64F32:
shader: Implement I2F
2021-03-20 08:04:12 +00:00
case IR::Opcode::ConvertF64S8:
case IR::Opcode::ConvertF64S16:
case IR::Opcode::ConvertF64S32:
case IR::Opcode::ConvertF64S64:
case IR::Opcode::ConvertF64U8:
case IR::Opcode::ConvertF64U16:
case IR::Opcode::ConvertF64U32:
case IR::Opcode::ConvertF64U64:
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
info.uses_fp64 = true;
break;
shader: Partial implementation of LDC
2021-03-09 20:14:57 +00:00
default:
break;
}
switch (inst.Opcode()) {
case IR::Opcode::GetCbufU8:
case IR::Opcode::GetCbufS8:
case IR::Opcode::UndefU8:
case IR::Opcode::LoadGlobalU8:
case IR::Opcode::LoadGlobalS8:
case IR::Opcode::WriteGlobalU8:
case IR::Opcode::WriteGlobalS8:
case IR::Opcode::LoadStorageU8:
case IR::Opcode::LoadStorageS8:
case IR::Opcode::WriteStorageU8:
case IR::Opcode::WriteStorageS8:
shader: Implement LDS, STS, LDL, and STS and use SPIR-V 1.4 when available
2021-03-28 22:53:34 +00:00
case IR::Opcode::LoadSharedU8:
case IR::Opcode::LoadSharedS8:
case IR::Opcode::WriteSharedU8:
shader: Partial implementation of LDC
2021-03-09 20:14:57 +00:00
case IR::Opcode::SelectU8:
shader: Implement I2F
2021-03-20 08:04:12 +00:00
case IR::Opcode::ConvertF16S8:
case IR::Opcode::ConvertF16U8:
case IR::Opcode::ConvertF32S8:
case IR::Opcode::ConvertF32U8:
case IR::Opcode::ConvertF64S8:
case IR::Opcode::ConvertF64U8:
shader: Partial implementation of LDC
2021-03-09 20:14:57 +00:00
info.uses_int8 = true;
break;
default:
break;
}
switch (inst.Opcode()) {
case IR::Opcode::GetCbufU16:
case IR::Opcode::GetCbufS16:
case IR::Opcode::UndefU16:
case IR::Opcode::LoadGlobalU16:
case IR::Opcode::LoadGlobalS16:
case IR::Opcode::WriteGlobalU16:
case IR::Opcode::WriteGlobalS16:
case IR::Opcode::LoadStorageU16:
case IR::Opcode::LoadStorageS16:
case IR::Opcode::WriteStorageU16:
case IR::Opcode::WriteStorageS16:
shader: Implement LDS, STS, LDL, and STS and use SPIR-V 1.4 when available
2021-03-28 22:53:34 +00:00
case IR::Opcode::LoadSharedU16:
case IR::Opcode::LoadSharedS16:
case IR::Opcode::WriteSharedU16:
shader: Partial implementation of LDC
2021-03-09 20:14:57 +00:00
case IR::Opcode::SelectU16:
case IR::Opcode::BitCastU16F16:
case IR::Opcode::BitCastF16U16:
case IR::Opcode::ConvertS16F16:
case IR::Opcode::ConvertS16F32:
case IR::Opcode::ConvertS16F64:
case IR::Opcode::ConvertU16F16:
case IR::Opcode::ConvertU16F32:
case IR::Opcode::ConvertU16F64:
shader: Implement I2F
2021-03-20 08:04:12 +00:00
case IR::Opcode::ConvertF16S16:
case IR::Opcode::ConvertF16U16:
case IR::Opcode::ConvertF32S16:
case IR::Opcode::ConvertF32U16:
case IR::Opcode::ConvertF64S16:
case IR::Opcode::ConvertF64U16:
shader: Partial implementation of LDC
2021-03-09 20:14:57 +00:00
info.uses_int16 = true;
break;
default:
break;
}
switch (inst.Opcode()) {
case IR::Opcode::GetCbufU64:
case IR::Opcode::UndefU64:
case IR::Opcode::LoadGlobalU8:
case IR::Opcode::LoadGlobalS8:
case IR::Opcode::LoadGlobalU16:
case IR::Opcode::LoadGlobalS16:
case IR::Opcode::LoadGlobal32:
case IR::Opcode::LoadGlobal64:
case IR::Opcode::LoadGlobal128:
case IR::Opcode::WriteGlobalU8:
case IR::Opcode::WriteGlobalS8:
case IR::Opcode::WriteGlobalU16:
case IR::Opcode::WriteGlobalS16:
case IR::Opcode::WriteGlobal32:
case IR::Opcode::WriteGlobal64:
case IR::Opcode::WriteGlobal128:
case IR::Opcode::SelectU64:
case IR::Opcode::BitCastU64F64:
case IR::Opcode::BitCastF64U64:
case IR::Opcode::PackUint2x32:
case IR::Opcode::UnpackUint2x32:
case IR::Opcode::IAdd64:
case IR::Opcode::ISub64:
case IR::Opcode::INeg64:
case IR::Opcode::ShiftLeftLogical64:
case IR::Opcode::ShiftRightLogical64:
case IR::Opcode::ShiftRightArithmetic64:
case IR::Opcode::ConvertS64F16:
case IR::Opcode::ConvertS64F32:
case IR::Opcode::ConvertS64F64:
case IR::Opcode::ConvertU64F16:
case IR::Opcode::ConvertU64F32:
case IR::Opcode::ConvertU64F64:
case IR::Opcode::ConvertU64U32:
case IR::Opcode::ConvertU32U64:
case IR::Opcode::ConvertF16U64:
case IR::Opcode::ConvertF32U64:
case IR::Opcode::ConvertF64U64:
info.uses_int64 = true;
break;
default:
break;
}
switch (inst.Opcode()) {
shader: Add partial rasterizer integration
2021-03-19 22:28:31 +00:00
case IR::Opcode::DemoteToHelperInvocation:
info.uses_demote_to_helper_invocation = true;
break;
case IR::Opcode::GetAttribute:
GetAttribute(info, inst.Arg(0).Attribute());
break;
case IR::Opcode::SetAttribute:
SetAttribute(info, inst.Arg(0).Attribute());
break;
case IR::Opcode::SetFragColor:
info.stores_frag_color[inst.Arg(0).U32()] = true;
break;
case IR::Opcode::SetFragDepth:
info.stores_frag_depth = true;
break;
shader: Partial implementation of LDC
2021-03-09 20:14:57 +00:00
case IR::Opcode::WorkgroupId:
info.uses_workgroup_id = true;
break;
case IR::Opcode::LocalInvocationId:
info.uses_local_invocation_id = true;
break;
shader: Implement SHFL
2021-03-25 15:31:37 +00:00
case IR::Opcode::ShuffleIndex:
case IR::Opcode::ShuffleUp:
case IR::Opcode::ShuffleDown:
case IR::Opcode::ShuffleButterfly:
shader: Implement SR_LaneId
2021-04-02 21:05:47 +00:00
case IR::Opcode::LaneId:
shader: Implement SHFL
2021-03-25 15:31:37 +00:00
info.uses_subgroup_invocation_id = true;
break;
shader: Partial implementation of LDC
2021-03-09 20:14:57 +00:00
case IR::Opcode::GetCbufU8:
case IR::Opcode::GetCbufS8:
case IR::Opcode::GetCbufU16:
case IR::Opcode::GetCbufS16:
case IR::Opcode::GetCbufU32:
case IR::Opcode::GetCbufF32:
case IR::Opcode::GetCbufU64: {
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
if (const IR::Value index{inst.Arg(0)}; index.IsImmediate()) {
shader: Add denorm flush support
2021-02-20 06:30:13 +00:00
AddConstantBufferDescriptor(info, index.U32(), 1);
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
} else {
throw NotImplementedException("Constant buffer with non-immediate index");
}
shader: Partial implementation of LDC
2021-03-09 20:14:57 +00:00
switch (inst.Opcode()) {
case IR::Opcode::GetCbufU8:
case IR::Opcode::GetCbufS8:
info.used_constant_buffer_types |= IR::Type::U8;
break;
case IR::Opcode::GetCbufU16:
case IR::Opcode::GetCbufS16:
info.used_constant_buffer_types |= IR::Type::U16;
break;
case IR::Opcode::GetCbufU32:
info.used_constant_buffer_types |= IR::Type::U32;
break;
case IR::Opcode::GetCbufF32:
info.used_constant_buffer_types |= IR::Type::F32;
break;
case IR::Opcode::GetCbufU64:
info.used_constant_buffer_types |= IR::Type::U64;
break;
default:
break;
}
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
break;
shader: Partial implementation of LDC
2021-03-09 20:14:57 +00:00
}
shader: Initial support for textures and TEX
2021-03-08 21:31:53 +00:00
case IR::Opcode::BindlessImageSampleImplicitLod:
case IR::Opcode::BindlessImageSampleExplicitLod:
case IR::Opcode::BindlessImageSampleDrefImplicitLod:
case IR::Opcode::BindlessImageSampleDrefExplicitLod:
shader: Implement TLD4 and TLD4_B
2021-03-24 22:41:55 +00:00
case IR::Opcode::BindlessImageGather:
case IR::Opcode::BindlessImageGatherDref:
shader: Implement ImageGradient
2021-03-29 00:00:43 +00:00
case IR::Opcode::BindlessImageFetch:
case IR::Opcode::BindlessImageQueryDimensions:
case IR::Opcode::BindlessImageQueryLod:
case IR::Opcode::BindlessImageGradient:
shader: Initial support for textures and TEX
2021-03-08 21:31:53 +00:00
case IR::Opcode::BoundImageSampleImplicitLod:
case IR::Opcode::BoundImageSampleExplicitLod:
case IR::Opcode::BoundImageSampleDrefImplicitLod:
case IR::Opcode::BoundImageSampleDrefExplicitLod:
shader: Implement TLD4 and TLD4_B
2021-03-24 22:41:55 +00:00
case IR::Opcode::BoundImageGather:
case IR::Opcode::BoundImageGatherDref:
shader: Implement ImageGradient
2021-03-29 00:00:43 +00:00
case IR::Opcode::BoundImageFetch:
case IR::Opcode::BoundImageQueryDimensions:
case IR::Opcode::BoundImageQueryLod:
case IR::Opcode::BoundImageGradient:
shader: Initial support for textures and TEX
2021-03-08 21:31:53 +00:00
case IR::Opcode::ImageSampleImplicitLod:
case IR::Opcode::ImageSampleExplicitLod:
case IR::Opcode::ImageSampleDrefImplicitLod:
shader: Implement TLD4 and TLD4_B
2021-03-24 22:41:55 +00:00
case IR::Opcode::ImageSampleDrefExplicitLod:
case IR::Opcode::ImageGather:
shader: Implement TXQ and fix FragDepth
2021-03-26 21:45:38 +00:00
case IR::Opcode::ImageGatherDref:
shader: Implement TLD
2021-03-26 19:51:05 +00:00
case IR::Opcode::ImageFetch:
shader,spirv: Implement ImageQueryLod.
2021-03-28 17:47:52 +00:00
case IR::Opcode::ImageQueryDimensions:
shader: Implement ImageGradient
2021-03-29 00:00:43 +00:00
case IR::Opcode::ImageQueryLod:
case IR::Opcode::ImageGradient: {
shader: Initial support for textures and TEX
2021-03-08 21:31:53 +00:00
const TextureType type{inst.Flags<IR::TextureInstInfo>().type};
info.uses_sampled_1d |= type == TextureType::Color1D || type == TextureType::ColorArray1D ||
type == TextureType::Shadow1D || type == TextureType::ShadowArray1D;
info.uses_sparse_residency |=
inst.GetAssociatedPseudoOperation(IR::Opcode::GetSparseFromOp) != nullptr;
break;
}
shader: Implement VOTE
2021-03-24 00:27:17 +00:00
case IR::Opcode::VoteAll:
case IR::Opcode::VoteAny:
case IR::Opcode::VoteEqual:
case IR::Opcode::SubgroupBallot:
info.uses_subgroup_vote = true;
break;
shader: Implement FSWZADD
2021-03-29 02:23:45 +00:00
case IR::Opcode::FSwizzleAdd:
info.uses_fswzadd = true;
break;
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
default:
break;
}
}
shader: Add denorm flush support
2021-02-20 06:30:13 +00:00
void VisitFpModifiers(Info& info, IR::Inst& inst) {
switch (inst.Opcode()) {
case IR::Opcode::FPAdd16:
case IR::Opcode::FPFma16:
case IR::Opcode::FPMul16:
case IR::Opcode::FPRoundEven16:
case IR::Opcode::FPFloor16:
case IR::Opcode::FPCeil16:
case IR::Opcode::FPTrunc16: {
const auto control{inst.Flags<IR::FpControl>()};
switch (control.fmz_mode) {
case IR::FmzMode::DontCare:
break;
case IR::FmzMode::FTZ:
case IR::FmzMode::FMZ:
info.uses_fp16_denorms_flush = true;
break;
case IR::FmzMode::None:
info.uses_fp16_denorms_preserve = true;
break;
}
break;
}
case IR::Opcode::FPAdd32:
case IR::Opcode::FPFma32:
case IR::Opcode::FPMul32:
case IR::Opcode::FPRoundEven32:
case IR::Opcode::FPFloor32:
case IR::Opcode::FPCeil32:
shader: Implement FCMP still need to configure some settings for NV denorm flush and intel NaN
2021-03-11 03:42:17 +00:00
case IR::Opcode::FPTrunc32:
case IR::Opcode::FPOrdEqual32:
case IR::Opcode::FPUnordEqual32:
case IR::Opcode::FPOrdNotEqual32:
case IR::Opcode::FPUnordNotEqual32:
case IR::Opcode::FPOrdLessThan32:
case IR::Opcode::FPUnordLessThan32:
case IR::Opcode::FPOrdGreaterThan32:
case IR::Opcode::FPUnordGreaterThan32:
case IR::Opcode::FPOrdLessThanEqual32:
case IR::Opcode::FPUnordLessThanEqual32:
case IR::Opcode::FPOrdGreaterThanEqual32:
shader: Implement F2F
2021-03-21 08:32:16 +00:00
case IR::Opcode::FPUnordGreaterThanEqual32:
case IR::Opcode::ConvertF16F32:
case IR::Opcode::ConvertF64F32: {
shader: Add denorm flush support
2021-02-20 06:30:13 +00:00
const auto control{inst.Flags<IR::FpControl>()};
switch (control.fmz_mode) {
case IR::FmzMode::DontCare:
break;
case IR::FmzMode::FTZ:
case IR::FmzMode::FMZ:
info.uses_fp32_denorms_flush = true;
break;
case IR::FmzMode::None:
info.uses_fp32_denorms_preserve = true;
break;
}
break;
}
default:
break;
}
}
void Visit(Info& info, IR::Inst& inst) {
VisitUsages(info, inst);
VisitFpModifiers(info, inst);
}
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
} // Anonymous namespace
void CollectShaderInfoPass(IR::Program& program) {
Info& info{program.info};
shader: Implement CAL inlining function calls
2021-03-14 06:41:05 +00:00
for (IR::Block* const block : program.post_order_blocks) {
for (IR::Inst& inst : block->Instructions()) {
Visit(info, inst);
spirv: Initial bindings support
2021-02-16 07:10:22 +00:00
}
}
}
} // namespace Shader::Optimization