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Peter Maydell 3d54026fb0 arm: Enforce should-be-1 bits in MRS decoding 
The MRS instruction requires that bits [19..16] are all 1s, and for
A/R profile also that bits [7..0] are all 0s.  At this point in the
decode tree we have checked all of the rest of the instruction but
were allowing these to be any value.  If these bits are not set then
the result is architecturally UNPREDICTABLE, but choosing to UNDEF is
more helpful to the user and avoids unexpected odd behaviour if the
encodings are used for some purpose in future architecture versions.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1487616072-9226-4-git-send-email-peter.maydell@linaro.org
 		2017-03-20 12:41:44 +00:00
..
Makefile.objs Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
arch_dump.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
arm-powerctl.c target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-powerctl.h target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-semi.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2017-02-07 18:29:59 +00:00
cpu-qom.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
cpu.c armv7m: Fix condition check for taking exceptions 2017-02-28 12:08:17 +00:00
cpu.h target/arm/arm-powerctl: Fix psci info return values 2017-03-14 11:28:54 +00:00
cpu64.c target-arm: Enable EL2 feature bit on A53 and A57 2017-01-20 11:15:10 +00:00
crypto_helper.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
gdbstub.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
gdbstub64.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
helper-a64.c target-arm: Use clrsb helper 2017-01-10 08:47:48 -08:00
helper-a64.h target-arm: Use clrsb helper 2017-01-10 08:47:48 -08:00
helper.c target/arm: implement armv8 PMUSERENR (user-mode enable bits) 2017-03-14 11:28:54 +00:00
helper.h target-arm: Use clz opcode 2017-01-10 08:06:11 -08:00
internals.h arm: Correctly handle watchpoints for BE32 CPUs 2017-02-07 18:29:59 +00:00
iwmmxt_helper.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
kvm-consts.h arm: add trailing ; after MISMATCH_CHECK 2017-02-01 03:37:18 +02:00
kvm-stub.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
kvm.c KVM: do not use sigtimedwait to catch SIGBUS 2017-03-03 16:40:02 +01:00
kvm32.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
kvm64.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
kvm_arm.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
machine.c target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
monitor.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
neon_helper.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
op_addsub.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
op_helper.c target-arm: don't generate WFE/YIELD calls for MTTCG 2017-02-24 10:32:46 +00:00
psci.c target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
trace-events Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
translate-a64.c Add missing fp_access_check() to aarch64 crypto instructions 2017-02-28 12:08:15 +00:00
translate.c arm: Enforce should-be-1 bits in MRS decoding 2017-03-20 12:41:44 +00:00
translate.h target/arm: A32, T32: Create Instruction Syndromes for Data Aborts 2017-02-07 18:30:00 +00:00