Edgar E. Iglesias 462c254430 target-microblaze: Rework NOP/zero instruction handling ... Remove the abort on a sequence of NOP/zero instructions. Always return early and avoid decoding NOP/zero instructions. This fixes Coverity CID 1391443. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>		2018-06-15 09:05:00 +02:00
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Makefile.objs	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
cpu-qom.h	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
cpu.c	target-microblaze: Allow address sizes between 32 and 64 bits	2018-05-29 09:35:14 +02:00
cpu.h	target-microblaze: Consolidate MMU enabled checks	2018-05-29 09:35:15 +02:00
gdbstub.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
helper.c	target-microblaze: Consolidate MMU enabled checks	2018-05-29 09:35:15 +02:00
helper.h	target-microblaze: Add support for extended access to TLBLO	2018-05-29 09:35:14 +02:00
microblaze-decode.h	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
mmu.c	target-microblaze: mmu: Correct masking of output addresses	2018-06-15 09:03:55 +02:00
mmu.h	target-microblaze: Add support for extended access to TLBLO	2018-05-29 09:35:14 +02:00
op_helper.c	target-microblaze: Convert env_btarget to i64	2018-05-29 09:35:14 +02:00
translate.c	target-microblaze: Rework NOP/zero instruction handling	2018-06-15 09:05:00 +02:00