mirror of https://github.com/xqemu/xqemu.git
hw/pvrdma: Remove max-sge command-line param
This parameter has no effect, fix it. The function init_dev_caps sets the front-end's max-sge to MAX_SGE. Then it checks backend's max-sge and adjust it accordingly (we can't send more than what the device supports). On send and recv we need to make sure the num_sge in the WQE does not exceeds the backend device capability. This check is done in pvrdma level so check on rdma level is deleted. Signed-off-by: Yuval Shaia <yuval.shaia@oracle.com> Message-Id: <20190109194123.3468-1-yuval.shaia@oracle.com> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> Signed-off-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
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5a301bb9f1
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@ -156,7 +156,6 @@ Ethernet function can be used for other Ethernet purposes such as IP.
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specify the port to use. If not set 1 will be used.
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specify the port to use. If not set 1 will be used.
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- dev-caps-max-mr-size: The maximum size of MR.
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- dev-caps-max-mr-size: The maximum size of MR.
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- dev-caps-max-qp: Maximum number of QPs.
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- dev-caps-max-qp: Maximum number of QPs.
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- dev-caps-max-sge: Maximum number of SGE elements in WR.
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- dev-caps-max-cq: Maximum number of CQs.
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- dev-caps-max-cq: Maximum number of CQs.
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- dev-caps-max-mr: Maximum number of MRs.
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- dev-caps-max-mr: Maximum number of MRs.
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- dev-caps-max-pd: Maximum number of PDs.
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- dev-caps-max-pd: Maximum number of PDs.
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@ -32,17 +32,6 @@
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#include "rdma_rm.h"
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#include "rdma_rm.h"
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#include "rdma_backend.h"
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#include "rdma_backend.h"
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/* Vendor Errors */
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#define VENDOR_ERR_FAIL_BACKEND 0x201
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#define VENDOR_ERR_TOO_MANY_SGES 0x202
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#define VENDOR_ERR_NOMEM 0x203
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#define VENDOR_ERR_QP0 0x204
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#define VENDOR_ERR_INV_NUM_SGE 0x205
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#define VENDOR_ERR_MAD_SEND 0x206
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#define VENDOR_ERR_INVLKEY 0x207
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#define VENDOR_ERR_MR_SMALL 0x208
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#define VENDOR_ERR_INV_MAD_BUFF 0x209
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#define THR_NAME_LEN 16
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#define THR_NAME_LEN 16
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#define THR_POLL_TO 5000
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#define THR_POLL_TO 5000
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@ -475,11 +464,6 @@ void rdma_backend_post_send(RdmaBackendDev *backend_dev,
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}
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}
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pr_dbg("num_sge=%d\n", num_sge);
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pr_dbg("num_sge=%d\n", num_sge);
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if (!num_sge || num_sge > MAX_SGE) {
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pr_dbg("invalid num_sge=%d\n", num_sge);
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complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_INV_NUM_SGE, ctx);
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return;
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}
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bctx = g_malloc0(sizeof(*bctx));
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bctx = g_malloc0(sizeof(*bctx));
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bctx->up_ctx = ctx;
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bctx->up_ctx = ctx;
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@ -602,11 +586,6 @@ void rdma_backend_post_recv(RdmaBackendDev *backend_dev,
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}
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}
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pr_dbg("num_sge=%d\n", num_sge);
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pr_dbg("num_sge=%d\n", num_sge);
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if (!num_sge || num_sge > MAX_SGE) {
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pr_dbg("invalid num_sge=%d\n", num_sge);
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complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_INV_NUM_SGE, ctx);
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return;
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}
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bctx = g_malloc0(sizeof(*bctx));
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bctx = g_malloc0(sizeof(*bctx));
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bctx->up_ctx = ctx;
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bctx->up_ctx = ctx;
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@ -942,6 +921,8 @@ static int init_device_caps(RdmaBackendDev *backend_dev,
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return -EIO;
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return -EIO;
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}
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}
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dev_attr->max_sge = MAX_SGE;
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CHK_ATTR(dev_attr, backend_dev->dev_attr, max_mr_size, "%" PRId64);
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CHK_ATTR(dev_attr, backend_dev->dev_attr, max_mr_size, "%" PRId64);
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CHK_ATTR(dev_attr, backend_dev->dev_attr, max_qp, "%d");
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CHK_ATTR(dev_attr, backend_dev->dev_attr, max_qp, "%d");
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CHK_ATTR(dev_attr, backend_dev->dev_attr, max_sge, "%d");
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CHK_ATTR(dev_attr, backend_dev->dev_attr, max_sge, "%d");
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@ -22,6 +22,17 @@
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#include "rdma_rm_defs.h"
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#include "rdma_rm_defs.h"
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#include "rdma_backend_defs.h"
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#include "rdma_backend_defs.h"
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/* Vendor Errors */
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#define VENDOR_ERR_FAIL_BACKEND 0x201
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#define VENDOR_ERR_TOO_MANY_SGES 0x202
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#define VENDOR_ERR_NOMEM 0x203
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#define VENDOR_ERR_QP0 0x204
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#define VENDOR_ERR_INV_NUM_SGE 0x205
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#define VENDOR_ERR_MAD_SEND 0x206
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#define VENDOR_ERR_INVLKEY 0x207
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#define VENDOR_ERR_MR_SMALL 0x208
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#define VENDOR_ERR_INV_MAD_BUFF 0x209
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/* Add definition for QP0 and QP1 as there is no userspace enums for them */
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/* Add definition for QP0 and QP1 as there is no userspace enums for them */
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enum ibv_special_qp_type {
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enum ibv_special_qp_type {
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IBV_QPT_SMI = 0,
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IBV_QPT_SMI = 0,
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@ -43,7 +43,6 @@ static Property pvrdma_dev_properties[] = {
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DEFINE_PROP_UINT64("dev-caps-max-mr-size", PVRDMADev, dev_attr.max_mr_size,
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DEFINE_PROP_UINT64("dev-caps-max-mr-size", PVRDMADev, dev_attr.max_mr_size,
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MAX_MR_SIZE),
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MAX_MR_SIZE),
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DEFINE_PROP_INT32("dev-caps-max-qp", PVRDMADev, dev_attr.max_qp, MAX_QP),
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DEFINE_PROP_INT32("dev-caps-max-qp", PVRDMADev, dev_attr.max_qp, MAX_QP),
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DEFINE_PROP_INT32("dev-caps-max-sge", PVRDMADev, dev_attr.max_sge, MAX_SGE),
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DEFINE_PROP_INT32("dev-caps-max-cq", PVRDMADev, dev_attr.max_cq, MAX_CQ),
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DEFINE_PROP_INT32("dev-caps-max-cq", PVRDMADev, dev_attr.max_cq, MAX_CQ),
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DEFINE_PROP_INT32("dev-caps-max-mr", PVRDMADev, dev_attr.max_mr, MAX_MR),
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DEFINE_PROP_INT32("dev-caps-max-mr", PVRDMADev, dev_attr.max_mr, MAX_MR),
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DEFINE_PROP_INT32("dev-caps-max-pd", PVRDMADev, dev_attr.max_pd, MAX_PD),
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DEFINE_PROP_INT32("dev-caps-max-pd", PVRDMADev, dev_attr.max_pd, MAX_PD),
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@ -549,8 +548,9 @@ static void init_dev_caps(PVRDMADev *dev)
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sizeof(struct pvrdma_rq_wqe_hdr));
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sizeof(struct pvrdma_rq_wqe_hdr));
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dev->dev_attr.max_qp_wr = pg_tbl_bytes /
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dev->dev_attr.max_qp_wr = pg_tbl_bytes /
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(wr_sz + sizeof(struct pvrdma_sge) * MAX_SGE) -
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(wr_sz + sizeof(struct pvrdma_sge) *
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TARGET_PAGE_SIZE; /* First page is ring state */
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dev->dev_attr.max_sge) - TARGET_PAGE_SIZE;
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/* First page is ring state ^^^^ */
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pr_dbg("max_qp_wr=%d\n", dev->dev_attr.max_qp_wr);
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pr_dbg("max_qp_wr=%d\n", dev->dev_attr.max_qp_wr);
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dev->dev_attr.max_cqe = pg_tbl_bytes / sizeof(struct pvrdma_cqe) -
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dev->dev_attr.max_cqe = pg_tbl_bytes / sizeof(struct pvrdma_cqe) -
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@ -626,8 +626,6 @@ static void pvrdma_realize(PCIDevice *pdev, Error **errp)
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init_regs(pdev);
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init_regs(pdev);
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init_dev_caps(dev);
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rc = init_msix(pdev, errp);
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rc = init_msix(pdev, errp);
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if (rc) {
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if (rc) {
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goto out;
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goto out;
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@ -640,6 +638,8 @@ static void pvrdma_realize(PCIDevice *pdev, Error **errp)
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goto out;
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goto out;
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}
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}
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init_dev_caps(dev);
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rc = rdma_rm_init(&dev->rdma_dev_res, &dev->dev_attr, errp);
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rc = rdma_rm_init(&dev->rdma_dev_res, &dev->dev_attr, errp);
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if (rc) {
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if (rc) {
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goto out;
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goto out;
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@ -121,6 +121,16 @@ static void pvrdma_qp_ops_comp_handler(void *ctx, struct ibv_wc *wc)
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g_free(ctx);
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g_free(ctx);
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}
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}
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static void complete_with_error(uint32_t vendor_err, void *ctx)
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{
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struct ibv_wc wc = {0};
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wc.status = IBV_WC_GENERAL_ERR;
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wc.vendor_err = vendor_err;
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pvrdma_qp_ops_comp_handler(ctx, &wc);
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}
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void pvrdma_qp_ops_fini(void)
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void pvrdma_qp_ops_fini(void)
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{
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{
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rdma_backend_unregister_comp_handler();
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rdma_backend_unregister_comp_handler();
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@ -182,6 +192,13 @@ int pvrdma_qp_send(PVRDMADev *dev, uint32_t qp_handle)
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return -EIO;
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return -EIO;
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}
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}
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if (wqe->hdr.num_sge > dev->dev_attr.max_sge) {
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pr_dbg("Invalid num_sge=%d (max %d)\n", wqe->hdr.num_sge,
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dev->dev_attr.max_sge);
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complete_with_error(VENDOR_ERR_INV_NUM_SGE, comp_ctx);
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continue;
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}
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rdma_backend_post_send(&dev->backend_dev, &qp->backend_qp, qp->qp_type,
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rdma_backend_post_send(&dev->backend_dev, &qp->backend_qp, qp->qp_type,
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(struct ibv_sge *)&wqe->sge[0], wqe->hdr.num_sge,
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(struct ibv_sge *)&wqe->sge[0], wqe->hdr.num_sge,
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sgid_idx, sgid,
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sgid_idx, sgid,
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@ -227,6 +244,13 @@ int pvrdma_qp_recv(PVRDMADev *dev, uint32_t qp_handle)
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comp_ctx->cqe.qp = qp_handle;
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comp_ctx->cqe.qp = qp_handle;
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comp_ctx->cqe.opcode = IBV_WC_RECV;
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comp_ctx->cqe.opcode = IBV_WC_RECV;
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if (wqe->hdr.num_sge > dev->dev_attr.max_sge) {
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pr_dbg("Invalid num_sge=%d (max %d)\n", wqe->hdr.num_sge,
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dev->dev_attr.max_sge);
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complete_with_error(VENDOR_ERR_INV_NUM_SGE, comp_ctx);
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continue;
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}
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rdma_backend_post_recv(&dev->backend_dev, &dev->rdma_dev_res,
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rdma_backend_post_recv(&dev->backend_dev, &dev->rdma_dev_res,
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&qp->backend_qp, qp->qp_type,
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&qp->backend_qp, qp->qp_type,
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(struct ibv_sge *)&wqe->sge[0], wqe->hdr.num_sge,
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(struct ibv_sge *)&wqe->sge[0], wqe->hdr.num_sge,
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