cris hw/: Don't use CPUState

Scripted conversion:
  for file in hw/cris-boot.[hc] hw/cris_pic_cpu.c hw/axis_dev88.c hw/etraxfs.h hw/etraxfs_ser.c; do
    sed -i "s/CPUState/CPUCRISState/g" $file
  done

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Andreas Färber 2012-03-14 01:38:23 +01:00
parent 5ae9330682
commit fc9bb17697
6 changed files with 9 additions and 9 deletions

View File

@ -247,7 +247,7 @@ void axisdev88_init (ram_addr_t ram_size,
const char *kernel_filename, const char *kernel_cmdline, const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model) const char *initrd_filename, const char *cpu_model)
{ {
CPUState *env; CPUCRISState *env;
DeviceState *dev; DeviceState *dev;
SysBusDevice *s; SysBusDevice *s;
DriveInfo *nand; DriveInfo *nand;

View File

@ -29,7 +29,7 @@
static void main_cpu_reset(void *opaque) static void main_cpu_reset(void *opaque)
{ {
CPUState *env = opaque; CPUCRISState *env = opaque;
struct cris_load_info *li; struct cris_load_info *li;
li = env->load_info; li = env->load_info;
@ -60,7 +60,7 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
return addr - 0x80000000LL; return addr - 0x80000000LL;
} }
void cris_load_image(CPUState *env, struct cris_load_info *li) void cris_load_image(CPUCRISState *env, struct cris_load_info *li)
{ {
uint64_t entry, high; uint64_t entry, high;
int kcmdline_len; int kcmdline_len;

View File

@ -8,4 +8,4 @@ struct cris_load_info
target_phys_addr_t entry; target_phys_addr_t entry;
}; };
void cris_load_image(CPUState *env, struct cris_load_info *li); void cris_load_image(CPUCRISState *env, struct cris_load_info *li);

View File

@ -30,7 +30,7 @@
static void cris_pic_cpu_handler(void *opaque, int irq, int level) static void cris_pic_cpu_handler(void *opaque, int irq, int level)
{ {
CPUState *env = (CPUState *)opaque; CPUCRISState *env = (CPUCRISState *)opaque;
int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD; int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;
if (level) if (level)
@ -39,7 +39,7 @@ static void cris_pic_cpu_handler(void *opaque, int irq, int level)
cpu_reset_interrupt(env, type); cpu_reset_interrupt(env, type);
} }
qemu_irq *cris_pic_init_cpu(CPUState *env) qemu_irq *cris_pic_init_cpu(CPUCRISState *env)
{ {
return qemu_allocate_irqs(cris_pic_cpu_handler, env, 2); return qemu_allocate_irqs(cris_pic_cpu_handler, env, 2);
} }

View File

@ -25,7 +25,7 @@
#include "net.h" #include "net.h"
#include "etraxfs_dma.h" #include "etraxfs_dma.h"
qemu_irq *cris_pic_init_cpu(CPUState *env); qemu_irq *cris_pic_init_cpu(CPUCRISState *env);
/* Instantiate an ETRAXFS Ethernet MAC. */ /* Instantiate an ETRAXFS Ethernet MAC. */
static inline DeviceState * static inline DeviceState *

View File

@ -78,7 +78,7 @@ static uint64_t
ser_read(void *opaque, target_phys_addr_t addr, unsigned int size) ser_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{ {
struct etrax_serial *s = opaque; struct etrax_serial *s = opaque;
D(CPUState *env = s->env); D(CPUCRISState *env = s->env);
uint32_t r = 0; uint32_t r = 0;
addr >>= 2; addr >>= 2;
@ -116,7 +116,7 @@ ser_write(void *opaque, target_phys_addr_t addr,
struct etrax_serial *s = opaque; struct etrax_serial *s = opaque;
uint32_t value = val64; uint32_t value = val64;
unsigned char ch = val64; unsigned char ch = val64;
D(CPUState *env = s->env); D(CPUCRISState *env = s->env);
D(qemu_log("%s " TARGET_FMT_plx "=%x\n", __func__, addr, value)); D(qemu_log("%s " TARGET_FMT_plx "=%x\n", __func__, addr, value));
addr >>= 2; addr >>= 2;