mirror of https://github.com/xqemu/xqemu.git
hw/arm/armsse: Add unimplemented-device stubs for MHUs
The SSE-200 has two Message Handling Units (MHUs), which sit behind the APB PPC0. Wire up some unimplemented-device stubs for these, since we don't yet implement a real model of this device. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190121185118.18550-16-peter.maydell@linaro.org
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@ -30,6 +30,7 @@ struct ARMSSEInfo {
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int num_cpus;
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int num_cpus;
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uint32_t sys_version;
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uint32_t sys_version;
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SysConfigFormat sys_config_format;
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SysConfigFormat sys_config_format;
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bool has_mhus;
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};
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};
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static const ARMSSEInfo armsse_variants[] = {
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static const ARMSSEInfo armsse_variants[] = {
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@ -39,6 +40,7 @@ static const ARMSSEInfo armsse_variants[] = {
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.num_cpus = 1,
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.num_cpus = 1,
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.sys_version = 0x41743,
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.sys_version = 0x41743,
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.sys_config_format = IoTKitFormat,
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.sys_config_format = IoTKitFormat,
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.has_mhus = false,
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},
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},
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};
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};
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@ -257,6 +259,12 @@ static void armsse_init(Object *obj)
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sizeof(s->sysctl), TYPE_IOTKIT_SYSCTL);
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sizeof(s->sysctl), TYPE_IOTKIT_SYSCTL);
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sysbus_init_child_obj(obj, "armsse-sysinfo", &s->sysinfo,
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sysbus_init_child_obj(obj, "armsse-sysinfo", &s->sysinfo,
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sizeof(s->sysinfo), TYPE_IOTKIT_SYSINFO);
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sizeof(s->sysinfo), TYPE_IOTKIT_SYSINFO);
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if (info->has_mhus) {
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sysbus_init_child_obj(obj, "mhu0", &s->mhu[0], sizeof(s->mhu[0]),
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TYPE_UNIMPLEMENTED_DEVICE);
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sysbus_init_child_obj(obj, "mhu1", &s->mhu[1], sizeof(s->mhu[1]),
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TYPE_UNIMPLEMENTED_DEVICE);
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}
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object_initialize_child(obj, "nmi-orgate", &s->nmi_orgate,
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object_initialize_child(obj, "nmi-orgate", &s->nmi_orgate,
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sizeof(s->nmi_orgate), TYPE_OR_IRQ,
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sizeof(s->nmi_orgate), TYPE_OR_IRQ,
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&error_abort, NULL);
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&error_abort, NULL);
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@ -616,6 +624,8 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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* 0x40000000: timer0
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* 0x40000000: timer0
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* 0x40001000: timer1
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* 0x40001000: timer1
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* 0x40002000: dual timer
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* 0x40002000: dual timer
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* 0x40003000: MHU0 (SSE-200 only)
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* 0x40004000: MHU1 (SSE-200 only)
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* We must configure and realize each downstream device and connect
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* We must configure and realize each downstream device and connect
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* it to the appropriate PPC port; then we can realize the PPC and
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* it to the appropriate PPC port; then we can realize the PPC and
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* map its upstream ends to the right place in the container.
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* map its upstream ends to the right place in the container.
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@ -666,6 +676,31 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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return;
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return;
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}
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}
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if (info->has_mhus) {
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for (i = 0; i < ARRAY_SIZE(s->mhu); i++) {
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char *name = g_strdup_printf("MHU%d", i);
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char *port = g_strdup_printf("port[%d]", i + 3);
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qdev_prop_set_string(DEVICE(&s->mhu[i]), "name", name);
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qdev_prop_set_uint64(DEVICE(&s->mhu[i]), "size", 0x1000);
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object_property_set_bool(OBJECT(&s->mhu[i]), true,
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"realized", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mhu[i]), 0);
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object_property_set_link(OBJECT(&s->apb_ppc0), OBJECT(mr),
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port, &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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g_free(name);
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g_free(port);
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}
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}
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object_property_set_bool(OBJECT(&s->apb_ppc0), true, "realized", &err);
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object_property_set_bool(OBJECT(&s->apb_ppc0), true, "realized", &err);
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if (err) {
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if (err) {
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error_propagate(errp, err);
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error_propagate(errp, err);
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@ -681,6 +716,12 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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memory_region_add_subregion(&s->container, 0x40001000, mr);
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memory_region_add_subregion(&s->container, 0x40001000, mr);
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mr = sysbus_mmio_get_region(sbd_apb_ppc0, 2);
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mr = sysbus_mmio_get_region(sbd_apb_ppc0, 2);
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memory_region_add_subregion(&s->container, 0x40002000, mr);
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memory_region_add_subregion(&s->container, 0x40002000, mr);
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if (info->has_mhus) {
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mr = sysbus_mmio_get_region(sbd_apb_ppc0, 3);
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memory_region_add_subregion(&s->container, 0x40003000, mr);
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mr = sysbus_mmio_get_region(sbd_apb_ppc0, 4);
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memory_region_add_subregion(&s->container, 0x40004000, mr);
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}
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for (i = 0; i < IOTS_APB_PPC0_NUM_PORTS; i++) {
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for (i = 0; i < IOTS_APB_PPC0_NUM_PORTS; i++) {
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qdev_connect_gpio_out_named(dev_secctl, "apb_ppc0_nonsec", i,
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qdev_connect_gpio_out_named(dev_secctl, "apb_ppc0_nonsec", i,
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qdev_get_gpio_in_named(dev_apb_ppc0,
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qdev_get_gpio_in_named(dev_apb_ppc0,
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@ -78,6 +78,7 @@
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#include "hw/watchdog/cmsdk-apb-watchdog.h"
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#include "hw/watchdog/cmsdk-apb-watchdog.h"
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#include "hw/misc/iotkit-sysctl.h"
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#include "hw/misc/iotkit-sysctl.h"
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#include "hw/misc/iotkit-sysinfo.h"
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#include "hw/misc/iotkit-sysinfo.h"
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#include "hw/misc/unimp.h"
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#include "hw/or-irq.h"
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#include "hw/or-irq.h"
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#include "hw/core/split-irq.h"
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#include "hw/core/split-irq.h"
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#include "hw/cpu/cluster.h"
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#include "hw/cpu/cluster.h"
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@ -137,6 +138,8 @@ typedef struct ARMSSE {
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IoTKitSysCtl sysctl;
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IoTKitSysCtl sysctl;
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IoTKitSysCtl sysinfo;
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IoTKitSysCtl sysinfo;
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UnimplementedDeviceState mhu[2];
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/*
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/*
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* 'container' holds all devices seen by all CPUs.
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* 'container' holds all devices seen by all CPUs.
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* 'cpu_container[i]' is the view that CPU i has: this has the
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* 'cpu_container[i]' is the view that CPU i has: this has the
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