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cirrus_vga: rename cirrus_hook_read_gr() cirrus_vga_read_gr() 

Simplify the logic to do everything inside the function.

Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Juan Quintela 2009-08-31 16:07:29 +02:00 committed by Anthony Liguori
parent 86948bb104
commit f705db9df0
1 changed files with 38 additions and 45 deletions
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83
hw/cirrus_vga.c
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@ -1458,38 +1458,33 @@ static void cirrus_vga_write_palette(CirrusVGAState * s, int reg_value)
* *
***************************************/ ***************************************/
static int static int cirrus_vga_read_gr(CirrusVGAState * s, unsigned reg_index)
cirrus_hook_read_gr(CirrusVGAState * s, unsigned reg_index, int *reg_value)
{ {
switch (reg_index) { switch (reg_index) {
case 0x00: // Standard VGA, BGCOLOR 0x000000ff case 0x00: // Standard VGA, BGCOLOR 0x000000ff
*reg_value = s->cirrus_shadow_gr0; return s->cirrus_shadow_gr0;
return CIRRUS_HOOK_HANDLED;
case 0x01: // Standard VGA, FGCOLOR 0x000000ff case 0x01: // Standard VGA, FGCOLOR 0x000000ff
*reg_value = s->cirrus_shadow_gr1; return s->cirrus_shadow_gr1;
return CIRRUS_HOOK_HANDLED;
case 0x02: // Standard VGA case 0x02: // Standard VGA
case 0x03: // Standard VGA case 0x03: // Standard VGA
case 0x04: // Standard VGA case 0x04: // Standard VGA
case 0x06: // Standard VGA case 0x06: // Standard VGA
case 0x07: // Standard VGA case 0x07: // Standard VGA
case 0x08: // Standard VGA case 0x08: // Standard VGA
return CIRRUS_HOOK_NOT_HANDLED; return s->vga.gr[s->vga.gr_index];
case 0x05: // Standard VGA, Cirrus extended mode case 0x05: // Standard VGA, Cirrus extended mode
default: default:
break; break;
} }
if (reg_index < 0x3a) { if (reg_index < 0x3a) {
*reg_value = s->vga.gr[reg_index]; return s->vga.gr[reg_index];
} else { } else {
#ifdef DEBUG_CIRRUS #ifdef DEBUG_CIRRUS
printf("cirrus: inport gr_index %02x\n", reg_index); printf("cirrus: inport gr_index %02x\n", reg_index);
#endif #endif
*reg_value = 0xff; return 0xff;
} }
return CIRRUS_HOOK_HANDLED;
} }
static int static int
@ -1716,97 +1711,97 @@ static uint8_t cirrus_mmio_blt_read(CirrusVGAState * s, unsigned address)
switch (address) { switch (address) {
case (CIRRUS_MMIO_BLTBGCOLOR + 0): case (CIRRUS_MMIO_BLTBGCOLOR + 0):
cirrus_hook_read_gr(s, 0x00, &value); value = cirrus_vga_read_gr(s, 0x00);
break; break;
case (CIRRUS_MMIO_BLTBGCOLOR + 1): case (CIRRUS_MMIO_BLTBGCOLOR + 1):
cirrus_hook_read_gr(s, 0x10, &value); value = cirrus_vga_read_gr(s, 0x10);
break; break;
case (CIRRUS_MMIO_BLTBGCOLOR + 2): case (CIRRUS_MMIO_BLTBGCOLOR + 2):
cirrus_hook_read_gr(s, 0x12, &value); value = cirrus_vga_read_gr(s, 0x12);
break; break;
case (CIRRUS_MMIO_BLTBGCOLOR + 3): case (CIRRUS_MMIO_BLTBGCOLOR + 3):
cirrus_hook_read_gr(s, 0x14, &value); value = cirrus_vga_read_gr(s, 0x14);
break; break;
case (CIRRUS_MMIO_BLTFGCOLOR + 0): case (CIRRUS_MMIO_BLTFGCOLOR + 0):
cirrus_hook_read_gr(s, 0x01, &value); value = cirrus_vga_read_gr(s, 0x01);
break; break;
case (CIRRUS_MMIO_BLTFGCOLOR + 1): case (CIRRUS_MMIO_BLTFGCOLOR + 1):
cirrus_hook_read_gr(s, 0x11, &value); value = cirrus_vga_read_gr(s, 0x11);
break; break;
case (CIRRUS_MMIO_BLTFGCOLOR + 2): case (CIRRUS_MMIO_BLTFGCOLOR + 2):
cirrus_hook_read_gr(s, 0x13, &value); value = cirrus_vga_read_gr(s, 0x13);
break; break;
case (CIRRUS_MMIO_BLTFGCOLOR + 3): case (CIRRUS_MMIO_BLTFGCOLOR + 3):
cirrus_hook_read_gr(s, 0x15, &value); value = cirrus_vga_read_gr(s, 0x15);
break; break;
case (CIRRUS_MMIO_BLTWIDTH + 0): case (CIRRUS_MMIO_BLTWIDTH + 0):
cirrus_hook_read_gr(s, 0x20, &value); value = cirrus_vga_read_gr(s, 0x20);
break; break;
case (CIRRUS_MMIO_BLTWIDTH + 1): case (CIRRUS_MMIO_BLTWIDTH + 1):
cirrus_hook_read_gr(s, 0x21, &value); value = cirrus_vga_read_gr(s, 0x21);
break; break;
case (CIRRUS_MMIO_BLTHEIGHT + 0): case (CIRRUS_MMIO_BLTHEIGHT + 0):
cirrus_hook_read_gr(s, 0x22, &value); value = cirrus_vga_read_gr(s, 0x22);
break; break;
case (CIRRUS_MMIO_BLTHEIGHT + 1): case (CIRRUS_MMIO_BLTHEIGHT + 1):
cirrus_hook_read_gr(s, 0x23, &value); value = cirrus_vga_read_gr(s, 0x23);
break; break;
case (CIRRUS_MMIO_BLTDESTPITCH + 0): case (CIRRUS_MMIO_BLTDESTPITCH + 0):
cirrus_hook_read_gr(s, 0x24, &value); value = cirrus_vga_read_gr(s, 0x24);
break; break;
case (CIRRUS_MMIO_BLTDESTPITCH + 1): case (CIRRUS_MMIO_BLTDESTPITCH + 1):
cirrus_hook_read_gr(s, 0x25, &value); value = cirrus_vga_read_gr(s, 0x25);
break; break;
case (CIRRUS_MMIO_BLTSRCPITCH + 0): case (CIRRUS_MMIO_BLTSRCPITCH + 0):
cirrus_hook_read_gr(s, 0x26, &value); value = cirrus_vga_read_gr(s, 0x26);
break; break;
case (CIRRUS_MMIO_BLTSRCPITCH + 1): case (CIRRUS_MMIO_BLTSRCPITCH + 1):
cirrus_hook_read_gr(s, 0x27, &value); value = cirrus_vga_read_gr(s, 0x27);
break; break;
case (CIRRUS_MMIO_BLTDESTADDR + 0): case (CIRRUS_MMIO_BLTDESTADDR + 0):
cirrus_hook_read_gr(s, 0x28, &value); value = cirrus_vga_read_gr(s, 0x28);
break; break;
case (CIRRUS_MMIO_BLTDESTADDR + 1): case (CIRRUS_MMIO_BLTDESTADDR + 1):
cirrus_hook_read_gr(s, 0x29, &value); value = cirrus_vga_read_gr(s, 0x29);
break; break;
case (CIRRUS_MMIO_BLTDESTADDR + 2): case (CIRRUS_MMIO_BLTDESTADDR + 2):
cirrus_hook_read_gr(s, 0x2a, &value); value = cirrus_vga_read_gr(s, 0x2a);
break; break;
case (CIRRUS_MMIO_BLTSRCADDR + 0): case (CIRRUS_MMIO_BLTSRCADDR + 0):
cirrus_hook_read_gr(s, 0x2c, &value); value = cirrus_vga_read_gr(s, 0x2c);
break; break;
case (CIRRUS_MMIO_BLTSRCADDR + 1): case (CIRRUS_MMIO_BLTSRCADDR + 1):
cirrus_hook_read_gr(s, 0x2d, &value); value = cirrus_vga_read_gr(s, 0x2d);
break; break;
case (CIRRUS_MMIO_BLTSRCADDR + 2): case (CIRRUS_MMIO_BLTSRCADDR + 2):
cirrus_hook_read_gr(s, 0x2e, &value); value = cirrus_vga_read_gr(s, 0x2e);
break; break;
case CIRRUS_MMIO_BLTWRITEMASK: case CIRRUS_MMIO_BLTWRITEMASK:
cirrus_hook_read_gr(s, 0x2f, &value); value = cirrus_vga_read_gr(s, 0x2f);
break; break;
case CIRRUS_MMIO_BLTMODE: case CIRRUS_MMIO_BLTMODE:
cirrus_hook_read_gr(s, 0x30, &value); value = cirrus_vga_read_gr(s, 0x30);
break; break;
case CIRRUS_MMIO_BLTROP: case CIRRUS_MMIO_BLTROP:
cirrus_hook_read_gr(s, 0x32, &value); value = cirrus_vga_read_gr(s, 0x32);
break; break;
case CIRRUS_MMIO_BLTMODEEXT: case CIRRUS_MMIO_BLTMODEEXT:
cirrus_hook_read_gr(s, 0x33, &value); value = cirrus_vga_read_gr(s, 0x33);
break; break;
case (CIRRUS_MMIO_BLTTRANSPARENTCOLOR + 0): case (CIRRUS_MMIO_BLTTRANSPARENTCOLOR + 0):
cirrus_hook_read_gr(s, 0x34, &value); value = cirrus_vga_read_gr(s, 0x34);
break; break;
case (CIRRUS_MMIO_BLTTRANSPARENTCOLOR + 1): case (CIRRUS_MMIO_BLTTRANSPARENTCOLOR + 1):
cirrus_hook_read_gr(s, 0x35, &value); value = cirrus_vga_read_gr(s, 0x35);
break; break;
case (CIRRUS_MMIO_BLTTRANSPARENTCOLORMASK + 0): case (CIRRUS_MMIO_BLTTRANSPARENTCOLORMASK + 0):
cirrus_hook_read_gr(s, 0x38, &value); value = cirrus_vga_read_gr(s, 0x38);
break; break;
case (CIRRUS_MMIO_BLTTRANSPARENTCOLORMASK + 1): case (CIRRUS_MMIO_BLTTRANSPARENTCOLORMASK + 1):
cirrus_hook_read_gr(s, 0x39, &value); value = cirrus_vga_read_gr(s, 0x39);
break; break;
case CIRRUS_MMIO_BLTSTATUS: case CIRRUS_MMIO_BLTSTATUS:
cirrus_hook_read_gr(s, 0x31, &value); value = cirrus_vga_read_gr(s, 0x31);
break; break;
default: default:
#ifdef DEBUG_CIRRUS #ifdef DEBUG_CIRRUS
@ -2714,9 +2709,7 @@ static uint32_t cirrus_vga_ioport_read(void *opaque, uint32_t addr)
val = s->gr_index; val = s->gr_index;
break; break;
case 0x3cf: case 0x3cf:
if (cirrus_hook_read_gr(c, s->gr_index, &val)) val = cirrus_vga_read_gr(c, s->gr_index);
break;
val = s->gr[s->gr_index];
#ifdef DEBUG_VGA_REG #ifdef DEBUG_VGA_REG
printf("vga: read GR%x = 0x%02x\n", s->gr_index, val); printf("vga: read GR%x = 0x%02x\n", s->gr_index, val);
#endif #endif