mirror of https://github.com/xqemu/xqemu.git
target-i386: introduce gen_cmovcc1
Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -2414,6 +2414,40 @@ static inline void gen_jcc(DisasContext *s, int b,
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}
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}
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static void gen_cmovcc1(CPUX86State *env, DisasContext *s, int ot, int b,
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int modrm, int reg)
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{
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int l1, mod = (modrm >> 6) & 3;
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TCGv t0 = tcg_temp_local_new();
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if (mod != 3) {
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int reg_addr, offset_addr;
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gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr);
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gen_op_ld_v(ot + s->mem_index, t0, cpu_A0);
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} else {
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int rm = (modrm & 7) | REX_B(s);
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gen_op_mov_v_reg(ot, t0, rm);
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}
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l1 = gen_new_label();
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gen_jcc1(s, b ^ 1, l1);
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switch (ot) {
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#ifdef TARGET_X86_64
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case OT_LONG:
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tcg_gen_mov_tl(cpu_regs[reg], t0);
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gen_set_label(l1);
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tcg_gen_ext32u_tl(cpu_regs[reg], cpu_regs[reg]);
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break;
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#endif
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default:
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gen_op_mov_reg_v(ot, reg, t0);
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gen_set_label(l1);
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break;
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}
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tcg_temp_free(t0);
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}
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static inline void gen_op_movl_T0_seg(int seg_reg)
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{
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tcg_gen_ld32u_tl(cpu_T[0], cpu_env,
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@ -6427,40 +6461,10 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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gen_ldst_modrm(env, s, modrm, OT_BYTE, OR_TMP0, 1);
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break;
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case 0x140 ... 0x14f: /* cmov Gv, Ev */
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{
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int l1;
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TCGv t0;
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ot = dflag + OT_WORD;
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modrm = cpu_ldub_code(env, s->pc++);
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reg = ((modrm >> 3) & 7) | rex_r;
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mod = (modrm >> 6) & 3;
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t0 = tcg_temp_local_new();
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if (mod != 3) {
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gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr);
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gen_op_ld_v(ot + s->mem_index, t0, cpu_A0);
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} else {
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rm = (modrm & 7) | REX_B(s);
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gen_op_mov_v_reg(ot, t0, rm);
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}
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#ifdef TARGET_X86_64
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if (ot == OT_LONG) {
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/* XXX: specific Intel behaviour ? */
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l1 = gen_new_label();
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gen_jcc1(s, b ^ 1, l1);
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tcg_gen_mov_tl(cpu_regs[reg], t0);
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gen_set_label(l1);
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tcg_gen_ext32u_tl(cpu_regs[reg], cpu_regs[reg]);
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} else
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#endif
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{
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l1 = gen_new_label();
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gen_jcc1(s, b ^ 1, l1);
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gen_op_mov_reg_v(ot, reg, t0);
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gen_set_label(l1);
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}
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tcg_temp_free(t0);
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}
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ot = dflag + OT_WORD;
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modrm = cpu_ldub_code(env, s->pc++);
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reg = ((modrm >> 3) & 7) | rex_r;
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gen_cmovcc1(env, s, ot, b, modrm, reg);
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break;
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/************************/
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