mirror of https://github.com/xqemu/xqemu.git
isa-bus: Remove bogus IRQ sharing check
Nothing prevented IRQ sharing on the ISA bus in principle. Not all boards supported this, neither each and every card nor driver and OS. Still, there existed valid IRQ sharing scenarios, (at least) two of them can also be found in QEMU: >2 PC UARTs and the PREP IDE buses. So remove this artificial restriction from our ISA model. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -713,7 +713,6 @@ static int hpet_init(SysBusDevice *dev)
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s->capability |= (s->num_timers - 1) << HPET_ID_NUM_TIM_SHIFT;
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s->capability |= ((HPET_CLK_PERIOD) << 32);
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isa_reserve_irq(RTC_ISA_IRQ);
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qdev_init_gpio_in(&dev->qdev, hpet_handle_rtc_irq, 1);
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/* HPET Area */
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@ -514,7 +514,7 @@ static int pit_initfn(ISADevice *dev)
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s = &pit->channels[0];
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/* the timer 0 is connected to an IRQ */
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s->irq_timer = qemu_new_timer(vm_clock, pit_irq_timer, s);
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s->irq = isa_reserve_irq(pit->irq);
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s->irq = isa_get_irq(pit->irq);
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register_ioport_write(pit->iobase, 4, 1, pit_ioport_write, pit);
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register_ioport_read(pit->iobase, 3, 1, pit_ioport_read, pit);
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@ -122,7 +122,7 @@ static void pci_piix_init_ports(PCIIDEState *d) {
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for (i = 0; i < 2; i++) {
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ide_bus_new(&d->bus[i], &d->dev.qdev, i);
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ide_init_ioport(&d->bus[i], port_info[i].iobase, port_info[i].iobase2);
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ide_init2(&d->bus[i], isa_reserve_irq(port_info[i].isairq));
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ide_init2(&d->bus[i], isa_get_irq(port_info[i].isairq));
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bmdma_init(&d->bus[i], &d->bmdma[i]);
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d->bmdma[i].bus = &d->bus[i];
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@ -145,7 +145,7 @@ static void vt82c686b_init_ports(PCIIDEState *d) {
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for (i = 0; i < 2; i++) {
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ide_bus_new(&d->bus[i], &d->dev.qdev, i);
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ide_init_ioport(&d->bus[i], port_info[i].iobase, port_info[i].iobase2);
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ide_init2(&d->bus[i], isa_reserve_irq(port_info[i].isairq));
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ide_init2(&d->bus[i], isa_get_irq(port_info[i].isairq));
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bmdma_init(&d->bus[i], &d->bmdma[i]);
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d->bmdma[i].bus = &d->bus[i];
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16
hw/isa-bus.c
16
hw/isa-bus.c
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@ -25,7 +25,6 @@
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struct ISABus {
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BusState qbus;
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qemu_irq *irqs;
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uint32_t assigned;
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};
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static ISABus *isabus;
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target_phys_addr_t isa_mem_base = 0;
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@ -61,33 +60,24 @@ void isa_bus_irqs(qemu_irq *irqs)
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}
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/*
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* isa_reserve_irq() reserves the ISA irq and returns the corresponding
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* qemu_irq entry for the i8259.
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* isa_get_irq() returns the corresponding qemu_irq entry for the i8259.
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*
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* This function is only for special cases such as the 'ferr', and
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* temporary use for normal devices until they are converted to qdev.
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*/
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qemu_irq isa_reserve_irq(int isairq)
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qemu_irq isa_get_irq(int isairq)
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{
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if (isairq < 0 || isairq > 15) {
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hw_error("isa irq %d invalid", isairq);
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}
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if (isabus->assigned & (1 << isairq)) {
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hw_error("isa irq %d already assigned", isairq);
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}
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isabus->assigned |= (1 << isairq);
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return isabus->irqs[isairq];
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}
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void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq)
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{
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assert(dev->nirqs < ARRAY_SIZE(dev->isairq));
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if (isabus->assigned & (1 << isairq)) {
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hw_error("isa irq %d already assigned", isairq);
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}
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isabus->assigned |= (1 << isairq);
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dev->isairq[dev->nirqs] = isairq;
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*p = isabus->irqs[isairq];
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*p = isa_get_irq(isairq);
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dev->nirqs++;
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}
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2
hw/isa.h
2
hw/isa.h
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@ -26,7 +26,7 @@ struct ISADeviceInfo {
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ISABus *isa_bus_new(DeviceState *dev);
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void isa_bus_irqs(qemu_irq *irqs);
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qemu_irq isa_reserve_irq(int isairq);
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qemu_irq isa_get_irq(int isairq);
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void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq);
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void isa_init_ioport(ISADevice *dev, uint16_t ioport);
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void isa_init_ioport_range(ISADevice *dev, uint16_t start, uint16_t length);
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@ -919,7 +919,7 @@ void mips_malta_init (ram_addr_t ram_size,
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isa_bus_irqs(i8259);
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pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1);
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usb_uhci_piix4_init(pci_bus, piix4_devfn + 2);
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smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_reserve_irq(9),
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smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_get_irq(9),
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NULL, NULL, 0);
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eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
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for (i = 0; i < 8; i++) {
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@ -113,7 +113,7 @@ static void pc_init1(ram_addr_t ram_size,
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}
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isa_bus_irqs(isa_irq);
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pc_register_ferr_irq(isa_reserve_irq(13));
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pc_register_ferr_irq(isa_get_irq(13));
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pc_vga_init(pci_enabled? pci_bus: NULL);
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@ -169,7 +169,7 @@ static void pc_init1(ram_addr_t ram_size,
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smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
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/* TODO: Populate SPD eeprom data. */
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smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
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isa_reserve_irq(9), *cmos_s3, *smi_irq,
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isa_get_irq(9), *cmos_s3, *smi_irq,
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kvm_enabled());
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for (i = 0; i < 8; i++) {
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DeviceState *eeprom;
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