mirror of https://github.com/xqemu/xqemu.git
Merge branch 'prep-up' of git://repo.or.cz/qemu/afaerber
* 'prep-up' of git://repo.or.cz/qemu/afaerber: prep: Move int-ack register from PReP to Raven PCI emulation prep: Initialize PC speaker isa: Add isa_bus_from_device() method fdc: Parametrize ISA base, IRQ and DMA i82378/i82374: Do not create DMA controller twice
This commit is contained in:
commit
ee6610785e
17
hw/fdc.c
17
hw/fdc.c
|
@ -438,6 +438,9 @@ typedef struct FDCtrlSysBus {
|
||||||
|
|
||||||
typedef struct FDCtrlISABus {
|
typedef struct FDCtrlISABus {
|
||||||
ISADevice busdev;
|
ISADevice busdev;
|
||||||
|
uint32_t iobase;
|
||||||
|
uint32_t irq;
|
||||||
|
uint32_t dma;
|
||||||
struct FDCtrl state;
|
struct FDCtrl state;
|
||||||
int32_t bootindexA;
|
int32_t bootindexA;
|
||||||
int32_t bootindexB;
|
int32_t bootindexB;
|
||||||
|
@ -1971,17 +1974,14 @@ static int isabus_fdc_init1(ISADevice *dev)
|
||||||
{
|
{
|
||||||
FDCtrlISABus *isa = DO_UPCAST(FDCtrlISABus, busdev, dev);
|
FDCtrlISABus *isa = DO_UPCAST(FDCtrlISABus, busdev, dev);
|
||||||
FDCtrl *fdctrl = &isa->state;
|
FDCtrl *fdctrl = &isa->state;
|
||||||
int iobase = 0x3f0;
|
|
||||||
int isairq = 6;
|
|
||||||
int dma_chann = 2;
|
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
isa_register_portio_list(dev, iobase, fdc_portio_list, fdctrl, "fdc");
|
isa_register_portio_list(dev, isa->iobase, fdc_portio_list, fdctrl, "fdc");
|
||||||
|
|
||||||
isa_init_irq(&isa->busdev, &fdctrl->irq, isairq);
|
isa_init_irq(&isa->busdev, &fdctrl->irq, isa->irq);
|
||||||
fdctrl->dma_chann = dma_chann;
|
fdctrl->dma_chann = isa->dma;
|
||||||
|
|
||||||
qdev_set_legacy_instance_id(&dev->qdev, iobase, 2);
|
qdev_set_legacy_instance_id(&dev->qdev, isa->iobase, 2);
|
||||||
ret = fdctrl_init_common(fdctrl);
|
ret = fdctrl_init_common(fdctrl);
|
||||||
|
|
||||||
add_boot_device_path(isa->bootindexA, &dev->qdev, "/floppy@0");
|
add_boot_device_path(isa->bootindexA, &dev->qdev, "/floppy@0");
|
||||||
|
@ -2046,6 +2046,9 @@ static const VMStateDescription vmstate_isa_fdc ={
|
||||||
};
|
};
|
||||||
|
|
||||||
static Property isa_fdc_properties[] = {
|
static Property isa_fdc_properties[] = {
|
||||||
|
DEFINE_PROP_HEX32("iobase", FDCtrlISABus, iobase, 0x3f0),
|
||||||
|
DEFINE_PROP_UINT32("irq", FDCtrlISABus, irq, 6),
|
||||||
|
DEFINE_PROP_UINT32("dma", FDCtrlISABus, dma, 2),
|
||||||
DEFINE_PROP_DRIVE("driveA", FDCtrlISABus, state.drives[0].bs),
|
DEFINE_PROP_DRIVE("driveA", FDCtrlISABus, state.drives[0].bs),
|
||||||
DEFINE_PROP_DRIVE("driveB", FDCtrlISABus, state.drives[1].bs),
|
DEFINE_PROP_DRIVE("driveB", FDCtrlISABus, state.drives[1].bs),
|
||||||
DEFINE_PROP_INT32("bootindexA", FDCtrlISABus, bootindexA, -1),
|
DEFINE_PROP_INT32("bootindexA", FDCtrlISABus, bootindexA, -1),
|
||||||
|
|
|
@ -38,6 +38,7 @@ do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0)
|
||||||
|
|
||||||
typedef struct I82374State {
|
typedef struct I82374State {
|
||||||
uint8_t commands[8];
|
uint8_t commands[8];
|
||||||
|
qemu_irq out;
|
||||||
} I82374State;
|
} I82374State;
|
||||||
|
|
||||||
static const VMStateDescription vmstate_i82374 = {
|
static const VMStateDescription vmstate_i82374 = {
|
||||||
|
@ -99,7 +100,7 @@ static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)
|
||||||
|
|
||||||
static void i82374_init(I82374State *s)
|
static void i82374_init(I82374State *s)
|
||||||
{
|
{
|
||||||
DMA_init(1, NULL);
|
DMA_init(1, &s->out);
|
||||||
memset(s->commands, 0, sizeof(s->commands));
|
memset(s->commands, 0, sizeof(s->commands));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -132,6 +133,8 @@ static int i82374_isa_init(ISADevice *dev)
|
||||||
|
|
||||||
i82374_init(s);
|
i82374_init(s);
|
||||||
|
|
||||||
|
qdev_init_gpio_out(&dev->qdev, &s->out, 1);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -170,6 +170,7 @@ static void i82378_init(DeviceState *dev, I82378State *s)
|
||||||
{
|
{
|
||||||
ISABus *isabus = DO_UPCAST(ISABus, qbus, qdev_get_child_bus(dev, "isa.0"));
|
ISABus *isabus = DO_UPCAST(ISABus, qbus, qdev_get_child_bus(dev, "isa.0"));
|
||||||
ISADevice *pit;
|
ISADevice *pit;
|
||||||
|
ISADevice *isa;
|
||||||
qemu_irq *out0_irq;
|
qemu_irq *out0_irq;
|
||||||
|
|
||||||
/* This device has:
|
/* This device has:
|
||||||
|
@ -199,8 +200,8 @@ static void i82378_init(DeviceState *dev, I82378State *s)
|
||||||
pcspk_init(isabus, pit);
|
pcspk_init(isabus, pit);
|
||||||
|
|
||||||
/* 2 82C37 (dma) */
|
/* 2 82C37 (dma) */
|
||||||
DMA_init(1, &s->out[1]);
|
isa = isa_create_simple(isabus, "i82374");
|
||||||
isa_create_simple(isabus, "i82374");
|
qdev_connect_gpio_out(&isa->qdev, 0, s->out[1]);
|
||||||
|
|
||||||
/* timer */
|
/* timer */
|
||||||
isa_create_simple(isabus, "mc146818rtc");
|
isa_create_simple(isabus, "mc146818rtc");
|
||||||
|
|
5
hw/isa.h
5
hw/isa.h
|
@ -76,6 +76,11 @@ void isa_register_portio_list(ISADevice *dev, uint16_t start,
|
||||||
const MemoryRegionPortio *portio,
|
const MemoryRegionPortio *portio,
|
||||||
void *opaque, const char *name);
|
void *opaque, const char *name);
|
||||||
|
|
||||||
|
static inline ISABus *isa_bus_from_device(ISADevice *d)
|
||||||
|
{
|
||||||
|
return DO_UPCAST(ISABus, qbus, d->qdev.parent_bus);
|
||||||
|
}
|
||||||
|
|
||||||
extern target_phys_addr_t isa_mem_base;
|
extern target_phys_addr_t isa_mem_base;
|
||||||
|
|
||||||
void isa_mmio_setup(MemoryRegion *mr, target_phys_addr_t size);
|
void isa_mmio_setup(MemoryRegion *mr, target_phys_addr_t size);
|
||||||
|
|
|
@ -37,6 +37,7 @@
|
||||||
#include "loader.h"
|
#include "loader.h"
|
||||||
#include "mc146818rtc.h"
|
#include "mc146818rtc.h"
|
||||||
#include "blockdev.h"
|
#include "blockdev.h"
|
||||||
|
#include "arch_init.h"
|
||||||
#include "exec-memory.h"
|
#include "exec-memory.h"
|
||||||
|
|
||||||
//#define HARD_DEBUG_PPC_IO
|
//#define HARD_DEBUG_PPC_IO
|
||||||
|
@ -85,38 +86,6 @@ static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
|
||||||
/* ISA IO ports bridge */
|
/* ISA IO ports bridge */
|
||||||
#define PPC_IO_BASE 0x80000000
|
#define PPC_IO_BASE 0x80000000
|
||||||
|
|
||||||
/* PCI intack register */
|
|
||||||
/* Read-only register (?) */
|
|
||||||
static void PPC_intack_write (void *opaque, target_phys_addr_t addr,
|
|
||||||
uint64_t value, unsigned size)
|
|
||||||
{
|
|
||||||
#if 0
|
|
||||||
printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx64 "\n", __func__, addr,
|
|
||||||
value);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
static uint64_t PPC_intack_read(void *opaque, target_phys_addr_t addr,
|
|
||||||
unsigned size)
|
|
||||||
{
|
|
||||||
uint32_t retval = 0;
|
|
||||||
|
|
||||||
if ((addr & 0xf) == 0)
|
|
||||||
retval = pic_read_irq(isa_pic);
|
|
||||||
#if 0
|
|
||||||
printf("%s: 0x" TARGET_FMT_plx " <= %08" PRIx32 "\n", __func__, addr,
|
|
||||||
retval);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
return retval;
|
|
||||||
}
|
|
||||||
|
|
||||||
static const MemoryRegionOps PPC_intack_ops = {
|
|
||||||
.read = PPC_intack_read,
|
|
||||||
.write = PPC_intack_write,
|
|
||||||
.endianness = DEVICE_LITTLE_ENDIAN,
|
|
||||||
};
|
|
||||||
|
|
||||||
/* PowerPC control and status registers */
|
/* PowerPC control and status registers */
|
||||||
#if 0 // Not used
|
#if 0 // Not used
|
||||||
static struct {
|
static struct {
|
||||||
|
@ -491,7 +460,6 @@ static void ppc_prep_init (ram_addr_t ram_size,
|
||||||
nvram_t nvram;
|
nvram_t nvram;
|
||||||
M48t59State *m48t59;
|
M48t59State *m48t59;
|
||||||
MemoryRegion *PPC_io_memory = g_new(MemoryRegion, 1);
|
MemoryRegion *PPC_io_memory = g_new(MemoryRegion, 1);
|
||||||
MemoryRegion *intack = g_new(MemoryRegion, 1);
|
|
||||||
#if 0
|
#if 0
|
||||||
MemoryRegion *xcsr = g_new(MemoryRegion, 1);
|
MemoryRegion *xcsr = g_new(MemoryRegion, 1);
|
||||||
#endif
|
#endif
|
||||||
|
@ -684,9 +652,6 @@ static void ppc_prep_init (ram_addr_t ram_size,
|
||||||
register_ioport_write(0x0092, 0x01, 1, &PREP_io_800_writeb, sysctrl);
|
register_ioport_write(0x0092, 0x01, 1, &PREP_io_800_writeb, sysctrl);
|
||||||
register_ioport_read(0x0800, 0x52, 1, &PREP_io_800_readb, sysctrl);
|
register_ioport_read(0x0800, 0x52, 1, &PREP_io_800_readb, sysctrl);
|
||||||
register_ioport_write(0x0800, 0x52, 1, &PREP_io_800_writeb, sysctrl);
|
register_ioport_write(0x0800, 0x52, 1, &PREP_io_800_writeb, sysctrl);
|
||||||
/* PCI intack location */
|
|
||||||
memory_region_init_io(intack, &PPC_intack_ops, NULL, "ppc-intack", 4);
|
|
||||||
memory_region_add_subregion(sysmem, 0xBFFFFFF0, intack);
|
|
||||||
/* PowerPC control and status register group */
|
/* PowerPC control and status register group */
|
||||||
#if 0
|
#if 0
|
||||||
memory_region_init_io(xcsr, &PPC_XCSR_ops, NULL, "ppc-xcsr", 0x1000);
|
memory_region_init_io(xcsr, &PPC_XCSR_ops, NULL, "ppc-xcsr", 0x1000);
|
||||||
|
@ -716,6 +681,9 @@ static void ppc_prep_init (ram_addr_t ram_size,
|
||||||
|
|
||||||
/* Special port to get debug messages from Open-Firmware */
|
/* Special port to get debug messages from Open-Firmware */
|
||||||
register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
|
register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
|
||||||
|
|
||||||
|
/* Initialize audio subsystem */
|
||||||
|
audio_init(isa_bus, pci_bus);
|
||||||
}
|
}
|
||||||
|
|
||||||
static QEMUMachine prep_machine = {
|
static QEMUMachine prep_machine = {
|
||||||
|
|
|
@ -25,10 +25,12 @@
|
||||||
#include "hw.h"
|
#include "hw.h"
|
||||||
#include "pci.h"
|
#include "pci.h"
|
||||||
#include "pci_host.h"
|
#include "pci_host.h"
|
||||||
|
#include "pc.h"
|
||||||
#include "exec-memory.h"
|
#include "exec-memory.h"
|
||||||
|
|
||||||
typedef struct PRePPCIState {
|
typedef struct PRePPCIState {
|
||||||
PCIHostState host_state;
|
PCIHostState host_state;
|
||||||
|
MemoryRegion intack;
|
||||||
qemu_irq irq[4];
|
qemu_irq irq[4];
|
||||||
} PREPPCIState;
|
} PREPPCIState;
|
||||||
|
|
||||||
|
@ -67,6 +69,19 @@ static const MemoryRegionOps PPC_PCIIO_ops = {
|
||||||
.endianness = DEVICE_LITTLE_ENDIAN,
|
.endianness = DEVICE_LITTLE_ENDIAN,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static uint64_t ppc_intack_read(void *opaque, target_phys_addr_t addr,
|
||||||
|
unsigned int size)
|
||||||
|
{
|
||||||
|
return pic_read_irq(isa_pic);
|
||||||
|
}
|
||||||
|
|
||||||
|
static const MemoryRegionOps PPC_intack_ops = {
|
||||||
|
.read = ppc_intack_read,
|
||||||
|
.valid = {
|
||||||
|
.max_access_size = 1,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
static int prep_map_irq(PCIDevice *pci_dev, int irq_num)
|
static int prep_map_irq(PCIDevice *pci_dev, int irq_num)
|
||||||
{
|
{
|
||||||
return (irq_num + (pci_dev->devfn >> 3)) & 1;
|
return (irq_num + (pci_dev->devfn >> 3)) & 1;
|
||||||
|
@ -110,6 +125,8 @@ static int raven_pcihost_init(SysBusDevice *dev)
|
||||||
memory_region_init_io(&h->mmcfg, &PPC_PCIIO_ops, s, "pciio", 0x00400000);
|
memory_region_init_io(&h->mmcfg, &PPC_PCIIO_ops, s, "pciio", 0x00400000);
|
||||||
memory_region_add_subregion(address_space_mem, 0x80800000, &h->mmcfg);
|
memory_region_add_subregion(address_space_mem, 0x80800000, &h->mmcfg);
|
||||||
|
|
||||||
|
memory_region_init_io(&s->intack, &PPC_intack_ops, s, "pci-intack", 1);
|
||||||
|
memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->intack);
|
||||||
pci_create_simple(bus, 0, "raven");
|
pci_create_simple(bus, 0, "raven");
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
Loading…
Reference in New Issue