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apb: Move IOMMU registers into a separate IOMMUState struct 

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This commit is contained in:
Mark Cave-Ayland 2014-05-28 08:28:21 +01:00
parent 01b91ac2be
commit ea9a6606b1
1 changed files with 14 additions and 3 deletions
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17
hw/pci-host/apb.c
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@ -70,6 +70,10 @@ do { printf("APB: " fmt , ## __VA_ARGS__); } while (0)
#define MAX_IVEC 0x40 #define MAX_IVEC 0x40
#define NO_IRQ_REQUEST (MAX_IVEC + 1) #define NO_IRQ_REQUEST (MAX_IVEC + 1)
typedef struct IOMMUState {
uint32_t regs[4];
} IOMMUState;
#define TYPE_APB "pbm" #define TYPE_APB "pbm"
#define APB_DEVICE(obj) \ #define APB_DEVICE(obj) \
@ -83,7 +87,7 @@ typedef struct APBState {
MemoryRegion pci_mmio; MemoryRegion pci_mmio;
MemoryRegion pci_ioport; MemoryRegion pci_ioport;
uint64_t pci_irq_in; uint64_t pci_irq_in;
uint32_t iommu[4]; IOMMUState iommu;
uint32_t pci_control[16]; uint32_t pci_control[16];
uint32_t pci_irq_map[8]; uint32_t pci_irq_map[8];
uint32_t obio_irq_map[32]; uint32_t obio_irq_map[32];
@ -145,6 +149,7 @@ static void apb_config_writel (void *opaque, hwaddr addr,
uint64_t val, unsigned size) uint64_t val, unsigned size)
{ {
APBState *s = opaque; APBState *s = opaque;
IOMMUState *is = &s->iommu;
APB_DPRINTF("%s: addr " TARGET_FMT_plx " val %" PRIx64 "\n", __func__, addr, val); APB_DPRINTF("%s: addr " TARGET_FMT_plx " val %" PRIx64 "\n", __func__, addr, val);
@ -153,7 +158,7 @@ static void apb_config_writel (void *opaque, hwaddr addr,
/* XXX: not implemented yet */ /* XXX: not implemented yet */
break; break;
case 0x200 ... 0x20b: /* IOMMU */ case 0x200 ... 0x20b: /* IOMMU */
s->iommu[(addr & 0xf) >> 2] = val; is->regs[(addr & 0xf) >> 2] = val;
break; break;
case 0x20c ... 0x3ff: /* IOMMU flush */ case 0x20c ... 0x3ff: /* IOMMU flush */
break; break;
@ -228,6 +233,7 @@ static uint64_t apb_config_readl (void *opaque,
hwaddr addr, unsigned size) hwaddr addr, unsigned size)
{ {
APBState *s = opaque; APBState *s = opaque;
IOMMUState *is = &s->iommu;
uint32_t val; uint32_t val;
switch (addr & 0xffff) { switch (addr & 0xffff) {
@ -236,7 +242,7 @@ static uint64_t apb_config_readl (void *opaque,
/* XXX: not implemented yet */ /* XXX: not implemented yet */
break; break;
case 0x200 ... 0x20b: /* IOMMU */ case 0x200 ... 0x20b: /* IOMMU */
val = s->iommu[(addr & 0xf) >> 2]; val = is->regs[(addr & 0xf) >> 2];
break; break;
case 0x20c ... 0x3ff: /* IOMMU flush */ case 0x20c ... 0x3ff: /* IOMMU flush */
val = 0; val = 0;
@ -390,6 +396,7 @@ PCIBus *pci_apb_init(hwaddr special_base,
SysBusDevice *s; SysBusDevice *s;
PCIHostState *phb; PCIHostState *phb;
APBState *d; APBState *d;
IOMMUState *is;
PCIDevice *pci_dev; PCIDevice *pci_dev;
PCIBridge *br; PCIBridge *br;
@ -420,6 +427,10 @@ PCIBus *pci_apb_init(hwaddr special_base,
pci_create_simple(phb->bus, 0, "pbm-pci"); pci_create_simple(phb->bus, 0, "pbm-pci");
/* APB IOMMU */
is = &d->iommu;
memset(is, 0, sizeof(IOMMUState));
/* APB secondary busses */ /* APB secondary busses */
pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 0), true, pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 0), true,
"pbm-bridge"); "pbm-bridge");