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target/mips: Move MXU_EN check one level higher 

Move MXU_EN check to the main MXU decoding function, to avoid code
repetition.

Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
This commit is contained in:
Aleksandar Markovic 2018-10-24 13:06:36 +02:00
parent 4ca837218c
commit e5bf8a0829
1 changed files with 238 additions and 271 deletions
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57
target/mips/translate.c
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@ -24095,23 +24095,16 @@ static void gen_mxu_s32m2i(DisasContext *ctx)
static void gen_mxu_s8ldd(DisasContext *ctx) static void gen_mxu_s8ldd(DisasContext *ctx)
{ {
TCGv t0, t1; TCGv t0, t1;
TCGLabel *l0;
uint32_t XRa, Rb, s8, optn3; uint32_t XRa, Rb, s8, optn3;
t0 = tcg_temp_new(); t0 = tcg_temp_new();
t1 = tcg_temp_new(); t1 = tcg_temp_new();
l0 = gen_new_label();
XRa = extract32(ctx->opcode, 6, 4); XRa = extract32(ctx->opcode, 6, 4);
s8 = extract32(ctx->opcode, 10, 8); s8 = extract32(ctx->opcode, 10, 8);
optn3 = extract32(ctx->opcode, 18, 3); optn3 = extract32(ctx->opcode, 18, 3);
Rb = extract32(ctx->opcode, 21, 5); Rb = extract32(ctx->opcode, 21, 5);
gen_load_mxu_cr(t0);
tcg_gen_andi_tl(t0, t0, MXU_CR_MXU_EN);
tcg_gen_brcondi_tl(TCG_COND_NE, t0, MXU_CR_MXU_EN, l0);
gen_load_gpr(t0, Rb); gen_load_gpr(t0, Rb);
tcg_gen_addi_tl(t0, t0, (int8_t)s8); tcg_gen_addi_tl(t0, t0, (int8_t)s8);
@ -24169,8 +24162,6 @@ static void gen_mxu_s8ldd(DisasContext *ctx)
gen_store_mxu_gpr(t0, XRa); gen_store_mxu_gpr(t0, XRa);
gen_set_label(l0);
tcg_temp_free(t0); tcg_temp_free(t0);
tcg_temp_free(t1); tcg_temp_free(t1);
} }
@ -24181,7 +24172,6 @@ static void gen_mxu_s8ldd(DisasContext *ctx)
static void gen_mxu_d16mul(DisasContext *ctx) static void gen_mxu_d16mul(DisasContext *ctx)
{ {
TCGv t0, t1, t2, t3; TCGv t0, t1, t2, t3;
TCGLabel *l0;
uint32_t XRa, XRb, XRc, XRd, optn2; uint32_t XRa, XRb, XRc, XRd, optn2;
t0 = tcg_temp_new(); t0 = tcg_temp_new();
@ -24189,18 +24179,12 @@ static void gen_mxu_d16mul(DisasContext *ctx)
t2 = tcg_temp_new(); t2 = tcg_temp_new();
t3 = tcg_temp_new(); t3 = tcg_temp_new();
l0 = gen_new_label();
XRa = extract32(ctx->opcode, 6, 4); XRa = extract32(ctx->opcode, 6, 4);
XRb = extract32(ctx->opcode, 10, 4); XRb = extract32(ctx->opcode, 10, 4);
XRc = extract32(ctx->opcode, 14, 4); XRc = extract32(ctx->opcode, 14, 4);
XRd = extract32(ctx->opcode, 18, 4); XRd = extract32(ctx->opcode, 18, 4);
optn2 = extract32(ctx->opcode, 22, 2); optn2 = extract32(ctx->opcode, 22, 2);
gen_load_mxu_cr(t0);
tcg_gen_andi_tl(t0, t0, MXU_CR_MXU_EN);
tcg_gen_brcondi_tl(TCG_COND_NE, t0, MXU_CR_MXU_EN, l0);
gen_load_mxu_gpr(t1, XRb); gen_load_mxu_gpr(t1, XRb);
tcg_gen_sextract_tl(t0, t1, 0, 16); tcg_gen_sextract_tl(t0, t1, 0, 16);
tcg_gen_sextract_tl(t1, t1, 16, 16); tcg_gen_sextract_tl(t1, t1, 16, 16);
@ -24229,8 +24213,6 @@ static void gen_mxu_d16mul(DisasContext *ctx)
gen_store_mxu_gpr(t3, XRa); gen_store_mxu_gpr(t3, XRa);
gen_store_mxu_gpr(t2, XRd); gen_store_mxu_gpr(t2, XRd);
gen_set_label(l0);
tcg_temp_free(t0); tcg_temp_free(t0);
tcg_temp_free(t1); tcg_temp_free(t1);
tcg_temp_free(t2); tcg_temp_free(t2);
@ -24244,7 +24226,6 @@ static void gen_mxu_d16mul(DisasContext *ctx)
static void gen_mxu_d16mac(DisasContext *ctx) static void gen_mxu_d16mac(DisasContext *ctx)
{ {
TCGv t0, t1, t2, t3; TCGv t0, t1, t2, t3;
TCGLabel *l0;
uint32_t XRa, XRb, XRc, XRd, optn2, aptn2; uint32_t XRa, XRb, XRc, XRd, optn2, aptn2;
t0 = tcg_temp_new(); t0 = tcg_temp_new();
@ -24252,8 +24233,6 @@ static void gen_mxu_d16mac(DisasContext *ctx)
t2 = tcg_temp_new(); t2 = tcg_temp_new();
t3 = tcg_temp_new(); t3 = tcg_temp_new();
l0 = gen_new_label();
XRa = extract32(ctx->opcode, 6, 4); XRa = extract32(ctx->opcode, 6, 4);
XRb = extract32(ctx->opcode, 10, 4); XRb = extract32(ctx->opcode, 10, 4);
XRc = extract32(ctx->opcode, 14, 4); XRc = extract32(ctx->opcode, 14, 4);
@ -24261,10 +24240,6 @@ static void gen_mxu_d16mac(DisasContext *ctx)
optn2 = extract32(ctx->opcode, 22, 2); optn2 = extract32(ctx->opcode, 22, 2);
aptn2 = extract32(ctx->opcode, 24, 2); aptn2 = extract32(ctx->opcode, 24, 2);
gen_load_mxu_cr(t0);
tcg_gen_andi_tl(t0, t0, MXU_CR_MXU_EN);
tcg_gen_brcondi_tl(TCG_COND_NE, t0, MXU_CR_MXU_EN, l0);
gen_load_mxu_gpr(t1, XRb); gen_load_mxu_gpr(t1, XRb);
tcg_gen_sextract_tl(t0, t1, 0, 16); tcg_gen_sextract_tl(t0, t1, 0, 16);
tcg_gen_sextract_tl(t1, t1, 16, 16); tcg_gen_sextract_tl(t1, t1, 16, 16);
@ -24315,8 +24290,6 @@ static void gen_mxu_d16mac(DisasContext *ctx)
gen_store_mxu_gpr(t3, XRa); gen_store_mxu_gpr(t3, XRa);
gen_store_mxu_gpr(t2, XRd); gen_store_mxu_gpr(t2, XRd);
gen_set_label(l0);
tcg_temp_free(t0); tcg_temp_free(t0);
tcg_temp_free(t1); tcg_temp_free(t1);
tcg_temp_free(t2); tcg_temp_free(t2);
@ -24330,7 +24303,6 @@ static void gen_mxu_d16mac(DisasContext *ctx)
static void gen_mxu_q8mul_q8mulsu(DisasContext *ctx) static void gen_mxu_q8mul_q8mulsu(DisasContext *ctx)
{ {
TCGv t0, t1, t2, t3, t4, t5, t6, t7; TCGv t0, t1, t2, t3, t4, t5, t6, t7;
TCGLabel *l0;
uint32_t XRa, XRb, XRc, XRd, sel; uint32_t XRa, XRb, XRc, XRd, sel;
t0 = tcg_temp_new(); t0 = tcg_temp_new();
@ -24342,18 +24314,12 @@ static void gen_mxu_q8mul_q8mulsu(DisasContext *ctx)
t6 = tcg_temp_new(); t6 = tcg_temp_new();
t7 = tcg_temp_new(); t7 = tcg_temp_new();
l0 = gen_new_label();
XRa = extract32(ctx->opcode, 6, 4); XRa = extract32(ctx->opcode, 6, 4);
XRb = extract32(ctx->opcode, 10, 4); XRb = extract32(ctx->opcode, 10, 4);
XRc = extract32(ctx->opcode, 14, 4); XRc = extract32(ctx->opcode, 14, 4);
XRd = extract32(ctx->opcode, 18, 4); XRd = extract32(ctx->opcode, 18, 4);
sel = extract32(ctx->opcode, 22, 2); sel = extract32(ctx->opcode, 22, 2);
gen_load_mxu_cr(t0);
tcg_gen_andi_tl(t0, t0, MXU_CR_MXU_EN);
tcg_gen_brcondi_tl(TCG_COND_NE, t0, MXU_CR_MXU_EN, l0);
gen_load_mxu_gpr(t3, XRb); gen_load_mxu_gpr(t3, XRb);
gen_load_mxu_gpr(t7, XRc); gen_load_mxu_gpr(t7, XRc);
@ -24404,8 +24370,6 @@ static void gen_mxu_q8mul_q8mulsu(DisasContext *ctx)
gen_store_mxu_gpr(t0, XRd); gen_store_mxu_gpr(t0, XRd);
gen_store_mxu_gpr(t1, XRa); gen_store_mxu_gpr(t1, XRa);
gen_set_label(l0);
tcg_temp_free(t0); tcg_temp_free(t0);
tcg_temp_free(t1); tcg_temp_free(t1);
tcg_temp_free(t2); tcg_temp_free(t2);
@ -24423,23 +24387,16 @@ static void gen_mxu_q8mul_q8mulsu(DisasContext *ctx)
static void gen_mxu_s32ldd_s32lddr(DisasContext *ctx) static void gen_mxu_s32ldd_s32lddr(DisasContext *ctx)
{ {
TCGv t0, t1; TCGv t0, t1;
TCGLabel *l0;
uint32_t XRa, Rb, s12, sel; uint32_t XRa, Rb, s12, sel;
t0 = tcg_temp_new(); t0 = tcg_temp_new();
t1 = tcg_temp_new(); t1 = tcg_temp_new();
l0 = gen_new_label();
XRa = extract32(ctx->opcode, 6, 4); XRa = extract32(ctx->opcode, 6, 4);
s12 = extract32(ctx->opcode, 10, 10); s12 = extract32(ctx->opcode, 10, 10);
sel = extract32(ctx->opcode, 20, 1); sel = extract32(ctx->opcode, 20, 1);
Rb = extract32(ctx->opcode, 21, 5); Rb = extract32(ctx->opcode, 21, 5);
gen_load_mxu_cr(t0);
tcg_gen_andi_tl(t0, t0, MXU_CR_MXU_EN);
tcg_gen_brcondi_tl(TCG_COND_NE, t0, MXU_CR_MXU_EN, l0);
gen_load_gpr(t0, Rb); gen_load_gpr(t0, Rb);
tcg_gen_movi_tl(t1, s12); tcg_gen_movi_tl(t1, s12);
@ -24456,8 +24413,6 @@ static void gen_mxu_s32ldd_s32lddr(DisasContext *ctx)
} }
gen_store_mxu_gpr(t1, XRa); gen_store_mxu_gpr(t1, XRa);
gen_set_label(l0);
tcg_temp_free(t0); tcg_temp_free(t0);
tcg_temp_free(t1); tcg_temp_free(t1);
} }
@ -25383,6 +25338,14 @@ static void decode_opc_mxu(CPUMIPSState *env, DisasContext *ctx)
return; return;
} }
{
TCGv t_mxu_cr = tcg_temp_new();
TCGLabel *l_exit = gen_new_label();
gen_load_mxu_cr(t_mxu_cr);
tcg_gen_andi_tl(t_mxu_cr, t_mxu_cr, MXU_CR_MXU_EN);
tcg_gen_brcondi_tl(TCG_COND_NE, t_mxu_cr, MXU_CR_MXU_EN, l_exit);
switch (opcode) { switch (opcode) {
case OPC_MXU_S32MADD: case OPC_MXU_S32MADD:
/* TODO: Implement emulation of S32MADD instruction. */ /* TODO: Implement emulation of S32MADD instruction. */
@ -25610,6 +25573,10 @@ static void decode_opc_mxu(CPUMIPSState *env, DisasContext *ctx)
MIPS_INVAL("decode_opc_mxu"); MIPS_INVAL("decode_opc_mxu");
generate_exception_end(ctx, EXCP_RI); generate_exception_end(ctx, EXCP_RI);
} }
gen_set_label(l_exit);
tcg_temp_free(t_mxu_cr);
}
} }