target-ppc: fix fload_invalid_op_excp()

The argument is a value, not a flag. Update the tests accordingly. Also
set a correct default value for NaN.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6047 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2008-12-15 17:13:55 +00:00
parent 05b936038f
commit e0147e4138
1 changed files with 7 additions and 9 deletions

View File

@ -671,15 +671,13 @@ static always_inline uint64_t fload_invalid_op_excp (int op)
int ve; int ve;
ve = fpscr_ve; ve = fpscr_ve;
if (op & POWERPC_EXCP_FP_VXSNAN) { switch (op) {
/* Operation on signaling NaN */ case POWERPC_EXCP_FP_VXSNAN:
env->fpscr |= 1 << FPSCR_VXSNAN; env->fpscr |= 1 << FPSCR_VXSNAN;
} break;
if (op & POWERPC_EXCP_FP_VXSOFT) { case POWERPC_EXCP_FP_VXSOFT:
/* Software-defined condition */
env->fpscr |= 1 << FPSCR_VXSOFT; env->fpscr |= 1 << FPSCR_VXSOFT;
} break;
switch (op & ~(POWERPC_EXCP_FP_VXSOFT | POWERPC_EXCP_FP_VXSNAN)) {
case POWERPC_EXCP_FP_VXISI: case POWERPC_EXCP_FP_VXISI:
/* Magnitude subtraction of infinities */ /* Magnitude subtraction of infinities */
env->fpscr |= 1 << FPSCR_VXISI; env->fpscr |= 1 << FPSCR_VXISI;
@ -718,7 +716,7 @@ static always_inline uint64_t fload_invalid_op_excp (int op)
env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI)); env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI));
if (ve == 0) { if (ve == 0) {
/* Set the result to quiet NaN */ /* Set the result to quiet NaN */
ret = UINT64_MAX; ret = 0xFFF8000000000000ULL;
env->fpscr &= ~(0xF << FPSCR_FPCC); env->fpscr &= ~(0xF << FPSCR_FPCC);
env->fpscr |= 0x11 << FPSCR_FPCC; env->fpscr |= 0x11 << FPSCR_FPCC;
} }
@ -729,7 +727,7 @@ static always_inline uint64_t fload_invalid_op_excp (int op)
env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI)); env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI));
if (ve == 0) { if (ve == 0) {
/* Set the result to quiet NaN */ /* Set the result to quiet NaN */
ret = UINT64_MAX; ret = 0xFFF8000000000000ULL;
env->fpscr &= ~(0xF << FPSCR_FPCC); env->fpscr &= ~(0xF << FPSCR_FPCC);
env->fpscr |= 0x11 << FPSCR_FPCC; env->fpscr |= 0x11 << FPSCR_FPCC;
} }