From dbcc48fa8fc534c240129fcdece9c3fb0434e82c Mon Sep 17 00:00:00 2001 From: Tom Musta Date: Wed, 15 Jan 2014 08:10:28 -0600 Subject: [PATCH] target-ppc: VSX Stage 4: Add VSX 2.07 Flag This patch adds a flag to identify those VSX instructions that are new to Power ISA V2.07. The flag is added to the Power 8 processor initialization so that the P8 models understand how to decode and emulate instructions in this category. Signed-off-by: Tom Musta Reviewed-by: Richard Henderson Signed-off-by: Alexander Graf --- target-ppc/cpu.h | 4 +++- target-ppc/translate_init.c | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 51bcd4a14d..c7bbbe3eed 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1875,9 +1875,11 @@ enum { PPC2_DBRX = 0x0000000000000010ULL, /* Book I 2.05 PowerPC specification */ PPC2_ISA205 = 0x0000000000000020ULL, + /* VSX additions in ISA 2.07 */ + PPC2_VSX207 = 0x0000000000000040ULL, #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \ - PPC2_ISA205) + PPC2_ISA205 | PPC2_VSX207) }; /*****************************************************************************/ diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 02f586734b..60ec9cd73d 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7144,7 +7144,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) PPC_64B | PPC_ALTIVEC | PPC_SEGMENT_64B | PPC_SLBI | PPC_POPCNTB | PPC_POPCNTWD; - pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX; + pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX; pcc->msr_mask = 0x800000000284FF36ULL; pcc->mmu_model = POWERPC_MMU_2_06; #if defined(CONFIG_SOFTMMU)