mirror of https://github.com/xqemu/xqemu.git
Eliminate cpu_T[0]
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4776 c046a42c-6fe2-441c-8c8c-71466251a162
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3f0436fe85
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@ -38,7 +38,7 @@
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according to jump_pc[T2] */
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according to jump_pc[T2] */
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/* global register indexes */
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/* global register indexes */
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static TCGv cpu_env, cpu_T[2], cpu_regwptr;
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static TCGv cpu_env, cpu_regwptr;
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static TCGv cpu_cc_src, cpu_cc_src2, cpu_cc_dst;
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static TCGv cpu_cc_src, cpu_cc_src2, cpu_cc_dst;
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static TCGv cpu_psr, cpu_fsr, cpu_pc, cpu_npc, cpu_gregs[8];
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static TCGv cpu_psr, cpu_fsr, cpu_pc, cpu_npc, cpu_gregs[8];
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static TCGv cpu_cond, cpu_src1, cpu_src2, cpu_dst, cpu_addr, cpu_val;
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static TCGv cpu_cond, cpu_src1, cpu_src2, cpu_dst, cpu_addr, cpu_val;
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@ -1912,13 +1912,9 @@ static void disas_sparc_insn(DisasContext * dc)
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rd = GET_FIELD(insn, 2, 6);
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rd = GET_FIELD(insn, 2, 6);
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cpu_dst = cpu_T[0];
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cpu_src1 = tcg_temp_new(TCG_TYPE_TL); // const
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cpu_src1 = tcg_temp_new(TCG_TYPE_TL); // const
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cpu_src2 = tcg_temp_new(TCG_TYPE_TL); // const
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cpu_src2 = tcg_temp_new(TCG_TYPE_TL); // const
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// loads and stores
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cpu_addr = cpu_T[0];
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switch (opc) {
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switch (opc) {
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case 0: /* branches/sethi */
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case 0: /* branches/sethi */
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{
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{
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@ -4220,7 +4216,7 @@ static void disas_sparc_insn(DisasContext * dc)
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save_state(dc, cpu_cond);
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save_state(dc, cpu_cond);
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r_const = tcg_const_i32(7);
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r_const = tcg_const_i32(7);
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tcg_gen_helper_0_2(helper_check_align, cpu_dst,
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tcg_gen_helper_0_2(helper_check_align, cpu_addr,
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r_const); // XXX remove
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r_const); // XXX remove
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tcg_temp_free(r_const);
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tcg_temp_free(r_const);
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ABI32_MASK(cpu_addr);
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ABI32_MASK(cpu_addr);
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@ -4744,7 +4740,12 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb,
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cpu_tmp0 = tcg_temp_new(TCG_TYPE_TL);
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cpu_tmp0 = tcg_temp_new(TCG_TYPE_TL);
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cpu_tmp32 = tcg_temp_new(TCG_TYPE_I32);
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cpu_tmp32 = tcg_temp_new(TCG_TYPE_I32);
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cpu_tmp64 = tcg_temp_new(TCG_TYPE_I64);
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cpu_tmp64 = tcg_temp_new(TCG_TYPE_I64);
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cpu_dst = tcg_temp_local_new(TCG_TYPE_TL);
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// loads and stores
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cpu_val = tcg_temp_local_new(TCG_TYPE_TL);
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cpu_val = tcg_temp_local_new(TCG_TYPE_TL);
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cpu_addr = tcg_temp_local_new(TCG_TYPE_TL);
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do {
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do {
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if (env->nb_breakpoints > 0) {
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if (env->nb_breakpoints > 0) {
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@ -4795,7 +4796,9 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb,
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(dc->pc - pc_start) < (TARGET_PAGE_SIZE - 32));
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(dc->pc - pc_start) < (TARGET_PAGE_SIZE - 32));
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exit_gen_loop:
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exit_gen_loop:
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tcg_temp_free(cpu_addr);
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tcg_temp_free(cpu_val);
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tcg_temp_free(cpu_val);
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tcg_temp_free(cpu_dst);
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tcg_temp_free(cpu_tmp64);
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tcg_temp_free(cpu_tmp64);
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tcg_temp_free(cpu_tmp32);
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tcg_temp_free(cpu_tmp32);
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tcg_temp_free(cpu_tmp0);
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tcg_temp_free(cpu_tmp0);
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@ -4876,9 +4879,6 @@ void gen_intermediate_code_init(CPUSPARCState *env)
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TCG_AREG0, offsetof(CPUState, xcc),
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TCG_AREG0, offsetof(CPUState, xcc),
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"xcc");
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"xcc");
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#endif
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#endif
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/* XXX: T0 should be a temporary */
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cpu_T[0] = tcg_global_mem_new(TCG_TYPE_TL,
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TCG_AREG0, offsetof(CPUState, t0), "T0");
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cpu_cond = tcg_global_mem_new(TCG_TYPE_TL,
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cpu_cond = tcg_global_mem_new(TCG_TYPE_TL,
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TCG_AREG0, offsetof(CPUState, cond),
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TCG_AREG0, offsetof(CPUState, cond),
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"cond");
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"cond");
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