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RISC-V: Fix riscv_isa_string memory size bug 

This version uses a constant size memory buffer sized for
the maximum possible ISA string length. It also uses g_new
instead of g_new0, uses more efficient logic to append
extensions and adds manual zero termination of the string.

Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Michael Clark <mjc@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
[PMM: Use qemu_tolower() rather than tolower()]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Michael Clark 2018-03-19 14:18:49 -07:00 committed by Peter Maydell
parent 4bdc24fa01
commit d1fd31f822
1 changed files with 6 additions and 6 deletions
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12
target/riscv/cpu.c
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@ -391,16 +391,16 @@ static const TypeInfo riscv_cpu_type_info = {
char *riscv_isa_string(RISCVCPU *cpu) char *riscv_isa_string(RISCVCPU *cpu)
{ {
int i; int i;
size_t maxlen = 5 + ctz32(cpu->env.misa); const size_t maxlen = sizeof("rv128") + sizeof(riscv_exts) + 1;
char *isa_string = g_new0(char, maxlen); char *isa_str = g_new(char, maxlen);
snprintf(isa_string, maxlen, "rv%d", TARGET_LONG_BITS); char *p = isa_str + snprintf(isa_str, maxlen, "rv%d", TARGET_LONG_BITS);
for (i = 0; i < sizeof(riscv_exts); i++) { for (i = 0; i < sizeof(riscv_exts); i++) {
if (cpu->env.misa & RV(riscv_exts[i])) { if (cpu->env.misa & RV(riscv_exts[i])) {
isa_string[strlen(isa_string)] = riscv_exts[i] - 'A' + 'a'; *p++ = qemu_tolower(riscv_exts[i]);
} }
} }
return isa_string; *p = '\0';
return isa_str;
} }
void riscv_cpu_list(FILE *f, fprintf_function cpu_fprintf) void riscv_cpu_list(FILE *f, fprintf_function cpu_fprintf)