mirror of https://github.com/xqemu/xqemu.git
More TCGv type fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4553 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -4401,7 +4401,8 @@ static void disas_sparc_insn(DisasContext * dc)
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/* V9 stqf, store quad fpreg */
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/* V9 stqf, store quad fpreg */
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CHECK_FPU_FEATURE(dc, FLOAT128);
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CHECK_FPU_FEATURE(dc, FLOAT128);
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gen_op_load_fpr_QT0(QFPREG(rd));
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gen_op_load_fpr_QT0(QFPREG(rd));
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tcg_gen_helper_0_2(helper_stqf, cpu_addr, dc->mem_idx);
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tcg_gen_helper_0_2(helper_stqf, cpu_addr,
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tcg_const_i32(dc->mem_idx));
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break;
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break;
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#else /* !TARGET_SPARC64 */
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#else /* !TARGET_SPARC64 */
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/* stdfq, store floating point queue */
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/* stdfq, store floating point queue */
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11
tcg/tcg-op.h
11
tcg/tcg-op.h
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@ -56,6 +56,13 @@ static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2)
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*gen_opparam_ptr++ = arg2;
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*gen_opparam_ptr++ = arg2;
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}
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}
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static inline void tcg_gen_op2ii(int opc, TCGArg arg1, TCGArg arg2)
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{
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*gen_opc_ptr++ = opc;
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*gen_opparam_ptr++ = arg1;
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*gen_opparam_ptr++ = arg2;
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}
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static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3)
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static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3)
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{
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{
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*gen_opc_ptr++ = opc;
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*gen_opc_ptr++ = opc;
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@ -1406,8 +1413,8 @@ static inline void tcg_gen_debug_insn_start(uint64_t pc)
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{
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{
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/* XXX: must really use a 32 bit size for TCGArg in all cases */
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/* XXX: must really use a 32 bit size for TCGArg in all cases */
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#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
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#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
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tcg_gen_op2i(INDEX_op_debug_insn_start,
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tcg_gen_op2ii(INDEX_op_debug_insn_start,
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(uint32_t)(pc), (uint32_t)(pc >> 32));
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(uint32_t)(pc), (uint32_t)(pc >> 32));
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#else
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#else
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tcg_gen_op1i(INDEX_op_debug_insn_start, pc);
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tcg_gen_op1i(INDEX_op_debug_insn_start, pc);
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#endif
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#endif
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