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Sparc64: split DPRINTF into CPUIRQ and EBUS versions 

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2009-12-30 12:27:17 +00:00
parent 302698e882
commit b430a22562
1 changed files with 16 additions and 8 deletions
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24
hw/sun4u.c
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@ -39,12 +39,20 @@
#include "elf.h" #include "elf.h"
//#define DEBUG_IRQ //#define DEBUG_IRQ
//#define DEBUG_EBUS
#ifdef DEBUG_IRQ #ifdef DEBUG_IRQ
#define DPRINTF(fmt, ...) \ #define CPUIRQ_DPRINTF(fmt, ...) \
do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0) do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
#else #else
#define DPRINTF(fmt, ...) #define CPUIRQ_DPRINTF(fmt, ...)
#endif
#ifdef DEBUG_EBUS
#define EBUS_DPRINTF(fmt, ...) \
do { printf("EBUS: " fmt , ## __VA_ARGS__); } while (0)
#else
#define EBUS_DPRINTF(fmt, ...)
#endif #endif
#define KERNEL_LOAD_ADDR 0x00404000 #define KERNEL_LOAD_ADDR 0x00404000
@ -238,14 +246,14 @@ void cpu_check_irqs(CPUState *env)
env->interrupt_index = TT_EXTINT | i; env->interrupt_index = TT_EXTINT | i;
if (old_interrupt != env->interrupt_index) { if (old_interrupt != env->interrupt_index) {
DPRINTF("Set CPU IRQ %d\n", i); CPUIRQ_DPRINTF("Set CPU IRQ %d\n", i);
cpu_interrupt(env, CPU_INTERRUPT_HARD); cpu_interrupt(env, CPU_INTERRUPT_HARD);
} }
break; break;
} }
} }
} else if (!pil && (env->interrupt_index & ~15) == TT_EXTINT) { } else if (!pil && (env->interrupt_index & ~15) == TT_EXTINT) {
DPRINTF("Reset CPU IRQ %d\n", env->interrupt_index & 15); CPUIRQ_DPRINTF("Reset CPU IRQ %d\n", env->interrupt_index & 15);
env->interrupt_index = 0; env->interrupt_index = 0;
cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
} }
@ -256,12 +264,12 @@ static void cpu_set_irq(void *opaque, int irq, int level)
CPUState *env = opaque; CPUState *env = opaque;
if (level) { if (level) {
DPRINTF("Raise CPU IRQ %d\n", irq); CPUIRQ_DPRINTF("Raise CPU IRQ %d\n", irq);
env->halted = 0; env->halted = 0;
env->pil_in |= 1 << irq; env->pil_in |= 1 << irq;
cpu_check_irqs(env); cpu_check_irqs(env);
} else { } else {
DPRINTF("Lower CPU IRQ %d\n", irq); CPUIRQ_DPRINTF("Lower CPU IRQ %d\n", irq);
env->pil_in &= ~(1 << irq); env->pil_in &= ~(1 << irq);
cpu_check_irqs(env); cpu_check_irqs(env);
} }
@ -347,8 +355,8 @@ void cpu_tick_set_limit(void *opaque, uint64_t limit)
static void ebus_mmio_mapfunc(PCIDevice *pci_dev, int region_num, static void ebus_mmio_mapfunc(PCIDevice *pci_dev, int region_num,
pcibus_t addr, pcibus_t size, int type) pcibus_t addr, pcibus_t size, int type)
{ {
DPRINTF("Mapping region %d registers at %" FMT_PCIBUS "\n", region_num, EBUS_DPRINTF("Mapping region %d registers at %" FMT_PCIBUS "\n",
addr); region_num, addr);
switch (region_num) { switch (region_num) {
case 0: case 0:
isa_mmio_init(addr, 0x1000000); isa_mmio_init(addr, 0x1000000);