mirror of https://github.com/xqemu/xqemu.git
sdhci: add a 'spec_version property' (default to v2)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-8-f4bug@amsat.org>
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@ -216,9 +216,9 @@
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/* Slot interrupt status */
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/* Slot interrupt status */
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#define SDHC_SLOT_INT_STATUS 0xFC
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#define SDHC_SLOT_INT_STATUS 0xFC
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/* HWInit Host Controller Version Register 0x0401 */
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/* HWInit Host Controller Version Register */
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#define SDHC_HCVER 0xFE
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#define SDHC_HCVER 0xFE
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#define SD_HOST_SPECv2_VERS 0x2401
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#define SDHC_HCVER_VENDOR 0x24
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#define SDHC_REGISTERS_MAP_SIZE 0x100
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#define SDHC_REGISTERS_MAP_SIZE 0x100
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#define SDHC_INSERTION_DELAY (NANOSECONDS_PER_SECOND)
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#define SDHC_INSERTION_DELAY (NANOSECONDS_PER_SECOND)
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@ -173,7 +173,8 @@ static void sdhci_reset(SDHCIState *s)
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timer_del(s->insert_timer);
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timer_del(s->insert_timer);
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timer_del(s->transfer_timer);
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timer_del(s->transfer_timer);
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/* Set all registers to 0. Capabilities registers are not cleared
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/* Set all registers to 0. Capabilities/Version registers are not cleared
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* and assumed to always preserve their value, given to them during
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* and assumed to always preserve their value, given to them during
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* initialization */
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* initialization */
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memset(&s->sdmasysad, 0, (uintptr_t)&s->capareg - (uintptr_t)&s->sdmasysad);
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memset(&s->sdmasysad, 0, (uintptr_t)&s->capareg - (uintptr_t)&s->sdmasysad);
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@ -918,7 +919,7 @@ static uint64_t sdhci_read(void *opaque, hwaddr offset, unsigned size)
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ret = (uint32_t)(s->admasysaddr >> 32);
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ret = (uint32_t)(s->admasysaddr >> 32);
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break;
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break;
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case SDHC_SLOT_INT_STATUS:
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case SDHC_SLOT_INT_STATUS:
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ret = (SD_HOST_SPECv2_VERS << 16) | sdhci_slotint(s);
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ret = (s->version << 16) | sdhci_slotint(s);
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break;
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break;
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default:
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default:
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qemu_log_mask(LOG_UNIMP, "SDHC rd_%ub @0x%02" HWADDR_PRIx " "
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qemu_log_mask(LOG_UNIMP, "SDHC rd_%ub @0x%02" HWADDR_PRIx " "
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@ -1174,11 +1175,22 @@ static inline unsigned int sdhci_get_fifolen(SDHCIState *s)
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}
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}
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}
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}
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static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp)
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{
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if (s->sd_spec_version != 2) {
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error_setg(errp, "Only Spec v2 is supported");
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return;
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}
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s->version = (SDHC_HCVER_VENDOR << 8) | (s->sd_spec_version - 1);
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}
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/* --- qdev common --- */
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/* --- qdev common --- */
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#define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \
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#define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \
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/* Capabilities registers provide information on supported features
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DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \
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* of this specific host controller implementation */ \
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\
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/* Capabilities registers provide information on supported
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* features of this specific host controller implementation */ \
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DEFINE_PROP_UINT64("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT), \
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DEFINE_PROP_UINT64("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT), \
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DEFINE_PROP_UINT64("maxcurr", _state, maxcurr, 0)
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DEFINE_PROP_UINT64("maxcurr", _state, maxcurr, 0)
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@ -1206,6 +1218,13 @@ static void sdhci_uninitfn(SDHCIState *s)
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static void sdhci_common_realize(SDHCIState *s, Error **errp)
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static void sdhci_common_realize(SDHCIState *s, Error **errp)
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{
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{
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Error *local_err = NULL;
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sdhci_init_readonly_registers(s, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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s->buf_maxsz = sdhci_get_fifolen(s);
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s->buf_maxsz = sdhci_get_fifolen(s);
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s->fifo_buffer = g_malloc0(s->buf_maxsz);
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s->fifo_buffer = g_malloc0(s->buf_maxsz);
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@ -78,6 +78,7 @@ typedef struct SDHCIState {
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/* Read-only registers */
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/* Read-only registers */
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uint64_t capareg; /* Capabilities Register */
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uint64_t capareg; /* Capabilities Register */
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uint64_t maxcurr; /* Maximum Current Capabilities Register */
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uint64_t maxcurr; /* Maximum Current Capabilities Register */
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uint16_t version; /* Host Controller Version Register */
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uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */
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uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */
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uint32_t buf_maxsz;
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uint32_t buf_maxsz;
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@ -93,6 +94,7 @@ typedef struct SDHCIState {
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/* Configurable properties */
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/* Configurable properties */
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bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */
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bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */
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uint32_t quirks;
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uint32_t quirks;
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uint8_t sd_spec_version;
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} SDHCIState;
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} SDHCIState;
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/*
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/*
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