mirror of https://github.com/xqemu/xqemu.git
acpi-dsdt: procedurally generate _PRT
This replaces the _PRT constant with a method that computes it. The problem is that the DSDT+SSDT have grown from 2.0 to 2.1, enough to cross the 8k barrier (we align the ACPI tables to 4k before putting them in fw_cfg). This causes problems with migration and the pc-i440fx-2.0 machine type. The solution to the problem is to hardcode 64k as the limit, but this doesn't solve the bug with pc-i440fx-2.0. The fix will be for QEMU 2.1 to use exactly the same size as QEMU 2.0 for the ACPI tables. First, however, we must make the actual AML equal or smaller; to do this, rewrite _PRT in a way that saves over 1k of bytecode. Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -181,57 +181,45 @@ DefinitionBlock (
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Scope(\_SB) {
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Scope(PCI0) {
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Name(_PRT, Package() {
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/* PCI IRQ routing table, example from ACPI 2.0a specification,
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section 6.2.8.1 */
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/* Note: we provide the same info as the PCI routing
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table of the Bochs BIOS */
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Method (_PRT, 0) {
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Store(Package(128) {}, Local0)
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Store(Zero, Local1)
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While(LLess(Local1, 128)) {
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// slot = pin >> 2
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Store(ShiftRight(Local1, 2), Local2)
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#define prt_slot(nr, lnk0, lnk1, lnk2, lnk3) \
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Package() { nr##ffff, 0, lnk0, 0 }, \
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Package() { nr##ffff, 1, lnk1, 0 }, \
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Package() { nr##ffff, 2, lnk2, 0 }, \
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Package() { nr##ffff, 3, lnk3, 0 }
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// lnk = (slot + pin) & 3
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Store(And(Add(Local1, Local2), 3), Local3)
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If (LEqual(Local3, 0)) {
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Store(Package(4) { Zero, Zero, LNKD, Zero }, Local4)
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}
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If (LEqual(Local3, 1)) {
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// device 1 is the power-management device, needs SCI
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If (LEqual(Local1, 4)) {
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Store(Package(4) { Zero, Zero, LNKS, Zero }, Local4)
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} Else {
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Store(Package(4) { Zero, Zero, LNKA, Zero }, Local4)
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}
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}
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If (LEqual(Local3, 2)) {
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Store(Package(4) { Zero, Zero, LNKB, Zero }, Local4)
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}
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If (LEqual(Local3, 3)) {
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Store(Package(4) { Zero, Zero, LNKC, Zero }, Local4)
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}
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#define prt_slot0(nr) prt_slot(nr, LNKD, LNKA, LNKB, LNKC)
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#define prt_slot1(nr) prt_slot(nr, LNKA, LNKB, LNKC, LNKD)
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#define prt_slot2(nr) prt_slot(nr, LNKB, LNKC, LNKD, LNKA)
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#define prt_slot3(nr) prt_slot(nr, LNKC, LNKD, LNKA, LNKB)
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// Complete the interrupt routing entry:
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// Package(4) { 0x[slot]FFFF, [pin], [link], 0) }
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prt_slot0(0x0000),
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/* Device 1 is power mgmt device, and can only use irq 9 */
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prt_slot(0x0001, LNKS, LNKB, LNKC, LNKD),
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prt_slot2(0x0002),
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prt_slot3(0x0003),
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prt_slot0(0x0004),
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prt_slot1(0x0005),
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prt_slot2(0x0006),
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prt_slot3(0x0007),
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prt_slot0(0x0008),
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prt_slot1(0x0009),
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prt_slot2(0x000a),
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prt_slot3(0x000b),
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prt_slot0(0x000c),
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prt_slot1(0x000d),
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prt_slot2(0x000e),
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prt_slot3(0x000f),
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prt_slot0(0x0010),
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prt_slot1(0x0011),
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prt_slot2(0x0012),
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prt_slot3(0x0013),
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prt_slot0(0x0014),
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prt_slot1(0x0015),
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prt_slot2(0x0016),
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prt_slot3(0x0017),
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prt_slot0(0x0018),
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prt_slot1(0x0019),
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prt_slot2(0x001a),
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prt_slot3(0x001b),
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prt_slot0(0x001c),
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prt_slot1(0x001d),
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prt_slot2(0x001e),
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prt_slot3(0x001f),
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})
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Store(Or(ShiftLeft(Local2, 16), 0xFFFF), Index(Local4, 0))
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Store(And(Local1, 3), Index(Local4, 1))
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Store(Local4, Index(Local0, Local1))
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Increment(Local1)
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}
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Return(Local0)
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}
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}
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Field(PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) {
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